imx: add support for Kontron OSM-S/BL i.MX8MP

This adds support for the Kontron i.MX8MP OSM-S size system-on-module +
eval board.

CPU:      NXP i.MX8MP @ 1600MHz (quad-core A53)
Memory:   4 (up to 8) GByte LPDDR4-RAM
Storage:  32 (up to 128) GByte eMMC + microSD slot
Ethernet: 2x 1 Gbit/s IEEE (1x with TSN)
UART:     1x UART console output on the Mini-B USB Debug Port
          (signals are really UART on this Mini-B USB port!!!, there is
          an adapter with ftdi available from Kontron)
          1x RS232, 1x RS485
USB:	  2x USB 2.0 Type-A, 1x USB 3.0 Type-C DRP
Misc:	  8 (up to 128) kByte EEPROM (at24), RTC, 2x CAN, HDMI, 1x PCIe

This will create an SD card image for the board.
To use this image you have to bring the board to the recovery boot mode
(normal boot mode is eMMC). At the time of writing, the SoM (or the SoC)
has a bug that the FORCE_RECOVERY signal (switch S1 on the eval board)
doesn't work as long as the eMMC boot0 partition contains data.
Therefore you have to wipe this boot0 partition to be able to boot from
SD card. To do this call the following commands at uboot:

mmc dev 0 1
mmc erase 0 0x2000

After that, the system will try to boot from SD card.

Signed-off-by: Martin Schiller <ms@dev.tdt.de>

target/linux/imx/cortexa53/base-files/etc/board.d/02_network

@@ -18,7 +18,8 @@ gw,imx8mp-gw72xx-2x|\
 gw,imx8mm-gw73xx-0x|\
 gw,imx8mp-gw73xx-2x|\
 gw,imx8mm-gw7902-0x|\
-gateworks,imx8mp-gw82xx-2x)
+gateworks,imx8mp-gw82xx-2x|\
+kontron,imx8mp-bl-osm-s)
 	ucidef_set_interfaces_lan_wan 'eth1' 'eth0'
 	;;
 gw,imx8mm-gw7901)

target/linux/imx/cortexa53/base-files/lib/upgrade/platform.sh

@@ -2,7 +2,8 @@
 enable_image_metadata_check() {
 	case "$(board_name)" in
 	gateworks,imx8m*|\
-	gw,imx8m*)
+	gw,imx8m*|\
+	kontron,imx8mp-bl-osm-s)
 		REQUIRE_IMAGE_METADATA=1
 		;;
 	esac
@@ -14,7 +15,8 @@ platform_check_image() {
 
 	case "$board" in
 	gateworks,imx8m*|\
-	gw,imx8m*)
+	gw,imx8m*|\
+	kontron,imx8mp-bl-osm-s)
 		return 0
 		;;
 	esac
@@ -28,7 +30,8 @@ platform_do_upgrade() {
 
 	case "$board" in
 	gateworks,imx8m*|\
-	gw,imx8m*)
+	gw,imx8m*|\
+	kontron,imx8mp-bl-osm-s)
 		export_bootdevice && export_partdevice diskdev 0 || {
 			echo "Unable to find root device."
 			return 1
@@ -45,7 +48,8 @@ platform_copy_config() {
 
 	case "$board" in
 	gateworks,imx8m*|\
-	gw,imx8m*)
+	gw,imx8m*|\
+	kontron,imx8mp-bl-osm-s)
 		export_partdevice partdev 1 && {
 			v "Storing $UPGRADE_BACKUP on /dev/$partdev..."
 			mount -o rw,noatime "/dev/$partdev" /mnt

target/linux/imx/image/bootscript-kontron_osm-s-imx8mp

@@ -0,0 +1,44 @@
+# distro-config bootscript
+#  - use only well-known variable names provided by U-Boot Distro boot
+#    - devtype - device type script run from (mmc|usb|scsi)
+#    - devnum - device number script run from (0 based int)
+#    - distro_bootpart - partition script run from (0 based int)
+#    - prefix - directory boot script was found in
+#    - kernel_addr_r - address to load kernel image to
+#    - fdt_addr_r - address to load dtb to
+#    - ftdcontroladdr - address dtb is at
+#    - fdt_file{1,2,3,4,5} name of fdt to load
+#    - fdt_overlays - list of fdt overlay files to load and apply
+echo "Kontron OSM-S/BL i.MX8MP OpenWrt Boot script v1.0"
+
+# determine root device using PARTUUID:
+#  - this avoids any difference beteween uboot's device names/numbers
+#    not matching Linux as device enumeration is not a set API.
+#  - PARTUUID is disk UUID concatenated with partition number
+#    - for MBR disk UUID is unique disk id at offset 440
+#    - for GPT disk UUID is GPT UUID
+#  - for OpenWrt the squasfs rootfs is not readable by U-Boot so we have
+#    a 'boot' partition containing bootscript kernel dtbs followed by the rootfs
+#    partition, therefore we add 1 to the current partition
+setexpr rootpart ${distro_bootpart} + 1 # root on 'next' partition
+part uuid ${devtype} ${devnum}:${rootpart} uuid
+setenv console "ttymxc2,115200"
+setenv bootargs ${bootargs} console=${console} root=PARTUUID=${uuid} rootfstype=squashfs,ext4,f2fs rootwait pci=noaer
+
+setenv fdtfile imx8mp-kontron-bl-osm-s.dtb
+
+# load dtb (we try fdt_file and then fdt_file{1,2,3,4,5})
+echo "loading DTB..."
+setenv fdt_addr
+setenv fdt_list $fdtfile $fdt_file1 $fdt_file2 $fdt_file3 $fdt_file4 $fdt_file5
+setenv load_fdt 'echo Loading $fdt...; load ${devtype} ${devnum}:${distro_bootpart} ${fdt_addr_r} ${prefix}${fdt} && setenv fdt_addr ${fdt_addr_r}'
+setenv apply_overlays 'fdt addr $fdt_addr_r && for fdt in "$fdt_overlays"; do load ${devtype} ${devnum}:${distro_bootpart} $loadaddr $prefix/$fdt && fdt resize $filesize && fdt apply $loadaddr && echo applied $prefix/$fdt; done'
+for fdt in ${fdt_list}; do if test -e ${devtype} ${devnum}:${distro_bootpart} ${prefix}${fdt}; then run load_fdt; fi; done
+if test -z "$fdt_addr"; then echo "Warning: Using bootloader DTB"; setenv fdt_addr $fdtcontroladdr; fi
+if test -n "$fdt_overlays"; then echo "Applying overlays"; run apply_overlays; fi
+if test -n "$fixfdt"; then echo "Adjusting FDT"; run fixfdt; fi
+
+# load and boot kernel
+echo "loading kernel..."
+load ${devtype} ${devnum}:${distro_bootpart} ${kernel_addr_r} ${prefix}Image &&
+booti ${kernel_addr_r} - ${fdt_addr}

target/linux/imx/image/cortexa53.mk

@@ -26,6 +26,10 @@ define Build/sdcard-img-ext4
 		256
 endef
 
+define Build/sdcard-img-add-uboot
+	dd if=$(STAGING_DIR_IMAGE)/$(UBOOT)-flash.bin of=$@ bs=1k seek=32 conv=notrunc
+endef
+
 define Device/Default
   PROFILES := Default
   FILESYSTEMS := squashfs ubifs ext4
@@ -80,3 +84,24 @@ define Device/gateworks_venice
   IMAGE/img.gz := boot-scr | boot-img-ext4 | sdcard-img-ext4 | gzip | append-metadata
 endef
 TARGET_DEVICES += gateworks_venice
+
+define Device/kontron_osm-s-imx8mp
+  $(call Device/Default)
+  FILESYSTEMS := squashfs ext4
+  DEVICE_VENDOR := Kontron
+  DEVICE_MODEL := OSM-S/BL i.MX8MP
+  SUPPORTED_DEVICES := \
+	kontron,imx8mp-bl-osm-s
+  BOOT_SCRIPT := kontron_osm-s-imx8mp
+  PARTITION_OFFSET := 16M
+  DEVICE_DTS := imx8mp-kontron-bl-osm-s
+  DEVICE_PACKAGES := \
+	kmod-can kmod-can-flexcan \
+	kmod-eeprom-at24 \
+	kmod-leds-gpio \
+	kmod-rtc-rv3028
+  UBOOT := kontron-osm-s-mx8mp
+  IMAGES := img.gz
+  IMAGE/img.gz := boot-scr | boot-img-ext4 | sdcard-img-ext4 | sdcard-img-add-uboot | gzip | append-metadata
+endef
+TARGET_DEVICES += kontron_osm-s-imx8mp

target/linux/imx/patches-6.12/511-v6.14-arm64-dts-imx8mp-kontron-dl-change-touchscreen-power-supply-to-AVDD28-supply.patch

@@ -0,0 +1,33 @@
+From e2bc14a13e434417e5a606ddac9d121003289a7d Mon Sep 17 00:00:00 2001
+From: Frank Li <Frank.Li@nxp.com>
+Date: Wed, 23 Oct 2024 11:26:36 -0400
+Subject: arm64: dts: imx8mp-kontron-dl: change touchscreen power-supply to
+ AVDD28-supply
+
+Update the touchscreen power-supply from 'power-supply' to 'AVDD28-supply' and
+'VDDIO-supply' as per the binding documentation in goodix.yaml.
+
+Fix below warning:
+arch/arm64/boot/dts/freescale/imx8mp-kontron-dl.dtb: touchscreen@5d:
+    'power-supply' does not match any of the regexes: 'pinctrl-[0-9]+'
+        from schema $id: http://devicetree.org/schemas/input/touchscreen/goodix.yaml
+
+Signed-off-by: Frank Li <Frank.Li@nxp.com>
+Reviewed-by: Frieder Schrempf <frieder.schrempf@kontron.de>
+Signed-off-by: Shawn Guo <shawnguo@kernel.org>
+---
+ arch/arm64/boot/dts/freescale/imx8mp-kontron-dl.dtso | 3 ++-
+ 1 file changed, 2 insertions(+), 1 deletion(-)
+
+--- a/arch/arm64/boot/dts/freescale/imx8mp-kontron-dl.dtso
++++ b/arch/arm64/boot/dts/freescale/imx8mp-kontron-dl.dtso
+@@ -80,7 +80,8 @@
+ 		interrupt-parent = <&gpio1>;
+ 		interrupts = <6 8>;
+ 		irq-gpios = <&gpio1 6 0>;
+-		power-supply = <&reg_vcc_panel>;
++		AVDD28-supply = <&reg_vcc_panel>;
++		VDDIO-supply = <&reg_vcc_panel>;
+ 		reset-gpios = <&gpio1 7 0>;
+ 	};
+ };

target/linux/imx/patches-6.12/512-v6.15-arm64-dts-imx8mp-kontron-Add-support-for-reading-SD_VSEL-signal.patch

@@ -0,0 +1,62 @@
+From 39e4189d9d63a0b6fc15458ce0136e99ecdfb1b8 Mon Sep 17 00:00:00 2001
+From: Frieder Schrempf <frieder.schrempf@kontron.de>
+Date: Wed, 18 Dec 2024 16:27:32 +0100
+Subject: arm64: dts: imx8mp-kontron: Add support for reading SD_VSEL signal
+
+This fixes the LDO5 regulator handling of the pca9450 driver by
+taking the status of the SD_VSEL into account to determine which
+configuration register is used for the voltage setting.
+
+Even without this change there is no functional issue, as the code
+for switching the voltage in sdhci.c currently switches both, the
+VSELECT/SD_VSEL signal and the regulator voltage at the same time
+and doesn't run into an invalid corner case.
+
+We should still make sure, that we always use the correct register
+when controlling the regulator. At least in U-Boot this fixes an
+actual bug where the wrong IO voltage is used and it makes sure
+that the correct voltage can be read from sysfs.
+
+Signed-off-by: Frieder Schrempf <frieder.schrempf@kontron.de>
+Signed-off-by: Shawn Guo <shawnguo@kernel.org>
+---
+ arch/arm64/boot/dts/freescale/imx8mp-kontron-osm-s.dtsi | 7 ++++---
+ 1 file changed, 4 insertions(+), 3 deletions(-)
+
+--- a/arch/arm64/boot/dts/freescale/imx8mp-kontron-osm-s.dtsi
++++ b/arch/arm64/boot/dts/freescale/imx8mp-kontron-osm-s.dtsi
+@@ -311,6 +311,7 @@
+ 				regulator-name = "NVCC_SD (LDO5)";
+ 				regulator-min-microvolt = <1800000>;
+ 				regulator-max-microvolt = <3300000>;
++				sd-vsel-gpios = <&gpio1 4 GPIO_ACTIVE_HIGH>;
+ 			};
+ 		};
+ 	};
+@@ -808,7 +809,7 @@
+ 			MX8MP_IOMUXC_SD2_DATA1__USDHC2_DATA1		0x1d0 /* SDIO_A_D1 */
+ 			MX8MP_IOMUXC_SD2_DATA2__USDHC2_DATA2		0x1d0 /* SDIO_A_D2 */
+ 			MX8MP_IOMUXC_SD2_DATA3__USDHC2_DATA3		0x1d0 /* SDIO_A_D3 */
+-			MX8MP_IOMUXC_GPIO1_IO04__USDHC2_VSELECT		0x1d0
++			MX8MP_IOMUXC_GPIO1_IO04__USDHC2_VSELECT		0x400001d0
+ 		>;
+ 	};
+ 
+@@ -820,7 +821,7 @@
+ 			MX8MP_IOMUXC_SD2_DATA1__USDHC2_DATA1		0x1d4 /* SDIO_A_D1 */
+ 			MX8MP_IOMUXC_SD2_DATA2__USDHC2_DATA2		0x1d4 /* SDIO_A_D2 */
+ 			MX8MP_IOMUXC_SD2_DATA3__USDHC2_DATA3		0x1d4 /* SDIO_A_D3 */
+-			MX8MP_IOMUXC_GPIO1_IO04__USDHC2_VSELECT		0x1d0
++			MX8MP_IOMUXC_GPIO1_IO04__USDHC2_VSELECT		0x400001d0
+ 		>;
+ 	};
+ 
+@@ -832,7 +833,7 @@
+ 			MX8MP_IOMUXC_SD2_DATA1__USDHC2_DATA1		0x1d6 /* SDIO_A_D1 */
+ 			MX8MP_IOMUXC_SD2_DATA2__USDHC2_DATA2		0x1d6 /* SDIO_A_D2 */
+ 			MX8MP_IOMUXC_SD2_DATA3__USDHC2_DATA3		0x1d6 /* SDIO_A_D3 */
+-			MX8MP_IOMUXC_GPIO1_IO04__USDHC2_VSELECT		0x1d0
++			MX8MP_IOMUXC_GPIO1_IO04__USDHC2_VSELECT		0x400001d0
+ 		>;
+ 	};
+ 

target/linux/imx/patches-6.12/513-v6.18-arm64-dts-imx8mp-kontron-Fix-CAN_ADDR0-and-CAN_ADDR1-GPIOs.patch

@@ -0,0 +1,89 @@
+From f1b27d420b6ff0feed64208e28b033d7b931ceb1 Mon Sep 17 00:00:00 2001
+From: Annette Kobou <annette.kobou@kontron.de>
+Date: Mon, 21 Jul 2025 12:05:41 +0200
+Subject: arm64: dts: imx8mp-kontron: Fix CAN_ADDR0 and CAN_ADDR1 GPIOs
+
+Some signal assignments were modified between hardware revisions
+1 and 2:
+
+Revision 1:
+
+  - SPI_A_WP   -> CAN_ADDR0
+  - SPI_A_HOLD -> CAN_ADDR1
+
+Revision 2 and later:
+
+  - SPI_A_SDI -> CAN_ADDR0
+  - SPI_A_SDO -> CAN_ADDR1
+
+Fix the labels and add the missing pinctrls.
+
+Signed-off-by: Annette Kobou <annette.kobou@kontron.de>
+Signed-off-by: Frieder Schrempf <frieder.schrempf@kontron.de>
+Signed-off-by: Shawn Guo <shawnguo@kernel.org>
+---
+ .../boot/dts/freescale/imx8mp-kontron-bl-osm-s.dts | 31 +++++++++++++++++++---
+ 1 file changed, 27 insertions(+), 4 deletions(-)
+
+--- a/arch/arm64/boot/dts/freescale/imx8mp-kontron-bl-osm-s.dts
++++ b/arch/arm64/boot/dts/freescale/imx8mp-kontron-bl-osm-s.dts
+@@ -123,14 +123,12 @@
+ 
+ /*
+  * Rename SoM signals according to board usage:
+- *   SPI_A_WP      -> CAN_ADDR0
+- *   SPI_A_HOLD    -> CAN_ADDR1
+  *   GPIO_B_0      -> DIO1_OUT
+  *   GPIO_B_1      -> DIO2_OUT
+  */
+ &gpio3 {
+ 	gpio-line-names = "PCIE_WAKE", "PCIE_CLKREQ", "PCIE_A_PERST", "SDIO_B_D5",
+-			  "SDIO_B_D6", "SDIO_B_D7", "CAN_ADDR0", "CAN_ADDR1",
++			  "SDIO_B_D6", "SDIO_B_D7", "SPI_A_WP", "SPI_A_HOLD",
+ 			  "UART_B_RTS", "UART_B_CTS", "SDIO_B_D0", "SDIO_B_D1",
+ 			  "SDIO_B_D2", "SDIO_B_D3", "SDIO_B_WP", "SDIO_B_D4",
+ 			  "PCIE_SM_ALERT", "SDIO_B_CLK", "SDIO_B_CMD", "DIO1_OUT",
+@@ -159,6 +157,24 @@
+ 			  "GPIO_A_7", "CARRIER_PWR_EN", "I2S_A_DATA_IN", "I2S_LRCLK";
+ };
+ 
++/*
++ * Rename SoM signals according to board usage:
++ *   SPI_A_SDI	-> CAN_ADDR0
++ *   SPI_A_SDO	-> CAN_ADDR1
++ */
++&gpio5 {
++	pinctrl-names = "default";
++	pinctrl-0 = <&pinctrl_gpio5>;
++	gpio-line-names = "I2S_BITCLK", "I2S_A_DATA_OUT", "I2S_MCLK", "PWM_2",
++			  "PWM_1", "PWM_0", "SPI_A_SCK", "CAN_ADDR1",
++			  "CAN_ADDR0", "SPI_A_CS0", "SPI_B_SCK", "SPI_B_SDO",
++			  "SPI_B_SDI", "SPI_B_CS0", "I2C_A_SCL", "I2C_A_SDA",
++			  "I2C_B_SCL", "I2C_B_SDA", "PCIE_SMCLK", "PCIE_SMDAT",
++			  "I2C_CAM_SCL", "I2C_CAM_SDA", "UART_A_RX", "UART_A_TX",
++			  "UART_C_RX", "UART_C_TX", "UART_CON_RX", "UART_CON_TX",
++			  "UART_B_RX", "UART_B_TX";
++};
++
+ &hdmi_pvi {
+ 	status = "okay";
+ };
+@@ -297,9 +313,16 @@
+ 		>;
+ 	};
+ 
++	pinctrl_gpio5: gpio5grp {
++		fsl,pins = <
++			MX8MP_IOMUXC_ECSPI1_MOSI__GPIO5_IO07		0x46 /* CAN_ADR0 */
++			MX8MP_IOMUXC_ECSPI1_MISO__GPIO5_IO08		0x46 /* CAN_ADR1 */
++		>;
++	};
++
+ 	pinctrl_usb_hub: usbhubgrp {
+ 		fsl,pins = <
+ 			MX8MP_IOMUXC_NAND_DQS__GPIO3_IO14		0x46
+ 		>;
+ 	};
+-};
++};
+\ No newline at end of file

target/linux/imx/patches-6.12/514-v6.18-arm64-dts-imx8mp-kontron-Fix-GPIO-labels-for-latest-BL-board.patch

@@ -0,0 +1,79 @@
+From 0153bcd37c61fdfd4953bc3e2953f00a19577e2a Mon Sep 17 00:00:00 2001
+From: Frieder Schrempf <frieder.schrempf@kontron.de>
+Date: Mon, 21 Jul 2025 12:05:42 +0200
+Subject: arm64: dts: imx8mp-kontron: Fix GPIO labels for latest BL board
+
+Hardware rev 3 changed a few signals. Reflect these changes in
+the GPIO labels.
+
+* digital IOs were moved to GPIO expander
+* remove labels for unused signals
+* add labels for TFT, CSI and USB hub IOs
+
+Signed-off-by: Frieder Schrempf <frieder.schrempf@kontron.de>
+Signed-off-by: Shawn Guo <shawnguo@kernel.org>
+---
+ .../boot/dts/freescale/imx8mp-kontron-bl-osm-s.dts | 30 ++++++++++------------
+ 1 file changed, 14 insertions(+), 16 deletions(-)
+
+--- a/arch/arm64/boot/dts/freescale/imx8mp-kontron-bl-osm-s.dts
++++ b/arch/arm64/boot/dts/freescale/imx8mp-kontron-bl-osm-s.dts
+@@ -123,38 +123,36 @@
+ 
+ /*
+  * Rename SoM signals according to board usage:
+- *   GPIO_B_0      -> DIO1_OUT
+- *   GPIO_B_1      -> DIO2_OUT
++ *   GPIO_B_0      -> IO_EXP_INT
++ *   GPIO_B_1      -> IO_EXP_RST
+  */
+ &gpio3 {
+ 	gpio-line-names = "PCIE_WAKE", "PCIE_CLKREQ", "PCIE_A_PERST", "SDIO_B_D5",
+ 			  "SDIO_B_D6", "SDIO_B_D7", "SPI_A_WP", "SPI_A_HOLD",
+ 			  "UART_B_RTS", "UART_B_CTS", "SDIO_B_D0", "SDIO_B_D1",
+ 			  "SDIO_B_D2", "SDIO_B_D3", "SDIO_B_WP", "SDIO_B_D4",
+-			  "PCIE_SM_ALERT", "SDIO_B_CLK", "SDIO_B_CMD", "DIO1_OUT",
+-			  "DIO2_OUT", "", "BOOT_SEL0", "BOOT_SEL1",
++			  "PCIE_SM_ALERT", "SDIO_B_CLK", "SDIO_B_CMD", "IO_EXP_INT",
++			  "IO_EXP_RST", "", "BOOT_SEL0", "BOOT_SEL1",
+ 			  "", "", "SDIO_B_CD", "SDIO_B_PWR_EN",
+ 			  "HDMI_CEC", "HDMI_HPD";
+ };
+ 
+ /*
+- * Rename SoM signals according to board usage:
+- *   GPIO_B_5      -> DIO2_IN
+- *   GPIO_B_6      -> DIO3_IN
+- *   GPIO_B_7      -> DIO4_IN
+- *   GPIO_B_3      -> DIO4_OUT
+- *   GPIO_B_4      -> DIO1_IN
+- *   GPIO_B_2      -> DIO3_OUT
++ * Rename SoM signals according to board usage and remove labels for unsed pins:
++ *   GPIO_A_6      -> TFT_RESET
++ *   GPIO_A_7      -> TFT_STBY
++ *   GPIO_B_3      -> CSI_ENABLE
++ *   GPIO_B_2      -> USB_HUB_RST
+  */
+ &gpio4 {
+-	gpio-line-names = "DIO2_IN", "DIO3_IN", "DIO4_IN", "GPIO_C_0",
++	gpio-line-names = "", "", "", "",
+ 			  "ETH_A_MDC", "ETH_A_MDIO", "ETH_A_RXD0", "ETH_A_RXD1",
+ 			  "ETH_A_RXD2", "ETH_A_RXD3", "ETH_A_RX_DV", "ETH_A_RX_CLK",
+ 			  "ETH_A_TXD0", "ETH_A_TXD1", "ETH_A_TXD2", "ETH_A_TXD3",
+-			  "ETH_A_TX_EN", "ETH_A_TX_CLK", "DIO4_OUT", "DIO1_IN",
+-			  "DIO3_OUT", "GPIO_A_6", "CAN_A_TX", "UART_A_CTS",
++			  "ETH_A_TX_EN", "ETH_A_TX_CLK", "CSI_ENABLE", "",
++			  "USB_HUB_RST", "TFT_RESET", "CAN_A_TX", "UART_A_CTS",
+ 			  "UART_A_RTS", "CAN_A_RX", "CAN_B_TX", "CAN_B_RX",
+-			  "GPIO_A_7", "CARRIER_PWR_EN", "I2S_A_DATA_IN", "I2S_LRCLK";
++			  "TFT_STBY", "CARRIER_PWR_EN", "I2S_A_DATA_IN", "I2S_LRCLK";
+ };
+ 
+ /*
+@@ -325,4 +323,4 @@
+ 			MX8MP_IOMUXC_NAND_DQS__GPIO3_IO14		0x46
+ 		>;
+ 	};
+-};
+\ No newline at end of file
++};

target/linux/imx/patches-6.12/515-v6.18-arm64-dts-imx8mp-kontron-Fix-USB-hub-reset.patch

@@ -0,0 +1,46 @@
+From 384de84ae08b2e71aaf3432f412f97d979f1ac7e Mon Sep 17 00:00:00 2001
+From: Frieder Schrempf <frieder.schrempf@kontron.de>
+Date: Mon, 21 Jul 2025 12:05:43 +0200
+Subject: arm64: dts: imx8mp-kontron: Fix USB hub reset
+
+The latest hardware revision uses GPIO_B_2 as reset for
+the USB hub. Fix this and remove the pinctrl as we already
+have this in the OSM-S devicetree.
+
+Signed-off-by: Frieder Schrempf <frieder.schrempf@kontron.de>
+Signed-off-by: Shawn Guo <shawnguo@kernel.org>
+---
+ arch/arm64/boot/dts/freescale/imx8mp-kontron-bl-osm-s.dts | 10 +---------
+ 1 file changed, 1 insertion(+), 9 deletions(-)
+
+--- a/arch/arm64/boot/dts/freescale/imx8mp-kontron-bl-osm-s.dts
++++ b/arch/arm64/boot/dts/freescale/imx8mp-kontron-bl-osm-s.dts
+@@ -250,8 +250,6 @@
+ };
+ 
+ &usb_dwc3_1 {
+-	pinctrl-names = "default";
+-	pinctrl-0 = <&pinctrl_usb_hub>;
+ 	#address-cells = <1>;
+ 	#size-cells = <0>;
+ 	dr_mode = "host";
+@@ -260,7 +258,7 @@
+ 	usb-hub@1 {
+ 		compatible = "usb424,2514";
+ 		reg = <1>;
+-		reset-gpios = <&gpio3 14 GPIO_ACTIVE_LOW>;
++		reset-gpios = <&gpio4 20 GPIO_ACTIVE_LOW>;
+ 	};
+ };
+ 
+@@ -317,10 +315,4 @@
+ 			MX8MP_IOMUXC_ECSPI1_MISO__GPIO5_IO08		0x46 /* CAN_ADR1 */
+ 		>;
+ 	};
+-
+-	pinctrl_usb_hub: usbhubgrp {
+-		fsl,pins = <
+-			MX8MP_IOMUXC_NAND_DQS__GPIO3_IO14		0x46
+-		>;
+-	};
+ };

target/linux/imx/patches-6.12/516-v6.18-arm64-dts-imx8mp-kontron-Fix-USB-OTG-role-switching.patch

@@ -0,0 +1,71 @@
+From 6504297872c7a5d0d06247970d32940eba26b8b3 Mon Sep 17 00:00:00 2001
+From: Frieder Schrempf <frieder.schrempf@kontron.de>
+Date: Mon, 20 Oct 2025 15:21:51 +0200
+Subject: arm64: dts: imx8mp-kontron: Fix USB OTG role switching
+
+The VBUS supply regulator is currently assigned to the PHY node.
+This causes the VBUS to be always on, even when the controller
+needs to be switched to peripheral mode.
+
+Fix the OTG role switching by adding a connector node and moving
+the VBUS supply regulator to that node. This way the VBUS gets
+correctly switched according to the current role.
+
+Fixes: 946ab10e3f40 ("arm64: dts: Add support for Kontron OSM-S i.MX8MP SoM and BL carrier board")
+Signed-off-by: Frieder Schrempf <frieder.schrempf@kontron.de>
+Signed-off-by: Shawn Guo <shawnguo@kernel.org>
+---
+ .../boot/dts/freescale/imx8mp-kontron-bl-osm-s.dts | 24 +++++++++++++++++-----
+ 1 file changed, 19 insertions(+), 5 deletions(-)
+
+--- a/arch/arm64/boot/dts/freescale/imx8mp-kontron-bl-osm-s.dts
++++ b/arch/arm64/boot/dts/freescale/imx8mp-kontron-bl-osm-s.dts
+@@ -16,11 +16,20 @@
+ 		ethernet1 = &eqos;
+ 	};
+ 
+-	extcon_usbc: usbc {
+-		compatible = "linux,extcon-usb-gpio";
++	connector {
++		compatible = "gpio-usb-b-connector", "usb-b-connector";
++		id-gpios = <&gpio1 10 GPIO_ACTIVE_HIGH>;
++		label = "Type-C";
+ 		pinctrl-names = "default";
+ 		pinctrl-0 = <&pinctrl_usb1_id>;
+-		id-gpios = <&gpio1 10 GPIO_ACTIVE_HIGH>;
++		type = "micro";
++		vbus-supply = <&reg_usb1_vbus>;
++
++		port {
++			usb_dr_connector: endpoint {
++				remote-endpoint = <&usb3_dwc>;
++			};
++		};
+ 	};
+ 
+ 	leds {
+@@ -244,9 +253,15 @@
+ 	hnp-disable;
+ 	srp-disable;
+ 	dr_mode = "otg";
+-	extcon = <&extcon_usbc>;
+ 	usb-role-switch;
++	role-switch-default-mode = "peripheral";
+ 	status = "okay";
++
++	port {
++		usb3_dwc: endpoint {
++			remote-endpoint = <&usb_dr_connector>;
++		};
++	};
+ };
+ 
+ &usb_dwc3_1 {
+@@ -273,7 +288,6 @@
+ };
+ 
+ &usb3_phy0 {
+-	vbus-supply = <&reg_usb1_vbus>;
+ 	status = "okay";
+ };
+ 

target/linux/imx/patches-6.12/517-v7.1-arm64-dts-imx8mp-kontron-Fix-touch-reset-configuration-on-DL-devices.patch

@@ -0,0 +1,61 @@
+From 058c53476dde9937877e93d964a283bbb5e1e4c7 Mon Sep 17 00:00:00 2001
+From: Frieder Schrempf <frieder.schrempf@kontron.de>
+Date: Fri, 20 Feb 2026 11:36:16 +0100
+Subject: arm64: dts: imx8mp-kontron: Fix touch reset configuration on DL
+ devices
+
+The reset signal needs a pullup, but there is no hardware pullup.
+As a workaround, enable the internal pullup to fix the touchscreen.
+
+As this deviates from the default generic GPIO settings in the OSM
+devicetree, add a new node for the touch pinctrl and redefine the
+generic gpio1 pinctrl.
+
+Fixes: 946ab10e3f40f ("arm64: dts: Add support for Kontron OSM-S i.MX8MP SoM and BL carrier board")
+Signed-off-by: Frieder Schrempf <frieder.schrempf@kontron.de>
+Reviewed-by: Frank Li <Frank.Li@nxp.com>
+Signed-off-by: Frank Li <Frank.Li@nxp.com>
+---
+ arch/arm64/boot/dts/freescale/imx8mp-kontron-dl.dtso | 19 +++++++++++++++++++
+ 1 file changed, 19 insertions(+)
+
+--- a/arch/arm64/boot/dts/freescale/imx8mp-kontron-dl.dtso
++++ b/arch/arm64/boot/dts/freescale/imx8mp-kontron-dl.dtso
+@@ -77,6 +77,8 @@
+ 	touchscreen@5d {
+ 		compatible = "goodix,gt928";
+ 		reg = <0x5d>;
++		pinctrl-names = "default";
++		pinctrl-0 = <&pinctrl_touch>;
+ 		interrupt-parent = <&gpio1>;
+ 		interrupts = <6 8>;
+ 		irq-gpios = <&gpio1 6 0>;
+@@ -98,6 +100,16 @@
+ 	status = "okay";
+ };
+ 
++/* redefine to remove touch controller GPIOs */
++&pinctrl_gpio1 {
++	fsl,pins = <
++		MX8MP_IOMUXC_GPIO1_IO00__GPIO1_IO00		0x19 /* GPIO_A_0 */
++		MX8MP_IOMUXC_GPIO1_IO01__GPIO1_IO01		0x19 /* GPIO_A_1 */
++		MX8MP_IOMUXC_GPIO1_IO05__GPIO1_IO05		0x19 /* GPIO_A_2 */
++		MX8MP_IOMUXC_GPIO1_IO08__GPIO1_IO08		0x19 /* GPIO_A_5 */
++	>;
++};
++
+ &pwm1 {
+ 	status = "okay";
+ };
+@@ -108,4 +120,11 @@
+ 			MX8MP_IOMUXC_SAI3_RXFS__GPIO4_IO28		0x19
+ 		>;
+ 	};
++
++	pinctrl_touch: touchgrp {
++		fsl,pins = <
++			MX8MP_IOMUXC_GPIO1_IO06__GPIO1_IO06		0x19
++			MX8MP_IOMUXC_GPIO1_IO07__GPIO1_IO07		0x150
++		>;
++	};
+ };

target/linux/imx/patches-6.12/518-v7.1-arm64-dts-imx8mp-kontron-Use-GPIO-IRQ-defines-in-DL-devicetree.patch

@@ -0,0 +1,41 @@
+From 93190b6eab824454223e355477d7ef621d1d8dae Mon Sep 17 00:00:00 2001
+From: Frieder Schrempf <frieder.schrempf@kontron.de>
+Date: Fri, 20 Feb 2026 11:36:19 +0100
+Subject: arm64: dts: imx8mp-kontron: Use GPIO/IRQ defines in DL devicetree
+
+To make the code more readable, use the macros for the GPIO and IRQ
+settings.
+
+Signed-off-by: Frieder Schrempf <frieder.schrempf@kontron.de>
+Reviewed-by: Frank Li <Frank.Li@nxp.com>
+Reviewed-by: Daniel Baluta <daniel.baluta@nxp.com>
+Signed-off-by: Frank Li <Frank.Li@nxp.com>
+---
+ arch/arm64/boot/dts/freescale/imx8mp-kontron-dl.dtso | 7 ++++---
+ 1 file changed, 4 insertions(+), 3 deletions(-)
+
+--- a/arch/arm64/boot/dts/freescale/imx8mp-kontron-dl.dtso
++++ b/arch/arm64/boot/dts/freescale/imx8mp-kontron-dl.dtso
+@@ -7,6 +7,7 @@
+ /plugin/;
+ 
+ #include <dt-bindings/gpio/gpio.h>
++#include <dt-bindings/interrupt-controller/irq.h>
+ #include "imx8mp-pinfunc.h"
+ 
+ &{/} {
+@@ -80,11 +81,11 @@
+ 		pinctrl-names = "default";
+ 		pinctrl-0 = <&pinctrl_touch>;
+ 		interrupt-parent = <&gpio1>;
+-		interrupts = <6 8>;
+-		irq-gpios = <&gpio1 6 0>;
++		interrupts = <6 IRQ_TYPE_LEVEL_LOW>;
++		irq-gpios = <&gpio1 6 GPIO_ACTIVE_HIGH>;
+ 		AVDD28-supply = <&reg_vcc_panel>;
+ 		VDDIO-supply = <&reg_vcc_panel>;
+-		reset-gpios = <&gpio1 7 0>;
++		reset-gpios = <&gpio1 7 GPIO_ACTIVE_HIGH>;
+ 	};
+ };
+ 

target/linux/imx/patches-6.12/519-v7.1-arm64-dts-imx8mp-kontron-Fix-boot-order-for-PMIC-and-RTC.patch

@@ -0,0 +1,38 @@
+From 130d90114c5255a7a729158da8fd8298a02017f1 Mon Sep 17 00:00:00 2001
+From: Annette Kobou <annette.kobou@kontron.de>
+Date: Mon, 9 Mar 2026 09:57:43 +0100
+Subject: arm64: dts: imx8mp-kontron: Fix boot order for PMIC and RTC
+
+The PMIC provides a level-shifter for the I2C lines to the RTC. As the
+level shifter needs to be enabled before the RTC can be accessed, make sure
+that the PMIC driver is probed first.
+
+As the PMIC also provides the supply voltage for the RTC through the 3.3V
+regulator, simply express this in the DT to create the required dependency.
+
+Avoid sporadic boot hangs that occurred when the RTC was accessed before
+the level-shifter was enabled.
+
+Fixes: 946ab10e3f40f ("arm64: dts: Add support for Kontron OSM-S i.MX8MP SoM and BL carrier board")
+Signed-off-by: Annette Kobou <annette.kobou@kontron.de>
+Signed-off-by: Frieder Schrempf <frieder.schrempf@kontron.de>
+Signed-off-by: Frank Li <Frank.Li@nxp.com>
+---
+ arch/arm64/boot/dts/freescale/imx8mp-kontron-osm-s.dtsi | 6 ++++++
+ 1 file changed, 6 insertions(+)
+
+--- a/arch/arm64/boot/dts/freescale/imx8mp-kontron-osm-s.dtsi
++++ b/arch/arm64/boot/dts/freescale/imx8mp-kontron-osm-s.dtsi
+@@ -330,6 +330,12 @@
+ 		pinctrl-names = "default";
+ 		pinctrl-0 = <&pinctrl_rtc>;
+ 		interrupts-extended = <&gpio3 24 IRQ_TYPE_LEVEL_LOW>;
++		/*
++		 * While specifying the vdd-supply is normally not strictly necessary,
++		 * here it also makes sure that the PMIC driver enables the level-
++		 * shifter for the RTC before the RTC is probed.
++		 */
++		vdd-supply = <&reg_vdd_3v3>;
+ 	};
+ };
+