From 39e2af7ed6159a1a74069772eeb104bd5414bf8f Mon Sep 17 00:00:00 2001 From: Markus Stockhausen Date: Sat, 14 Mar 2026 18:27:53 +0100 Subject: [PATCH] realtek: eth: remove redundant RTL93xx ring setup RTL93xx sets up the ring counters twice. One location is inside rteth_93xx_hw_en_rxtx() and the other one is inside rteth_93xx_hw_reset(). There are slight differences (e.g. the ring size that is set or how the counters are cleared). It is currently unclear where to place it best. For now align this to RTL83xx and remove the coding from function rteth_93xx_hw_en_rxtx(). Provide a complete & proper setup in rteth_93xx_hw_reset(). Looking at the different old implementations one can see that one initialized the ring counters with offset "-2". This headroom is not needed. The old comment " Some SoCs have issues with missing underflow protection" was only regarding the way the counters are being resetted and not how large they are setup. Signed-off-by: Markus Stockhausen Link: https://github.com/openwrt/openwrt/pull/22421 Signed-off-by: Robert Marko --- .../drivers/net/ethernet/rtl838x_eth.c | 25 +++++++------------ 1 file changed, 9 insertions(+), 16 deletions(-) diff --git a/target/linux/realtek/files-6.12/drivers/net/ethernet/rtl838x_eth.c b/target/linux/realtek/files-6.12/drivers/net/ethernet/rtl838x_eth.c index 1196649780..d368240675 100644 --- a/target/linux/realtek/files-6.12/drivers/net/ethernet/rtl838x_eth.c +++ b/target/linux/realtek/files-6.12/drivers/net/ethernet/rtl838x_eth.c @@ -460,11 +460,16 @@ static void rteth_93xx_hw_reset(struct rteth_ctrl *ctrl) rteth_nic_reset(ctrl, 0x6); /* Setup Head of Line */ - for (int i = 0; i < RTETH_RX_RINGS; i++) { - int pos = (i % 3) * 10; + for (int r = 0; r < RTETH_RX_RINGS; r++) { + int cnt = min(RTETH_RX_RING_SIZE, 0x3ff); + int pos = (r % 3) * 10; + u32 v; - sw_w32_mask(0x3ff << pos, 0, ctrl->r->dma_if_rx_ring_size(i)); - sw_w32_mask(0x3ff << pos, RTETH_RX_RING_SIZE, ctrl->r->dma_if_rx_ring_cntr(i)); + /* set ring size */ + sw_w32_mask(0x3ff << pos, cnt << pos, ctrl->r->dma_if_rx_ring_size(r)); + /* clear counters */ + v = (sw_r32(ctrl->r->dma_if_rx_ring_cntr(r)) >> pos) & 0x3ff; + sw_w32_mask(0x3ff << pos, v, ctrl->r->dma_if_rx_ring_cntr(r)); } } @@ -576,18 +581,6 @@ static void rteth_93xx_hw_en_rxtx(struct rteth_ctrl *ctrl) /* Setup CPU-Port: RX Buffer truncated at DEFAULT_MTU Bytes */ sw_w32((DEFAULT_MTU << 16) | RX_TRUNCATE_EN_93XX, ctrl->r->dma_if_ctrl); - for (int i = 0; i < RTETH_RX_RINGS; i++) { - int cnt = min(RTETH_RX_RING_SIZE - 2, 0x3ff); - int pos = (i % 3) * 10; - u32 v; - - sw_w32_mask(0x3ff << pos, cnt << pos, ctrl->r->dma_if_rx_ring_size(i)); - - /* Some SoCs have issues with missing underflow protection */ - v = (sw_r32(ctrl->r->dma_if_rx_ring_cntr(i)) >> pos) & 0x3ff; - sw_w32_mask(0x3ff << pos, v, ctrl->r->dma_if_rx_ring_cntr(i)); - } - rteth_enable_all_rx_irqs(ctrl); /* Enable DMA */