diff --git a/target/linux/realtek/files-6.12/drivers/net/pcs/pcs-rtl-otto.c b/target/linux/realtek/files-6.12/drivers/net/pcs/pcs-rtl-otto.c index 118b923773..2bdc18a6a1 100644 --- a/target/linux/realtek/files-6.12/drivers/net/pcs/pcs-rtl-otto.c +++ b/target/linux/realtek/files-6.12/drivers/net/pcs/pcs-rtl-otto.c @@ -2711,72 +2711,40 @@ static int rtpcs_930x_sds_set_polarity(struct rtpcs_serdes *sds, return rtpcs_sds_write_bits(sds, 0x0, 0x0, 9, 8, val); } -static const struct rtpcs_sds_config rtpcs_930x_sds_cfg_ana_com_even[] = { +static const struct rtpcs_sds_config rtpcs_930x_sds_cfg_ana_com[] = { {0x21, 0x03, 0x8206}, {0x21, 0x05, 0x40B0}, {0x21, 0x06, 0x0010}, {0x21, 0x07, 0xF09F}, - {0x21, 0x0C, 0x0007}, {0x21, 0x0D, 0x6009}, {0x21, 0x0E, 0x0000}, {0x21, 0x0F, 0x0008} + {0x21, 0x0A, 0x0003}, {0x21, 0x0B, 0x0005}, {0x21, 0x0C, 0x0007}, {0x21, 0x0D, 0x6009}, + {0x21, 0x0E, 0x0000}, {0x21, 0x0F, 0x0008} }; -static const struct rtpcs_sds_config rtpcs_930x_sds_cfg_ana_com_odd[] = { - {0x21, 0x03, 0x8206}, {0x21, 0x06, 0x0010}, {0x21, 0x07, 0xF09F}, {0x21, 0x0A, 0x0003}, - {0x21, 0x0B, 0x0005}, {0x21, 0x0C, 0x0007}, {0x21, 0x0D, 0x6009}, {0x21, 0x0E, 0x0000}, - {0x21, 0x0F, 0x0008} -}; - -static const struct rtpcs_sds_config rtpcs_930x_sds_cfg_ana_1g_even[] = { - {0x24, 0x00, 0x0668}, {0x24, 0x02, 0xD020}, {0x24, 0x06, 0xC000}, {0x24, 0x0B, 0x1892}, - {0x24, 0x0F, 0xFFDF}, {0x24, 0x12, 0x03C4}, {0x24, 0x13, 0x027F}, {0x24, 0x14, 0x1311}, - {0x24, 0x16, 0x00C9}, {0x24, 0x17, 0xA100}, {0x24, 0x1A, 0x0001}, {0x24, 0x1C, 0x0400}, - {0x25, 0x01, 0x0300}, {0x25, 0x02, 0x1017}, {0x25, 0x03, 0xFFDF}, {0x25, 0x05, 0x7F7C}, - {0x25, 0x07, 0x8100}, {0x25, 0x08, 0x0001}, {0x25, 0x09, 0xFFD4}, {0x25, 0x0A, 0x7C2F}, - {0x25, 0x0E, 0x003F}, {0x25, 0x0F, 0x0121}, {0x25, 0x10, 0x0020}, {0x25, 0x11, 0x8840} -}; - -static const struct rtpcs_sds_config rtpcs_930x_sds_cfg_ana_1g_odd[] = { +static const struct rtpcs_sds_config rtpcs_930x_sds_cfg_ana_1g[] = { {0x24, 0x00, 0x0668}, {0x24, 0x02, 0xD020}, {0x24, 0x06, 0xC000}, {0x24, 0x0B, 0x1892}, {0x24, 0x0F, 0xFFDF}, {0x24, 0x12, 0x03C4}, {0x24, 0x13, 0x027F}, {0x24, 0x14, 0x1311}, {0x24, 0x16, 0x00C9}, {0x24, 0x17, 0xA100}, {0x24, 0x1A, 0x0001}, {0x24, 0x1C, 0x0400}, {0x25, 0x00, 0x820F}, {0x25, 0x01, 0x0300}, {0x25, 0x02, 0x1017}, {0x25, 0x03, 0xFFDF}, {0x25, 0x05, 0x7F7C}, {0x25, 0x07, 0x8100}, {0x25, 0x08, 0x0001}, {0x25, 0x09, 0xFFD4}, {0x25, 0x0A, 0x7C2F}, {0x25, 0x0E, 0x003F}, {0x25, 0x0F, 0x0121}, {0x25, 0x10, 0x0020}, - {0x25, 0x11, 0x8840}, + {0x25, 0x11, 0x8840} }; -static const struct rtpcs_sds_config rtpcs_930x_sds_cfg_ana_3g_even[] = { - {0x28, 0x00, 0x0668}, {0x28, 0x02, 0xD020}, {0x28, 0x06, 0xC000}, {0x28, 0x0B, 0x1892}, - {0x28, 0x0F, 0xFFDF}, {0x28, 0x12, 0x01C4}, {0x28, 0x13, 0x027F}, {0x28, 0x14, 0x1311}, - {0x28, 0x16, 0x00C9}, {0x28, 0x17, 0xA100}, {0x28, 0x1A, 0x0001}, {0x28, 0x1C, 0x0400}, - {0x29, 0x01, 0x0300}, {0x29, 0x02, 0x1017}, {0x29, 0x03, 0xFFDF}, {0x29, 0x05, 0x7F7C}, - {0x29, 0x07, 0x8100}, {0x29, 0x08, 0x0001}, {0x29, 0x09, 0xFFD4}, {0x29, 0x0A, 0x7C2F}, - {0x29, 0x0E, 0x003F}, {0x29, 0x0F, 0x0121}, {0x29, 0x10, 0x0020}, {0x29, 0x11, 0x8840}, -}; - -static const struct rtpcs_sds_config rtpcs_930x_sds_cfg_ana_3g_odd[] = { +static const struct rtpcs_sds_config rtpcs_930x_sds_cfg_ana_3g[] = { {0x28, 0x00, 0x0668}, {0x28, 0x02, 0xD020}, {0x28, 0x06, 0xC000}, {0x28, 0x0B, 0x1892}, {0x28, 0x0F, 0xFFDF}, {0x28, 0x12, 0x01C4}, {0x28, 0x13, 0x027F}, {0x28, 0x14, 0x1311}, {0x28, 0x16, 0x00C9}, {0x28, 0x17, 0xA100}, {0x28, 0x1A, 0x0001}, {0x28, 0x1C, 0x0400}, {0x29, 0x00, 0x820F}, {0x29, 0x01, 0x0300}, {0x29, 0x02, 0x1017}, {0x29, 0x03, 0xFFDF}, - {0x29, 0x05, 0x7F7C}, {0x29, 0x07, 0x8100}, {0x29, 0x08, 0x0001}, {0x29, 0x0A, 0x7C2F}, - {0x29, 0x0E, 0x003F}, {0x29, 0x0F, 0x0121}, {0x29, 0x10, 0x0020}, {0x29, 0x11, 0x8840}, + {0x29, 0x05, 0x7F7C}, {0x29, 0x07, 0x8100}, {0x29, 0x08, 0x0001}, {0x29, 0x09, 0xFFD4}, + {0x29, 0x0A, 0x7C2F}, {0x29, 0x0E, 0x003F}, {0x29, 0x0F, 0x0121}, {0x29, 0x10, 0x0020}, + {0x29, 0x11, 0x8840}, }; -static const struct rtpcs_sds_config rtpcs_930x_sds_cfg_ana_10g_even[] = { +static const struct rtpcs_sds_config rtpcs_930x_sds_cfg_ana_10g[] = { {0x2E, 0x00, 0xA668}, {0x2E, 0x01, 0x2088}, {0x2E, 0x02, 0xD020}, {0x2E, 0x06, 0xC000}, {0x2E, 0x0B, 0x1892}, {0x2E, 0x0F, 0xFFDF}, {0x2E, 0x11, 0x8280}, {0x2E, 0x12, 0x0044}, {0x2E, 0x13, 0x027F}, {0x2E, 0x14, 0x1311}, {0x2E, 0x17, 0xA100}, {0x2E, 0x1A, 0x0001}, - {0x2E, 0x1C, 0x0400}, {0x2F, 0x01, 0x0300}, {0x2F, 0x02, 0x1217}, {0x2F, 0x03, 0xFFDF}, - {0x2F, 0x05, 0x7F7C}, {0x2F, 0x07, 0x80C4}, {0x2F, 0x08, 0x0001}, {0x2F, 0x09, 0xFFD4}, - {0x2F, 0x0A, 0x7C2F}, {0x2F, 0x0E, 0x003F}, {0x2F, 0x0F, 0x0121}, {0x2F, 0x10, 0x0020}, - {0x2F, 0x11, 0x8840}, -}; - -static const struct rtpcs_sds_config rtpcs_930x_sds_cfg_ana_10g_odd[] = { - {0x2E, 0x00, 0xA668}, {0x2E, 0x02, 0xD020}, {0x2E, 0x06, 0xC000}, {0x2E, 0x0B, 0x1892}, - {0x2E, 0x0F, 0xFFDF}, {0x2E, 0x11, 0x8280}, {0x2E, 0x12, 0x0044}, {0x2E, 0x13, 0x027F}, - {0x2E, 0x14, 0x1311}, {0x2E, 0x17, 0xA100}, {0x2E, 0x1A, 0x0001}, {0x2E, 0x1C, 0x0400}, - {0x2F, 0x00, 0x820F}, {0x2F, 0x01, 0x0300}, {0x2F, 0x02, 0x1217}, {0x2F, 0x03, 0xFFDF}, - {0x2F, 0x05, 0x7F7C}, {0x2F, 0x07, 0x80C4}, {0x2F, 0x08, 0x0001}, {0x2F, 0x09, 0xFFD4}, - {0x2F, 0x0A, 0x7C2F}, {0x2F, 0x0E, 0x003F}, {0x2F, 0x0F, 0x0121}, {0x2F, 0x10, 0x0020}, - {0x2F, 0x11, 0x8840}, + {0x2E, 0x1C, 0x0400}, {0x2F, 0x00, 0x820F}, {0x2F, 0x01, 0x0300}, {0x2F, 0x02, 0x1217}, + {0x2F, 0x03, 0xFFDF}, {0x2F, 0x05, 0x7F7C}, {0x2F, 0x07, 0x80C4}, {0x2F, 0x08, 0x0001}, + {0x2F, 0x09, 0xFFD4}, {0x2F, 0x0A, 0x7C2F}, {0x2F, 0x0E, 0x003F}, {0x2F, 0x0F, 0x0121}, + {0x2F, 0x10, 0x0020}, {0x2F, 0x11, 0x8840}, }; static const struct rtpcs_sds_config rtpcs_930x_sds_cfg_usxgmii_xsgmii[] = { @@ -2875,13 +2843,13 @@ static int rtpcs_930x_sds_config_hw_mode(struct rtpcs_serdes *sds, enum rtpcs_sd } } - APPLY_EO(sds, is_even_sds, rtpcs_930x_sds_cfg_ana_com_even, rtpcs_930x_sds_cfg_ana_com_odd); + apply_fn(sds, rtpcs_930x_sds_cfg_ana_com, ARRAY_SIZE(rtpcs_930x_sds_cfg_ana_com)); switch (hw_mode) { case RTPCS_SDS_MODE_1000BASEX: case RTPCS_SDS_MODE_SGMII: - APPLY_EO(sds, is_even_sds, rtpcs_930x_sds_cfg_ana_1g_even, - rtpcs_930x_sds_cfg_ana_1g_odd); + rtpcs_sds_apply_config(sds, rtpcs_930x_sds_cfg_ana_1g, + ARRAY_SIZE(rtpcs_930x_sds_cfg_ana_1g)); break; case RTPCS_SDS_MODE_10GBASER: @@ -2894,28 +2862,27 @@ static int rtpcs_930x_sds_config_hw_mode(struct rtpcs_serdes *sds, enum rtpcs_sd * we switch the mode on demand so might only need to apply one sequence * at a time. */ - APPLY_EO(sds, is_even_sds, rtpcs_930x_sds_cfg_ana_1g_even, - rtpcs_930x_sds_cfg_ana_1g_odd); - APPLY_EO(sds, is_even_sds, rtpcs_930x_sds_cfg_ana_3g_even, - rtpcs_930x_sds_cfg_ana_3g_odd); - APPLY_EO(sds, is_even_sds, rtpcs_930x_sds_cfg_ana_10g_even, - rtpcs_930x_sds_cfg_ana_10g_odd); + rtpcs_sds_apply_config(sds, rtpcs_930x_sds_cfg_ana_1g, + ARRAY_SIZE(rtpcs_930x_sds_cfg_ana_1g)); + rtpcs_sds_apply_config(sds, rtpcs_930x_sds_cfg_ana_3g, + ARRAY_SIZE(rtpcs_930x_sds_cfg_ana_3g)); + rtpcs_sds_apply_config(sds, rtpcs_930x_sds_cfg_ana_10g, + ARRAY_SIZE(rtpcs_930x_sds_cfg_ana_10g)); rtpcs_sds_write(sds, 0x2F, 0x14, 0xE008); break; case RTPCS_SDS_MODE_2500BASEX: - APPLY_EO(sds, is_even_sds, rtpcs_930x_sds_cfg_ana_1g_even, - rtpcs_930x_sds_cfg_ana_1g_odd); - APPLY_EO(sds, is_even_sds, rtpcs_930x_sds_cfg_ana_3g_even, - rtpcs_930x_sds_cfg_ana_3g_odd); + rtpcs_sds_apply_config(sds, rtpcs_930x_sds_cfg_ana_1g, + ARRAY_SIZE(rtpcs_930x_sds_cfg_ana_1g)); + rtpcs_sds_apply_config(sds, rtpcs_930x_sds_cfg_ana_3g, + ARRAY_SIZE(rtpcs_930x_sds_cfg_ana_3g)); break; case RTPCS_SDS_MODE_XSGMII: case RTPCS_SDS_MODE_USXGMII_10GSXGMII: - APPLY_EO(sds, is_even_sds, rtpcs_930x_sds_cfg_ana_10g_even, - rtpcs_930x_sds_cfg_ana_10g_odd); - + apply_fn(sds, rtpcs_930x_sds_cfg_ana_10g, + ARRAY_SIZE(rtpcs_930x_sds_cfg_ana_10g)); apply_fn(sds, rtpcs_930x_sds_cfg_usxgmii_xsgmii, ARRAY_SIZE(rtpcs_930x_sds_cfg_usxgmii_xsgmii));