the fix?
This commit is contained in:
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d7fba5c9d1
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7e74b3ded9
GPG Key ID:
6F42FE1A481818C2
@ -61,9 +61,9 @@
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};
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&mdio {
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status = "okay";
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pinctrl-0 = <&mdio_pins>;
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pinctrl-names = "default";
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status = "okay";
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pinctrl-0 = <&mdio_pins>;
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pinctrl-names = "default";
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/*
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* DELETE the upstream qca8075-package@0 node.
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@ -119,9 +119,8 @@
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port@0 {
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reg = <0>;
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label = "cpu";
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ethernet = <&gmac>;
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ethernet = <&swport5>;
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phy-mode = "rgmii";
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tag-protocol = "none";
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fixed-link {
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speed = <1000>;
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full-duplex;
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@ -162,6 +161,7 @@
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phy-mode = "internal";
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phy-handle = <&qca8337_phy4>;
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};
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};
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/*
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@ -183,190 +183,193 @@
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};
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&switch {
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status = "okay";
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status = "okay";
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mdio-bus = <&mdio>;
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//qca,mdio = <&mdio>; //alternative if above not work
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/*
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* psgmii-ethphy points to the last PHY in the QCA8075 package (ethphy12).
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* This is the combo port and serves as the PSGMII calibration PHY.
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* The qca8075-package driver uses this for SerDes bring-up sequencing.
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*/
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psgmii-ethphy = <ðphy12>;
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/*
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* psgmii-ethphy points to the last PHY in the QCA8075 package (ethphy12).
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* This is the combo port and serves as the PSGMII calibration PHY.
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* The qca8075-package driver uses this for SerDes bring-up sequencing.
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*/
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psgmii-ethphy = <ðphy12>;
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ports {
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#address-cells = <1>;
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#size-cells = <0>;
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ports {
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#address-cells = <1>;
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#size-cells = <0>;
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swport1: port@1 {
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reg = <1>;
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label = "wan1";
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phy-handle = <ðphy8>;
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phy-mode = "psgmii";
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status = "okay";
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};
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swport1: port@1 {
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reg = <1>;
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label = "wan1";
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phy-handle = <ðphy8>;
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phy-mode = "psgmii";
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status = "okay";
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};
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swport2: port@2 {
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reg = <2>;
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label = "wan2";
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phy-handle = <ðphy9>;
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phy-mode = "psgmii";
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status = "okay";
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};
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swport2: port@2 {
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reg = <2>;
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label = "wan2";
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phy-handle = <ðphy9>;
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phy-mode = "psgmii";
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status = "okay";
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};
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swport3: port@3 {
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reg = <3>;
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label = "lan1";
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phy-handle = <ðphy10>;
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phy-mode = "psgmii";
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status = "okay";
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};
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swport3: port@3 {
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reg = <3>;
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label = "lan1";
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phy-handle = <ðphy10>;
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phy-mode = "psgmii";
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status = "okay";
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};
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swport4: port@4 {
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reg = <4>;
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label = "lan2";
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phy-handle = <ðphy11>;
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phy-mode = "psgmii";
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status = "okay";
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};
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swport4: port@4 {
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reg = <4>;
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label = "lan2";
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phy-handle = <ðphy11>;
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phy-mode = "psgmii";
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status = "okay";
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};
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swport5: port@5 {
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reg = <5>;
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label = "lan3";
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phy-handle = <ðphy12>;
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phy-mode = "psgmii";
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status = "okay";
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};
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/*
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* NO port@6 — valid ESS indices are 0-5 only (num_ports=6).
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* QCA8337 is NOT cascaded here. It lives on gmac1 independently.
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*/
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};
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swport5: port@5 {
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reg = <5>;
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label = "cpu";
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phy-mode = "rgmii";
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status = "okay";
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fixed-link {
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speed = <1000>;
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full-duplex;
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};
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};
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/*
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* NO port@6 — valid ESS indices are 0-5 only (num_ports=6).
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* QCA8337 is NOT cascaded here. It lives on gmac1 independently.
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*/
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};
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};
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&blsp1_spi1 {
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/* 8MB FLASH CHIP (Macronix MX25L6433F SPI NOR 8MB) */
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status = "okay";
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/* 8MB FLASH CHIP (Macronix MX25L6433F SPI NOR 8MB) */
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status = "okay";
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pinctrl-0 = <&spi_0_pinmux>;
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pinctrl-names = "default";
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pinctrl-0 = <&spi_0_pinmux>;
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pinctrl-names = "default";
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cs-gpios = <&tlmm 12 GPIO_ACTIVE_HIGH>;
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cs-gpios = <&tlmm 12 GPIO_ACTIVE_HIGH>;
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flash: flash@0 {
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flash: flash@0 {
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#address-cells = <1>;
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#size-cells = <1>;
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#address-cells = <1>;
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#size-cells = <1>;
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compatible = "mx25l6405d", "jedec,spi-nor";
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compatible = "mx25l6405d", "jedec,spi-nor";
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reg = <0>;
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spi-max-frequency = <24000000>;
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reg = <0>;
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spi-max-frequency = <24000000>;
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partitions {
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compatible = "fixed-partitions";
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#address-cells = <1>;
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#size-cells = <1>;
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partitions {
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compatible = "fixed-partitions";
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#address-cells = <1>;
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#size-cells = <1>;
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sbl1_part: partition@0 {
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label = "SBL1";
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reg = <0x0 0x40000>;
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read-only;
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};
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sbl1_part: partition@0 {
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label = "SBL1";
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reg = <0x0 0x40000>;
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read-only;
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};
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mibib_part: partition@40000 {
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label = "MIBIB";
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reg = <0x40000 0x20000>;
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read-only;
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};
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mibib_part: partition@40000 {
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label = "MIBIB";
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reg = <0x40000 0x20000>;
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read-only;
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};
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qsee_part: partition@60000 {
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label = "QSEE";
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reg = <0x60000 0x60000>;
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read-only;
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};
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qsee_part: partition@60000 {
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label = "QSEE";
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reg = <0x60000 0x60000>;
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read-only;
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};
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cdt_part: partition@c0000 {
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label = "CDT";
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reg = <0xc0000 0x10000>;
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read-only;
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};
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cdt_part: partition@c0000 {
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label = "CDT";
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reg = <0xc0000 0x10000>;
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read-only;
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};
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ddrparams_part: partition@d0000 {
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label = "DDRPARAMS";
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reg = <0xd0000 0x10000>;
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read-only;
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};
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ddrparams_part: partition@d0000 {
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label = "DDRPARAMS";
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reg = <0xd0000 0x10000>;
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read-only;
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};
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appsblenv_part: partition@e0000 {
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label = "APPSBLENV";
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reg = <0xe0000 0x10000>;
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};
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appsblenv_part: partition@e0000 {
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label = "APPSBLENV";
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reg = <0xe0000 0x10000>;
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};
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appsbl_part: partition@f0000 {
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label = "APPSBL";
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reg = <0xf0000 0x80000>;
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read-only;
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};
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appsbl_part: partition@f0000 {
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label = "APPSBL";
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reg = <0xf0000 0x80000>;
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read-only;
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};
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art_part: partition@170000 {
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label = "ART";
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reg = <0x170000 0x10000>;
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read-only;
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};
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};
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};
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art_part: partition@170000 {
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label = "ART";
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reg = <0x170000 0x10000>;
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read-only;
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};
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};
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};
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};
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/* end of &blsp1_spi1 (Macronix MX25L6433F SPI NOR 8MB) */
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/* start of &qpic_bam (for Micron MT29F1G08ABADA NAND 128MB) */
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&qpic_bam {
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status = "okay";
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status = "okay";
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};
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/* end of &qpic_bam (Micron MT29F1G08ABADA NAND 128MB) */
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/* start of &nand (Micron MT29F1G08ABADA NAND 128MB) */
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&nand {
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status = "disabled";
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status = "disabled";
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/delete-property/ pinctrl-0;
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/delete-property/ pinctrl-names;
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nand@0 {
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reg = <0>;
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nand@0 {
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reg = <0>;
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/* Micron MT29F1G08ABADA: 128MB, 8-bit bus, 4-bit ECC */
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nand-ecc-strength = <4>;
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nand-ecc-step-size = <512>;
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nand-bus-width = <8>;
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/* Micron MT29F1G08ABADA: 128MB, 8-bit bus, 4-bit ECC */
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nand-ecc-strength = <4>;
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nand-ecc-step-size = <512>;
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nand-bus-width = <8>;
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partitions {
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compatible = "fixed-partitions";
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#address-cells = <1>;
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#size-cells = <1>;
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partitions {
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compatible = "fixed-partitions";
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#address-cells = <1>;
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#size-cells = <1>;
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/* Primary boot image: kernel + ubi_rootfs UBI volumes */
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rootfs_part: partition@0 {
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label = "rootfs";
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reg = <0x00000000 0x03000000>; /* 48MB */
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};
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/* Primary boot image: kernel + ubi_rootfs UBI volumes */
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rootfs_part: partition@0 {
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label = "rootfs";
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reg = <0x00000000 0x03000000>; /* 48MB */
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};
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/* Secondary/failsafe boot image: kernel + ubi_rootfs UBI volumes */
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rootfs_1_part: partition@3000000 {
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label = "rootfs_1";
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reg = <0x03000000 0x03000000>; /* 48MB */
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};
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/* Secondary/failsafe boot image: kernel + ubi_rootfs UBI volumes */
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rootfs_1_part: partition@3000000 {
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label = "rootfs_1";
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reg = <0x03000000 0x03000000>; /* 48MB */
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};
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/* Persistent config overlay: rootfs_data UBI volume */
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overlay_part: partition@6000000 {
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label = "overlay";
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reg = <0x06000000 0x02000000>; /* 32MB */
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};
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};
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};
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/* Persistent config overlay: rootfs_data UBI volume */
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overlay_part: partition@6000000 {
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label = "overlay";
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reg = <0x06000000 0x02000000>; /* 32MB */
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};
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};
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};
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};
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/* end of &nand (Micron MT29F1G08ABADA NAND 128MB) */
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@ -535,65 +538,65 @@
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/* QCA4019 2GHZ */
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&wifi0 {
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status = "okay";
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qcom,ath10k-calibration-variant = "TEW-829DRU-2G";
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nvmem-cells = <&caldata_art_1000>;
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nvmem-cell-names = "pre-calibration";
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status = "okay";
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qcom,ath10k-calibration-variant = "TEW-829DRU-2G";
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nvmem-cells = <&caldata_art_1000>;
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nvmem-cell-names = "pre-calibration";
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};
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/* QCA4019 5GHZ */
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&wifi1 {
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status = "okay";
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qcom,ath10k-calibration-variant = "TEW-829DRU-5G";
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nvmem-cells = <&caldata_art_5000>;
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nvmem-cell-names = "pre-calibration";
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status = "okay";
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qcom,ath10k-calibration-variant = "TEW-829DRU-5G";
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nvmem-cells = <&caldata_art_5000>;
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nvmem-cell-names = "pre-calibration";
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};
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/* QCA9984 5GHZ */
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&pcie0 {
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status = "okay";
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status = "okay";
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pcie_bridge0: pcie@0 {
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device_type = "pci";
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reg = <0x0 0x0 0x0 0x0 0x0>;
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bus-range = <0x01 0xff>;
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#address-cells = <3>;
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#size-cells = <2>;
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ranges;
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pcie_bridge0: pcie@0 {
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device_type = "pci";
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reg = <0x0 0x0 0x0 0x0 0x0>;
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bus-range = <0x01 0xff>;
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#address-cells = <3>;
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#size-cells = <2>;
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ranges;
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wifi@0,0 {
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compatible = "qcom,ath10k";
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reg = <0x00010000 0 0 0 0>;
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nvmem-cells = <&caldata_art_9000>;
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nvmem-cell-names = "pre-calibration";
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};
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};
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wifi@0,0 {
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compatible = "qcom,ath10k";
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reg = <0x00010000 0 0 0 0>;
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nvmem-cells = <&caldata_art_9000>;
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nvmem-cell-names = "pre-calibration";
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};
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};
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};
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/* ART data / caldata for wifi */
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&art_part {
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compatible = "nvmem-cells";
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#address-cells = <1>;
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#size-cells = <1>;
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compatible = "nvmem-cells";
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#address-cells = <1>;
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#size-cells = <1>;
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macaddr_art_0: macaddr@0 {
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reg = <0x0 0x6>;
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};
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macaddr_art_0: macaddr@0 {
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reg = <0x0 0x6>;
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};
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/* QCA4019 2.4GHz - AHB radio wifi0 */
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caldata_art_1000: caldata@1000 {
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reg = <0x1000 0x2f20>;
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};
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/* QCA4019 2.4GHz - AHB radio wifi0 */
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caldata_art_1000: caldata@1000 {
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reg = <0x1000 0x2f20>;
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};
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/* QCA4019 5GHz - AHB radio wifi1 */
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caldata_art_5000: caldata@5000 {
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reg = <0x5000 0x2f20>;
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};
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/* QCA4019 5GHz - AHB radio wifi1 */
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caldata_art_5000: caldata@5000 {
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reg = <0x5000 0x2f20>;
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};
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/* QCA9984 5GHz - PCIe radio */
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caldata_art_9000: caldata@9000 {
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reg = <0x9000 0x2f20>;
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};
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/* QCA9984 5GHz - PCIe radio */
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caldata_art_9000: caldata@9000 {
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reg = <0x9000 0x2f20>;
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};
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};
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