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realtek: mdio: focus on c22/c45 bits in rtmdio_931x_setup_ctrl()

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The rtmdio_931x_setup_ctrl() function currently initializes the c22/c45
and the proprietary format bit of the controller. This works because of
the order these calls are arranged. Narrow down the update to the really
needed bits.

- c22/c45 (bit 1) is updated here
- standard/proprietary (bit 0) is updated in rtmdio_931x_setup_polling()

Adapt the confusing comment "Std. C45, non-standard is 0x3" it basically
explains the other function.

Signed-off-by: Markus Stockhausen <markus.stockhausen@gmx.de>
Link: https://github.com/openwrt/openwrt/pull/23204
Signed-off-by: Robert Marko <robimarko@gmail.com>
This commit is contained in:
Markus Stockhausen 2026-05-03 16:52:56 +02:00 committed by Robert Marko
parent c0aadd8c13
commit 7eb65cdc83
1 changed files with 9 additions and 6 deletions
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15
target/linux/realtek/files-6.18/drivers/net/mdio/mdio-realtek-otto.c
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@ -800,19 +800,22 @@ static void rtmdio_930x_setup_polling(struct rtmdio_ctrl *ctrl)
static int rtmdio_931x_setup_ctrl(struct rtmdio_ctrl *ctrl)
{
u32 c45_mask = 0;
int ret;
/* Disable polling for configuration purposes */
regmap_write(ctrl->map, RTMDIO_931X_SMI_PORT_POLLING_CTRL, 0);
regmap_write(ctrl->map, RTMDIO_931X_SMI_PORT_POLLING_CTRL + 4, 0);
msleep(100);
/* Define C22/C45 bus feature set */
/* Define C22/C45 bus feature set (bit 1 of SMI_SETx_FMT_SEL) */
for (int smi_bus = 0; smi_bus < ctrl->cfg->num_busses; smi_bus++) {
if (ctrl->bus[smi_bus].is_c45)
c45_mask |= 0x2 << (smi_bus * 2); /* Std. C45, non-standard is 0x3 */
ret = regmap_assign_bits(ctrl->map, RTMDIO_931X_SMI_GLB_CTRL1,
BIT(smi_bus * 2 + 1), ctrl->bus[smi_bus].is_c45);
if (ret)
return ret;
}
return regmap_update_bits(ctrl->map, RTMDIO_931X_SMI_GLB_CTRL1, GENMASK(7, 0), c45_mask);
return 0;
}
static int rtmdio_931x_set_port_ability(struct rtmdio_ctrl *ctrl, u32 pn, u32 ability)
@ -855,7 +858,7 @@ static void rtmdio_931x_setup_polling(struct rtmdio_ctrl *ctrl)
regmap_assign_bits(ctrl->map, RTMDIO_931X_SMI_GLB_CTRL0,
BIT(24 + smi_bus), phyinfo.force_res);
/* polling std. or proprietary format (bit 0 of SMI_SETX_FMT_SEL) */
/* polling std. or proprietary format (bit 0 of SMI_SETx_FMT_SEL) */
regmap_assign_bits(ctrl->map, RTMDIO_931X_SMI_GLB_CTRL1,
BIT(smi_bus * 2), phyinfo.force_res);