From 84233220d39b06dbd2bab0083c6b1271b4b4dd54 Mon Sep 17 00:00:00 2001 From: Jonas Jelonek Date: Mon, 27 Apr 2026 08:13:54 +0000 Subject: [PATCH] realtek: dts: rtl93xx: use macro for PHY port definitions Use SWITCH_PORT_LED instead of full verbose port definitions to simplify and clean up the DTS. Signed-off-by: Jonas Jelonek Link: https://github.com/openwrt/openwrt/pull/23118 Signed-off-by: Hauke Mehrtens --- .../dts/rtl9302_xikestor_sks8300-12e2t2x.dts | 126 ++---------------- .../dts/rtl9303_hasivo_s1100w-8xgt-se.dts | 79 ++--------- 2 files changed, 22 insertions(+), 183 deletions(-) diff --git a/target/linux/realtek/dts/rtl9302_xikestor_sks8300-12e2t2x.dts b/target/linux/realtek/dts/rtl9302_xikestor_sks8300-12e2t2x.dts index cc205289b9..39167f2f08 100644 --- a/target/linux/realtek/dts/rtl9302_xikestor_sks8300-12e2t2x.dts +++ b/target/linux/realtek/dts/rtl9302_xikestor_sks8300-12e2t2x.dts @@ -186,121 +186,23 @@ #address-cells = <1>; #size-cells = <0>; - port@0 { - reg = <0>; - label = "lan2"; - led-set = <0>; - pcs-handle = <&serdes2>; - phy-handle = <&phy0>; - phy-mode = "10g-qxgmii"; - }; - port@1 { - reg = <1>; - label = "lan1"; - led-set = <0>; - pcs-handle = <&serdes2>; - phy-handle = <&phy1>; - phy-mode = "10g-qxgmii"; - }; - port@2 { - reg = <2>; - label = "lan4"; - led-set = <0>; - pcs-handle = <&serdes2>; - phy-handle = <&phy2>; - phy-mode = "10g-qxgmii"; - }; - port@3 { - reg = <3>; - label = "lan3"; - led-set = <0>; - pcs-handle = <&serdes2>; - phy-handle = <&phy3>; - phy-mode = "10g-qxgmii"; - }; + SWITCH_PORT_LED(0, 2, 2, 0, 10g-qxgmii) + SWITCH_PORT_LED(1, 1, 2, 0, 10g-qxgmii) + SWITCH_PORT_LED(2, 4, 2, 0, 10g-qxgmii) + SWITCH_PORT_LED(3, 3, 2, 0, 10g-qxgmii) - port@8 { - reg = <8>; - label = "lan6"; - led-set = <0>; - pcs-handle = <&serdes3>; - phy-handle = <&phy8>; - phy-mode = "10g-qxgmii"; - }; - port@9 { - reg = <9>; - label = "lan5"; - led-set = <0>; - pcs-handle = <&serdes3>; - phy-handle = <&phy9>; - phy-mode = "10g-qxgmii"; - }; - port@10 { - reg = <10>; - label = "lan8"; - led-set = <0>; - pcs-handle = <&serdes3>; - phy-handle = <&phy10>; - phy-mode = "10g-qxgmii"; - }; - port@11 { - reg = <11>; - label = "lan7"; - led-set = <0>; - pcs-handle = <&serdes3>; - phy-handle = <&phy11>; - phy-mode = "10g-qxgmii"; - }; + SWITCH_PORT_LED(8, 6, 3, 0, 10g-qxgmii) + SWITCH_PORT_LED(9, 5, 3, 0, 10g-qxgmii) + SWITCH_PORT_LED(10, 8, 3, 0, 10g-qxgmii) + SWITCH_PORT_LED(11, 7, 3, 0, 10g-qxgmii) - port@16 { - reg = <16>; - label = "lan10"; - led-set = <0>; - pcs-handle = <&serdes4>; - phy-handle = <&phy16>; - phy-mode = "10g-qxgmii"; - }; - port@17 { - reg = <17>; - label = "lan9"; - led-set = <0>; - pcs-handle = <&serdes4>; - phy-handle = <&phy17>; - phy-mode = "10g-qxgmii"; - }; - port@18 { - reg = <18>; - label = "lan12"; - led-set = <0>; - pcs-handle = <&serdes4>; - phy-handle = <&phy18>; - phy-mode = "10g-qxgmii"; - }; - port@19 { - reg = <19>; - label = "lan11"; - led-set = <0>; - pcs-handle = <&serdes4>; - phy-handle = <&phy19>; - phy-mode = "10g-qxgmii"; - }; + SWITCH_PORT_LED(16, 10, 4, 0, 10g-qxgmii) + SWITCH_PORT_LED(17, 9, 4, 0, 10g-qxgmii) + SWITCH_PORT_LED(18, 12, 4, 0, 10g-qxgmii) + SWITCH_PORT_LED(19, 11, 4, 0, 10g-qxgmii) - port@24 { - reg = <24>; - label = "lan13"; - led-set = <1>; - pcs-handle = <&serdes6>; - phy-handle = <&phy24>; - phy-mode = "usxgmii"; - }; - port@25 { - reg = <25>; - label = "lan14"; - led-set = <1>; - pcs-handle = <&serdes7>; - phy-handle = <&phy25>; - phy-mode = "usxgmii"; - }; + SWITCH_PORT_LED(24, 13, 6, 1, usxgmii) + SWITCH_PORT_LED(25, 14, 7, 1, usxgmii) SWITCH_PORT_SFP(26, 15, 8, 1, 0) SWITCH_PORT_SFP(27, 16, 9, 1, 1) diff --git a/target/linux/realtek/dts/rtl9303_hasivo_s1100w-8xgt-se.dts b/target/linux/realtek/dts/rtl9303_hasivo_s1100w-8xgt-se.dts index 6c1bb9f469..902f98e253 100644 --- a/target/linux/realtek/dts/rtl9303_hasivo_s1100w-8xgt-se.dts +++ b/target/linux/realtek/dts/rtl9303_hasivo_s1100w-8xgt-se.dts @@ -149,77 +149,14 @@ #address-cells = <1>; #size-cells = <0>; - port@0 { - reg = <0>; - label = "lan1"; - pcs-handle = <&serdes2>; - phy-handle = <&phy0>; - phy-mode = "usxgmii"; - led-set = <0>; - }; - - port@8 { - reg = <8>; - label = "lan2"; - pcs-handle = <&serdes3>; - phy-handle = <&phy8>; - phy-mode = "usxgmii"; - led-set = <0>; - }; - - port@16 { - reg = <16>; - label = "lan3"; - pcs-handle = <&serdes4>; - phy-handle = <&phy16>; - phy-mode = "usxgmii"; - led-set = <0>; - }; - - port@20 { - reg = <20>; - label = "lan4"; - pcs-handle = <&serdes5>; - phy-handle = <&phy20>; - phy-mode = "usxgmii"; - led-set = <0>; - }; - - port@24 { - reg = <24>; - label = "lan5"; - pcs-handle = <&serdes6>; - phy-handle = <&phy24>; - phy-mode = "usxgmii"; - led-set = <0>; - }; - - port@25 { - reg = <25>; - label = "lan6"; - pcs-handle = <&serdes7>; - phy-handle = <&phy25>; - phy-mode = "usxgmii"; - led-set = <0>; - }; - - port@26 { - reg = <26>; - label = "lan7"; - pcs-handle = <&serdes8>; - phy-handle = <&phy26>; - phy-mode = "usxgmii"; - led-set = <0>; - }; - - port@27 { - reg = <27>; - label = "lan8"; - pcs-handle = <&serdes9>; - phy-handle = <&phy27>; - phy-mode = "usxgmii"; - led-set = <0>; - }; + SWITCH_PORT_LED(0, 1, 2, 0, usxgmii) + SWITCH_PORT_LED(8, 2, 3, 0, usxgmii) + SWITCH_PORT_LED(16, 3, 4, 0, usxgmii) + SWITCH_PORT_LED(20, 4, 5, 0, usxgmii) + SWITCH_PORT_LED(24, 5, 6, 0, usxgmii) + SWITCH_PORT_LED(25, 6, 7, 0, usxgmii) + SWITCH_PORT_LED(26, 7, 8, 0, usxgmii) + SWITCH_PORT_LED(27, 8, 9, 0, usxgmii) /* Internal SoC */ port@28 {