ipq806x: dts: reuse default PCIe bridge nodes

The default PCIe bridge nodes have been added upstream[1]. Remove
duplicate PCIe bridge definitions to simplify the device dts.

[1] https://git.kernel.org/pub/scm/linux/kernel/git/stable/linux.git/commit/?h=linux-6.12.y&id=0c4d19b125401957123989a25094972cf0e77670

Signed-off-by: Shiji Yang <yangshiji66@outlook.com>
Link: https://github.com/openwrt/openwrt/pull/18989
Signed-off-by: Christian Marangi <ansuelsmth@gmail.com>
This commit is contained in:
Shiji Yang 2025-06-01 12:36:06 +08:00 committed by Christian Marangi
parent 6bc9ebc31d
commit b56c773176
WARNING! Although there is a key with this ID in the database it does not verify this commit! This commit is SUSPICIOUS.
GPG Key ID: AC001D09ADBFEAD7
19 changed files with 258 additions and 488 deletions

View File

@ -398,45 +398,31 @@
&pcie0 {
status = "okay";
};
bridge@0,0 {
reg = <0x00000000 0 0 0 0>;
#address-cells = <3>;
#size-cells = <2>;
ranges;
wifi@1,0 {
compatible = "qcom,ath10k";
reg = <0x00010000 0 0 0 0>;
qcom,ath10k-calibration-variant = "NEC-Platforms-WG2600HP3";
nvmem-cells = <&macaddr_PRODUCTDATA_12>, <&precal_ART_1000>;
nvmem-cell-names = "mac-address", "pre-calibration";
};
&pcie_bridge0 {
wifi@1,0 {
compatible = "qcom,ath10k";
reg = <0x00010000 0 0 0 0>;
nvmem-cells = <&macaddr_PRODUCTDATA_12>, <&precal_ART_1000>;
nvmem-cell-names = "mac-address", "pre-calibration";
qcom,ath10k-calibration-variant = "NEC-Platforms-WG2600HP3";
};
};
&pcie1 {
status = "okay";
force_gen1 = <1>;
};
bridge@0,0 {
reg = <0x00000000 0 0 0 0>;
#address-cells = <3>;
#size-cells = <2>;
ranges;
wifi@1,0 {
compatible = "qcom,ath10k";
reg = <0x00010000 0 0 0 0>;
ieee80211-freq-limit = <2400000 2483000>;
qcom,ath10k-calibration-variant = "NEC-Platforms-WG2600HP3";
nvmem-cells = <&macaddr_PRODUCTDATA_c>, <&precal_ART_5000>;
nvmem-cell-names = "mac-address", "pre-calibration";
};
&pcie_bridge1 {
wifi@1,0 {
compatible = "qcom,ath10k";
reg = <0x00010000 0 0 0 0>;
ieee80211-freq-limit = <2400000 2483000>;
nvmem-cells = <&macaddr_PRODUCTDATA_c>, <&precal_ART_5000>;
nvmem-cell-names = "mac-address", "pre-calibration";
qcom,ath10k-calibration-variant = "NEC-Platforms-WG2600HP3";
};
};

View File

@ -313,40 +313,28 @@
&pcie0 {
status = "okay";
};
bridge@0,0 {
reg = <0x00000000 0 0 0 0>;
#address-cells = <3>;
#size-cells = <2>;
ranges;
wifi@1,0 {
compatible = "qcom,ath10k";
reg = <0x00010000 0 0 0 0>;
nvmem-cells = <&macaddr_defaultmac_8 (-1)>, <&precal_radio_1000>;
nvmem-cell-names = "mac-address", "pre-calibration";
};
&pcie_bridge0 {
wifi@1,0 {
compatible = "qcom,ath10k";
reg = <0x00010000 0 0 0 0>;
nvmem-cells = <&macaddr_defaultmac_8 (-1)>, <&precal_radio_1000>;
nvmem-cell-names = "mac-address", "pre-calibration";
};
};
&pcie1 {
status = "okay";
max-link-speed = <1>;
};
bridge@0,0 {
reg = <0x00000000 0 0 0 0>;
#address-cells = <3>;
#size-cells = <2>;
ranges;
wifi@1,0 {
compatible = "qcom,ath10k";
reg = <0x00010000 0 0 0 0>;
nvmem-cells = <&macaddr_defaultmac_8 0>, <&precal_radio_5000>;
nvmem-cell-names = "mac-address", "pre-calibration";
};
&pcie_bridge1 {
wifi@1,0 {
compatible = "qcom,ath10k";
reg = <0x00010000 0 0 0 0>;
nvmem-cells = <&macaddr_defaultmac_8 0>, <&precal_radio_5000>;
nvmem-cell-names = "mac-address", "pre-calibration";
};
};

View File

@ -204,20 +204,14 @@
reset-gpios = <&qcom_pinmux 3 GPIO_ACTIVE_HIGH>;
pinctrl-0 = <&pcie0_pins>;
pinctrl-names = "default";
};
bridge@0,0 {
reg = <0x00000000 0 0 0 0>;
#address-cells = <3>;
#size-cells = <2>;
ranges;
wifi@1,0 {
compatible = "qcom,ath10k";
reg = <0x00010000 0 0 0 0>;
nvmem-cells = <&macaddr_art_6 1>, <&precal_art_1000>;
nvmem-cell-names = "mac-address", "pre-calibration";
};
&pcie_bridge0 {
wifi@1,0 {
compatible = "qcom,ath10k";
reg = <0x00010000 0 0 0 0>;
nvmem-cells = <&macaddr_art_6 1>, <&precal_art_1000>;
nvmem-cell-names = "mac-address", "pre-calibration";
};
};
@ -227,20 +221,14 @@
pinctrl-0 = <&pcie1_pins>;
pinctrl-names = "default";
max-link-speed = <1>;
};
bridge@0,0 {
reg = <0x00000000 0 0 0 0>;
#address-cells = <3>;
#size-cells = <2>;
ranges;
wifi@1,0 {
compatible = "qcom,ath10k";
reg = <0x00010000 0 0 0 0>;
nvmem-cells = <&macaddr_art_6 2>, <&precal_art_5000>;
nvmem-cell-names = "mac-address", "pre-calibration";
};
&pcie_bridge1 {
wifi@1,0 {
compatible = "qcom,ath10k";
reg = <0x00010000 0 0 0 0>;
nvmem-cells = <&macaddr_art_6 2>, <&precal_art_5000>;
nvmem-cell-names = "mac-address", "pre-calibration";
};
};

View File

@ -52,37 +52,27 @@
status = "okay";
max-link-speed = <1>;
};
bridge@0,0 {
reg = <0x00000000 0 0 0 0>;
#address-cells = <3>;
#size-cells = <2>;
ranges;
wifi@1,0 {
compatible = "qcom,ath10k";
reg = <0x00010000 0 0 0 0>;
nvmem-cells = <&precal_art_1000>;
nvmem-cell-names = "pre-calibration";
};
&pcie_bridge0 {
wifi@0,0 {
compatible = "qcom,ath10k";
reg = <0x10000 0 0 0 0>;
nvmem-cells = <&precal_art_1000>;
nvmem-cell-names = "pre-calibration";
};
};
&pcie1 {
status = "okay";
};
bridge@0,0 {
reg = <0x00000000 0 0 0 0>;
#address-cells = <3>;
#size-cells = <2>;
ranges;
wifi@1,0 {
compatible = "qcom,ath10k";
reg = <0x00010000 0 0 0 0>;
nvmem-cells = <&precal_art_5000>;
nvmem-cell-names = "pre-calibration";
};
&pcie_bridge1 {
wifi@0,0 {
compatible = "qcom,ath10k";
reg = <0x10000 0 0 0 0>;
nvmem-cells = <&precal_art_5000>;
nvmem-cell-names = "pre-calibration";
};
};

View File

@ -341,20 +341,14 @@
&pcie0 {
status = "okay";
};
bridge@0,0 {
reg = <0x00000000 0 0 0 0>;
#address-cells = <3>;
#size-cells = <2>;
ranges;
wifi@1,0 {
compatible = "qcom,ath10k";
reg = <0x00010000 0 0 0 0>;
nvmem-cells = <&macaddr_appsbl_7ff80 8>;
nvmem-cell-names = "mac-address";
};
&pcie_bridge0 {
wifi@1,0 {
compatible = "qcom,ath10k";
reg = <0x00010000 0 0 0 0>;
nvmem-cells = <&macaddr_appsbl_7ff80 8>;
nvmem-cell-names = "mac-address";
};
};
@ -362,20 +356,14 @@
status = "okay";
max-link-speed = <1>;
};
bridge@0,0 {
reg = <0x00000000 0 0 0 0>;
#address-cells = <3>;
#size-cells = <2>;
ranges;
wifi@1,0 {
compatible = "qcom,ath10k";
reg = <0x00010000 0 0 0 0>;
nvmem-cells = <&macaddr_appsbl_7ff80 16>;
nvmem-cell-names = "mac-address";
};
&pcie_bridge1 {
wifi@1,0 {
compatible = "qcom,ath10k";
reg = <0x00010000 0 0 0 0>;
nvmem-cells = <&macaddr_appsbl_7ff80 16>;
nvmem-cell-names = "mac-address";
};
};

View File

@ -285,35 +285,25 @@
&pcie0 {
status = "okay";
};
bridge@0,0 {
reg = <0x00000000 0 0 0 0>;
#address-cells = <3>;
#size-cells = <2>;
ranges;
wifi5g: wifi@1,0 {
reg = <0x00010000 0 0 0 0>;
compatible = "qcom,ath10k";
qcom,ath10k-calibration-variant = "ASRock-G10";
};
&pcie_bridge0 {
wifi@1,0 {
compatible = "qcom,ath10k";
reg = <0x00010000 0 0 0 0>;
qcom,ath10k-calibration-variant = "ASRock-G10";
};
};
&pcie1 {
status = "okay";
};
bridge@0,0 {
reg = <0x00000000 0 0 0 0>;
#address-cells = <3>;
#size-cells = <2>;
ranges;
wifi2g: wifi@1,0 {
reg = <0x00010000 0 0 0 0>;
compatible = "qcom,ath10k";
qcom,ath10k-calibration-variant = "ASRock-G10";
};
&pcie_bridge1 {
wifi@1,0 {
compatible = "qcom,ath10k";
reg = <0x00010000 0 0 0 0>;
qcom,ath10k-calibration-variant = "ASRock-G10";
};
};

View File

@ -207,20 +207,14 @@
reset-gpios = <&qcom_pinmux 3 GPIO_ACTIVE_LOW>;
pinctrl-0 = <&pcie0_pins>;
pinctrl-names = "default";
};
bridge@0,0 {
reg = <0x00000000 0 0 0 0>;
#address-cells = <3>;
#size-cells = <2>;
ranges;
wifi@1,0 {
compatible = "qcom,ath10k";
reg = <0x00010000 0 0 0 0>;
nvmem-cells = <&macaddr_art_6 1>, <&precal_art_1000>;
nvmem-cell-names = "mac-address", "pre-calibration";
};
&pcie_bridge0 {
wifi@1,0 {
compatible = "qcom,ath10k";
reg = <0x00010000 0 0 0 0>;
nvmem-cells = <&macaddr_art_6 1>, <&precal_art_1000>;
nvmem-cell-names = "mac-address", "pre-calibration";
};
};
@ -230,20 +224,14 @@
pinctrl-0 = <&pcie1_pins>;
pinctrl-names = "default";
max-link-speed = <1>;
};
bridge@0,0 {
reg = <0x00000000 0 0 0 0>;
#address-cells = <3>;
#size-cells = <2>;
ranges;
wifi@1,0 {
compatible = "qcom,ath10k";
reg = <0x00010000 0 0 0 0>;
nvmem-cells = <&macaddr_art_6 2>, <&precal_art_5000>;
nvmem-cell-names = "mac-address", "pre-calibration";
};
&pcie_bridge1 {
wifi@1,0 {
compatible = "qcom,ath10k";
reg = <0x00010000 0 0 0 0>;
nvmem-cells = <&macaddr_art_6 2>, <&precal_art_5000>;
nvmem-cell-names = "mac-address", "pre-calibration";
};
};

View File

@ -287,39 +287,27 @@
&pcie0 {
status = "okay";
};
bridge@0,0 {
reg = <0x00000000 0 0 0 0>;
#address-cells = <3>;
#size-cells = <2>;
ranges;
wifi@1,0 {
compatible = "qcom,ath10k";
reg = <0x00010000 0 0 0 0>;
nvmem-cells = <&macaddr_eeprom_6 1>;
nvmem-cell-names = "mac-address";
};
&pcie_bridge0 {
wifi@0,0 {
compatible = "qcom,ath10k";
reg = <0x10000 0 0 0 0>;
nvmem-cells = <&macaddr_eeprom_6 1>;
nvmem-cell-names = "mac-address";
};
};
&pcie1 {
status = "okay";
};
bridge@0,0 {
reg = <0x00000000 0 0 0 0>;
#address-cells = <3>;
#size-cells = <2>;
ranges;
wifi@1,0 {
compatible = "qcom,ath10k";
reg = <0x00010000 0 0 0 0>;
nvmem-cells = <&macaddr_eeprom_6 2>;
nvmem-cell-names = "mac-address";
};
&pcie_bridge1 {
wifi@0,0 {
compatible = "qcom,ath10k";
reg = <0x10000 0 0 0 0>;
nvmem-cells = <&macaddr_eeprom_6 2>;
nvmem-cell-names = "mac-address";
};
};

View File

@ -341,40 +341,28 @@
&pcie0 {
status = "okay";
};
bridge@0,0 {
reg = <0x00000000 0 0 0 0>;
#address-cells = <3>;
#size-cells = <2>;
ranges;
wifi@1,0 {
compatible = "qcom,ath10k";
reg = <0x00010000 0 0 0 0>;
nvmem-cells = <&macaddr_defaultmac_0 (-1)>, <&precal_ART_1000>;
nvmem-cell-names = "mac-address", "pre-calibration";
};
&pcie_bridge0 {
wifi@1,0 {
compatible = "qcom,ath10k";
reg = <0x00010000 0 0 0 0>;
nvmem-cells = <&macaddr_defaultmac_0 (-1)>, <&precal_ART_1000>;
nvmem-cell-names = "mac-address", "pre-calibration";
};
};
&pcie1 {
status = "okay";
max-link-speed = <1>;
};
bridge@0,0 {
reg = <0x00000000 0 0 0 0>;
#address-cells = <3>;
#size-cells = <2>;
ranges;
wifi@1,0 {
compatible = "qcom,ath10k";
reg = <0x00010000 0 0 0 0>;
nvmem-cells = <&macaddr_defaultmac_0 0>, <&precal_ART_5000>;
nvmem-cell-names = "mac-address", "pre-calibration";
};
&pcie_bridge1 {
wifi@1,0 {
compatible = "qcom,ath10k";
reg = <0x00010000 0 0 0 0>;
nvmem-cells = <&macaddr_defaultmac_0 0>, <&precal_ART_5000>;
nvmem-cell-names = "mac-address", "pre-calibration";
};
};

View File

@ -458,40 +458,28 @@ switch@10 {
&pcie0 {
status = "okay";
};
bridge@0,0 {
reg = <0x00000000 0 0 0 0>;
#address-cells = <3>;
#size-cells = <2>;
ranges;
wifi@1,0 {
compatible = "qcom,ath10k";
reg = <0x00010000 0 0 0 0>;
nvmem-cells = <&macaddr_PRODUCTDATA_12>, <&precal_ART_1000>;
nvmem-cell-names = "mac-address", "pre-calibration";
};
&pcie_bridge0 {
wifi@1,0 {
compatible = "qcom,ath10k";
reg = <0x00010000 0 0 0 0>;
nvmem-cells = <&macaddr_PRODUCTDATA_12>, <&precal_ART_1000>;
nvmem-cell-names = "mac-address", "pre-calibration";
};
};
&pcie1 {
status = "okay";
max-link-speed = <1>;
};
bridge@0,0 {
reg = <0x00000000 0 0 0 0>;
#address-cells = <3>;
#size-cells = <2>;
ranges;
wifi@1,0 {
compatible = "qcom,ath10k";
reg = <0x00010000 0 0 0 0>;
nvmem-cells = <&macaddr_PRODUCTDATA_c>, <&precal_ART_5000>;
nvmem-cell-names = "mac-address", "pre-calibration";
};
&pcie_bridge1 {
wifi@1,0 {
compatible = "qcom,ath10k";
reg = <0x00010000 0 0 0 0>;
nvmem-cells = <&macaddr_PRODUCTDATA_c>, <&precal_ART_5000>;
nvmem-cell-names = "mac-address", "pre-calibration";
};
};

View File

@ -519,40 +519,28 @@
&pcie0 {
status = "okay";
};
bridge@0,0 {
reg = <0x00000000 0 0 0 0>;
#address-cells = <3>;
#size-cells = <2>;
ranges;
wifi@1,0 {
compatible = "qcom,ath10k";
reg = <0x00010000 0 0 0 0>;
nvmem-cells = <&macaddr_ART_1e>, <&precal_ART_1000>;
nvmem-cell-names = "mac-address", "pre-calibration";
};
&pcie_bridge0 {
wifi@1,0 {
compatible = "qcom,ath10k";
reg = <0x00010000 0 0 0 0>;
nvmem-cells = <&macaddr_ART_1e>, <&precal_ART_1000>;
nvmem-cell-names = "mac-address", "pre-calibration";
};
};
&pcie1 {
status = "okay";
max-link-speed = <1>;
};
bridge@0,0 {
reg = <0x00000000 0 0 0 0>;
#address-cells = <3>;
#size-cells = <2>;
ranges;
wifi@1,0 {
compatible = "qcom,ath10k";
reg = <0x00010000 0 0 0 0>;
nvmem-cells = <&macaddr_ART_18>, <&precal_ART_5000>;
nvmem-cell-names = "mac-address", "pre-calibration";
};
&pcie_bridge1 {
wifi@1,0 {
compatible = "qcom,ath10k";
reg = <0x00010000 0 0 0 0>;
nvmem-cells = <&macaddr_ART_18>, <&precal_ART_5000>;
nvmem-cell-names = "mac-address", "pre-calibration";
};
};

View File

@ -196,19 +196,13 @@
/delete-property/ pinctrl-0;
/delete-property/ pinctrl-names;
/delete-property/ perst-gpios;
};
bridge@0,0 {
reg = <0x00000000 0 0 0 0>;
#address-cells = <3>;
#size-cells = <2>;
ranges;
wifi@1,0 {
compatible = "qcom,ath10k";
status = "okay";
reg = <0x00010000 0 0 0 0>;
qcom,ath10k-calibration-variant = "Nokia-AC400i";
};
&pcie_bridge0 {
wifi@1,0 {
compatible = "qcom,ath10k";
reg = <0x00010000 0 0 0 0>;
qcom,ath10k-calibration-variant = "Nokia-AC400i";
};
};
@ -218,19 +212,13 @@
/delete-property/ pinctrl-0;
/delete-property/ pinctrl-names;
/delete-property/ perst-gpios;
};
bridge@0,0 {
reg = <0x00000000 0 0 0 0>;
#address-cells = <3>;
#size-cells = <2>;
ranges;
wifi@1,0 {
compatible = "qcom,ath10k";
status = "okay";
reg = <0x00010000 0 0 0 0>;
qcom,ath10k-calibration-variant = "Nokia-AC400i";
};
&pcie_bridge1 {
wifi@1,0 {
compatible = "qcom,ath10k";
reg = <0x00010000 0 0 0 0>;
qcom,ath10k-calibration-variant = "Nokia-AC400i";
};
};

View File

@ -540,17 +540,12 @@
&pcie0 {
status = "okay";
};
bridge@0,0 {
reg = <0x00000000 0 0 0 0>;
#address-cells = <3>;
#size-cells = <2>;
ranges;
wifi0: wifi@1,0 {
compatible = "qcom,ath10k";
reg = <0x00010000 0 0 0 0>;
};
&pcie_bridge0 {
wifi0: wifi@1,0 {
compatible = "qcom,ath10k";
reg = <0x00010000 0 0 0 0>;
};
};
@ -558,16 +553,11 @@
status = "okay";
max-link-speed = <1>;
};
bridge@0,0 {
reg = <0x00000000 0 0 0 0>;
#address-cells = <3>;
#size-cells = <2>;
ranges;
wifi1: wifi@1,0 {
compatible = "qcom,ath10k";
reg = <0x00010000 0 0 0 0>;
};
&pcie_bridge1 {
wifi1: wifi@1,0 {
compatible = "qcom,ath10k";
reg = <0x00010000 0 0 0 0>;
};
};

View File

@ -578,20 +578,14 @@
reset-gpios = <&qcom_pinmux 3 GPIO_ACTIVE_HIGH>;
pinctrl-0 = <&pcie0_pins>;
pinctrl-names = "default";
};
bridge@0,0 {
reg = <0x00000000 0 0 0 0>;
#address-cells = <3>;
#size-cells = <2>;
ranges;
wifi0: wifi@1,0 {
compatible = "qcom,ath10k";
reg = <0x00010000 0 0 0 0>;
nvmem-cells = <&precal_ART_1000>;
nvmem-cell-names = "pre-calibration";
};
&pcie_bridge0 {
wifi@1,0 {
compatible = "qcom,ath10k";
reg = <0x00010000 0 0 0 0>;
nvmem-cells = <&precal_ART_1000>;
nvmem-cell-names = "pre-calibration";
};
};
@ -601,19 +595,13 @@
pinctrl-0 = <&pcie1_pins>;
pinctrl-names = "default";
max-link-speed = <1>;
};
bridge@0,0 {
reg = <0x00000000 0 0 0 0>;
#address-cells = <3>;
#size-cells = <2>;
ranges;
wifi1: wifi@1,0 {
compatible = "qcom,ath10k";
reg = <0x00010000 0 0 0 0>;
nvmem-cells = <&precal_ART_5000>;
nvmem-cell-names = "pre-calibration";
};
&pcie_bridge1 {
wifi@1,0 {
compatible = "qcom,ath10k";
reg = <0x00010000 0 0 0 0>;
nvmem-cells = <&precal_ART_5000>;
nvmem-cell-names = "pre-calibration";
};
};

View File

@ -476,20 +476,14 @@
reset-gpios = <&qcom_pinmux 3 GPIO_ACTIVE_HIGH>;
pinctrl-0 = <&pcie0_pins>;
pinctrl-names = "default";
};
bridge@0,0 {
reg = <0x00000000 0 0 0 0>;
#address-cells = <3>;
#size-cells = <2>;
ranges;
wifi0: wifi@1,0 {
compatible = "qcom,ath10k";
reg = <0x00010000 0 0 0 0>;
nvmem-cells = <&precal_ART_1000>, <&macaddr_fw_env_12>;
nvmem-cell-names = "pre-calibration", "mac-address";
};
&pcie_bridge0 {
wifi@1,0 {
compatible = "qcom,ath10k";
reg = <0x00010000 0 0 0 0>;
nvmem-cells = <&precal_ART_1000>, <&macaddr_fw_env_12>;
nvmem-cell-names = "pre-calibration", "mac-address";
};
};
@ -499,19 +493,13 @@
pinctrl-0 = <&pcie1_pins>;
pinctrl-names = "default";
max-link-speed = <1>;
};
bridge@0,0 {
reg = <0x00000000 0 0 0 0>;
#address-cells = <3>;
#size-cells = <2>;
ranges;
wifi1: wifi@1,0 {
compatible = "qcom,ath10k";
reg = <0x00010000 0 0 0 0>;
nvmem-cells = <&precal_ART_5000>, <&macaddr_fw_env_c>;
nvmem-cell-names = "pre-calibration", "mac-address";
};
&pcie_bridge1 {
wifi@1,0 {
compatible = "qcom,ath10k";
reg = <0x00010000 0 0 0 0>;
nvmem-cells = <&precal_ART_5000>, <&macaddr_fw_env_c>;
nvmem-cell-names = "pre-calibration", "mac-address";
};
};

View File

@ -255,18 +255,12 @@
/delete-property/ pinctrl-0;
/delete-property/ pinctrl-names;
};
bridge@0,0 {
reg = <0x00000000 0 0 0 0>;
#address-cells = <3>;
#size-cells = <2>;
ranges;
wifi@1,0 {
compatible = "qcom,ath10k";
status = "okay";
reg = <0x00010000 0 0 0 0>;
};
&pcie_bridge0 {
wifi@1,0 {
compatible = "qcom,ath10k";
reg = <0x00010000 0 0 0 0>;
};
};
@ -275,18 +269,12 @@
/delete-property/ pinctrl-0;
/delete-property/ pinctrl-names;
};
bridge@0,0 {
reg = <0x00000000 0 0 0 0>;
#address-cells = <3>;
#size-cells = <2>;
ranges;
wifi@1,0 {
compatible = "qcom,ath10k";
status = "okay";
reg = <0x00010000 0 0 0 0>;
};
&pcie_bridge1 {
wifi@1,0 {
compatible = "qcom,ath10k";
reg = <0x00010000 0 0 0 0>;
};
};

View File

@ -72,52 +72,34 @@
&pcie0 {
status = "okay";
};
bridge@0,0 {
reg = <0x0 0 0 0 0>;
#address-cells = <3>;
#size-cells = <2>;
ranges;
wifi0: wifi@1,0 {
compatible = "qcom,ath10k";
status = "okay";
reg = <0x10000 0 0 0 0>;
};
&pcie_bridge0 {
wifi0: wifi@1,0 {
compatible = "qcom,ath10k";
reg = <0x00010000 0 0 0 0>;
};
};
&pcie1 {
status = "okay";
};
bridge@0,0 {
reg = <0x0 0 0 0 0>;
#address-cells = <3>;
#size-cells = <2>;
ranges;
wifi1: wifi@1,0 {
compatible = "qcom,ath10k";
status = "okay";
reg = <0x10000 0 0 0 0>;
};
&pcie_bridge1 {
wifi1: wifi@1,0 {
compatible = "qcom,ath10k";
reg = <0x00010000 0 0 0 0>;
};
};
&pcie2 {
status = "okay";
};
bridge@0,0 {
reg = <0x0 0 0 0 0>;
#address-cells = <3>;
#size-cells = <2>;
ranges;
wifi2: wifi@1,0 {
compatible = "qcom,ath10k";
status = "okay";
reg = <0x10000 0 0 0 0>;
};
&pcie_bridge2 {
wifi2: wifi@1,0 {
compatible = "qcom,ath10k";
reg = <0x00010000 0 0 0 0>;
};
};

View File

@ -229,19 +229,13 @@
/delete-property/ pinctrl-0;
/delete-property/ pinctrl-names;
/delete-property/ perst-gpios;
};
bridge@0,0 {
reg = <0x00000000 0 0 0 0>;
#address-cells = <3>;
#size-cells = <2>;
ranges;
wifi@1,0 {
compatible = "qcom,ath10k";
status = "okay";
reg = <0x00010000 0 0 0 0>;
qcom,ath10k-calibration-variant = "Edgecore-ECW5410-L";
};
&pcie_bridge0 {
wifi@1,0 {
compatible = "qcom,ath10k";
reg = <0x00010000 0 0 0 0>;
qcom,ath10k-calibration-variant = "Edgecore-ECW5410-L";
};
};
@ -251,19 +245,13 @@
/delete-property/ pinctrl-0;
/delete-property/ pinctrl-names;
/delete-property/ perst-gpios;
};
bridge@0,0 {
reg = <0x00000000 0 0 0 0>;
#address-cells = <3>;
#size-cells = <2>;
ranges;
wifi@1,0 {
compatible = "qcom,ath10k";
status = "okay";
reg = <0x00010000 0 0 0 0>;
qcom,ath10k-calibration-variant = "Edgecore-ECW5410-L";
};
&pcie_bridge1 {
wifi@1,0 {
compatible = "qcom,ath10k";
reg = <0x00010000 0 0 0 0>;
qcom,ath10k-calibration-variant = "Edgecore-ECW5410-L";
};
};

View File

@ -200,41 +200,29 @@
&pcie1 {
status = "okay";
};
bridge@0,0 {
reg = <0x00000000 0 0 0 0>;
#address-cells = <3>;
#size-cells = <2>;
ranges;
wifi@1,0 {
compatible = "qcom,ath10k";
status = "okay";
reg = <0x00010000 0 0 0 0>;
qcom,ath10k-calibration-variant = "IgniteNet-SS-W2-AC2600";
nvmem-cells = <&precal_art_1000>;
nvmem-cell-names = "pre-calibration";
};
&pcie_bridge1 {
wifi@1,0 {
compatible = "qcom,ath10k";
reg = <0x00010000 0 0 0 0>;
qcom,ath10k-calibration-variant = "IgniteNet-SS-W2-AC2600";
nvmem-cells = <&precal_art_1000>;
nvmem-cell-names = "pre-calibration";
};
};
&pcie2 {
status = "okay";
};
bridge@0,0 {
reg = <0x00000000 0 0 0 0>;
#address-cells = <3>;
#size-cells = <2>;
ranges;
wifi@1,0 {
compatible = "qcom,ath10k";
status = "okay";
reg = <0x00010000 0 0 0 0>;
qcom,ath10k-calibration-variant = "IgniteNet-SS-W2-AC2600";
nvmem-cells = <&precal_art_5000>;
nvmem-cell-names = "pre-calibration";
};
&pcie_bridge2 {
wifi@1,0 {
compatible = "qcom,ath10k";
reg = <0x00010000 0 0 0 0>;
qcom,ath10k-calibration-variant = "IgniteNet-SS-W2-AC2600";
nvmem-cells = <&precal_art_5000>;
nvmem-cell-names = "pre-calibration";
};
};