diff --git a/target/linux/realtek/base-files/lib/upgrade/platform.sh b/target/linux/realtek/base-files/lib/upgrade/platform.sh index 27bc0ba8dc..cddf5315b7 100644 --- a/target/linux/realtek/base-files/lib/upgrade/platform.sh +++ b/target/linux/realtek/base-files/lib/upgrade/platform.sh @@ -45,6 +45,7 @@ platform_do_upgrade() { nand_do_upgrade "$1" ;; zyxel,xmg1915-10e|\ + zyxel,xmg1915-10ep|\ zyxel,xs1930-10|\ zyxel,xs1930-12f|\ zyxel,xs1930-12hp) diff --git a/target/linux/realtek/dts/rtl9302_zyxel_xmg1915-10ep.dts b/target/linux/realtek/dts/rtl9302_zyxel_xmg1915-10ep.dts new file mode 100644 index 0000000000..6f1aac9bc7 --- /dev/null +++ b/target/linux/realtek/dts/rtl9302_zyxel_xmg1915-10ep.dts @@ -0,0 +1,27 @@ +// SPDX-License-Identifier: GPL-2.0-or-later +/dts-v1/; + +#include "rtl9302_zyxel_xmg1915.dtsi" + +#include +#include +#include + +/ { + compatible = "zyxel,xmg1915-10ep", "realtek,rtl9302c-soc"; + model = "Zyxel XMG1915-10EP Switch"; + + keys { + compatible = "gpio-keys"; + + led-mode { + label = "led-mode"; + gpios = <&gpio0 11 GPIO_ACTIVE_LOW>; + linux,code = ; + }; + }; +}; + +&uart1 { + status = "okay"; +}; diff --git a/target/linux/realtek/dts/rtl9302_zyxel_xmg1915.dtsi b/target/linux/realtek/dts/rtl9302_zyxel_xmg1915.dtsi index ac25269f79..4083fd4f7b 100644 --- a/target/linux/realtek/dts/rtl9302_zyxel_xmg1915.dtsi +++ b/target/linux/realtek/dts/rtl9302_zyxel_xmg1915.dtsi @@ -183,6 +183,15 @@ }; }; +/* + * GPIO 2 is the global reset shared by all PHYs across all MDIO busses. + * It is intentionally not declared as reset-gpios on any bus: the MDIO + * driver / phylink only support a reset GPIO per bus, not on the parent + * controller. Attaching it to a single bus would still reset the PHYs + * on the other busses as a side effect, leaving their software state + * out of sync with the hardware and likely breaking them. + */ + &mdio_bus0 { /* External RTL8224 PHY */ phy0: ethernet-phy@0 { diff --git a/target/linux/realtek/image/rtl930x.mk b/target/linux/realtek/image/rtl930x.mk index 388c698cd1..0cb43b08d5 100644 --- a/target/linux/realtek/image/rtl930x.mk +++ b/target/linux/realtek/image/rtl930x.mk @@ -239,3 +239,10 @@ define Device/zyxel_xmg1915-10e $(Device/zyxel_xmg1915) endef TARGET_DEVICES += zyxel_xmg1915-10e + +define Device/zyxel_xmg1915-10ep + DEVICE_MODEL := XMG1915-10EP + $(Device/zyxel_xmg1915) + DEVICE_PACKAGES := realtek-poe +endef +TARGET_DEVICES += zyxel_xmg1915-10ep