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realtek: dsa: convert RTL83xx to new fast_age()

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Make use of the new fast_age() helpers for the RTL83xx targets.
For this:

- split the existing rtldsa_83xx_fast_age() into two device
  specific functions. This removes a family_id check.
- change the callbacks in the config structures

Signed-off-by: Markus Stockhausen <markus.stockhausen@gmx.de>
Link: https://github.com/openwrt/openwrt/pull/22145
Signed-off-by: Robert Marko <robimarko@gmail.com>
This commit is contained in:
Markus Stockhausen 2026-02-22 18:01:11 +01:00 committed by Robert Marko
parent f3743850bf
commit d2f0542c51
5 changed files with 35 additions and 29 deletions
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2
target/linux/realtek/files-6.12/drivers/net/dsa/rtl83xx/debugfs.c
View File

@ -384,7 +384,7 @@ static ssize_t age_out_write(struct file *filp, const char __user *buffer,
if (res < 0)
return res;
rtldsa_83xx_fast_age(p->dp->ds, p->dp->index);
rtldsa_port_fast_age(p->dp->ds, p->dp->index);
return res;
}

30
target/linux/realtek/files-6.12/drivers/net/dsa/rtl83xx/dsa.c
View File

@ -1911,31 +1911,6 @@ unlock:
mutex_unlock(&priv->reg_mutex);
}
void rtldsa_83xx_fast_age(struct dsa_switch *ds, int port)
{
struct rtl838x_switch_priv *priv = ds->priv;
int s = priv->family_id == RTL8390_FAMILY_ID ? 2 : 0;
pr_debug("FAST AGE port %d\n", port);
mutex_lock(&priv->reg_mutex);
/* RTL838X_L2_TBL_FLUSH_CTRL register bits, 839x has 1 bit larger
* port fields:
* 0-4: Replacing port
* 5-9: Flushed/replaced port
* 10-21: FVID
* 22: Entry types: 1: dynamic, 0: also static
* 23: Match flush port
* 24: Match FVID
* 25: Flush (0) or replace (1) L2 entries
* 26: Status of action (1: Start, 0: Done)
*/
sw_w32(1 << (26 + s) | 1 << (23 + s) | port << (5 + (s / 2)), priv->r->l2_tbl_flush_ctrl);
do { } while (sw_r32(priv->r->l2_tbl_flush_ctrl) & BIT(26 + s));
mutex_unlock(&priv->reg_mutex);
}
static int rtldsa_port_mst_state_set(struct dsa_switch *ds, int port,
const struct switchdev_mst_state *st)
{
@ -2147,7 +2122,7 @@ static int rtldsa_vlan_del(struct dsa_switch *ds, int port,
return 0;
}
static void rtldsa_port_fast_age(struct dsa_switch *ds, int port)
void rtldsa_port_fast_age(struct dsa_switch *ds, int port)
{
struct rtl838x_switch_priv *priv = ds->priv;
@ -2989,12 +2964,13 @@ const struct dsa_switch_ops rtldsa_83xx_switch_ops = {
.port_bridge_join = rtldsa_port_bridge_join,
.port_bridge_leave = rtldsa_port_bridge_leave,
.port_stp_state_set = rtldsa_port_stp_state_set,
.port_fast_age = rtldsa_83xx_fast_age,
.port_fast_age = rtldsa_port_fast_age,
.port_mst_state_set = rtldsa_port_mst_state_set,
.port_vlan_filtering = rtldsa_vlan_filtering,
.port_vlan_add = rtldsa_vlan_add,
.port_vlan_del = rtldsa_vlan_del,
.port_vlan_fast_age = rtldsa_port_vlan_fast_age,
.vlan_msti_set = rtldsa_vlan_msti_set,
.port_fdb_add = rtldsa_port_fdb_add,

15
target/linux/realtek/files-6.12/drivers/net/dsa/rtl83xx/rtl838x.c
View File

@ -1613,6 +1613,20 @@ static void rtl838x_vlan_port_pvid_set(int port, enum pbvlan_type type, int pvid
sw_w32_mask(0xfff << 16, pvid << 16, RTL838X_VLAN_PORT_PB_VLAN + (port << 2));
}
static int rtldsa_838x_fast_age(struct rtl838x_switch_priv *priv, int port, int vid)
{
u32 val;
val = BIT(26) | BIT(23) | (port << 5);
if (vid >= 0)
val |= BIT(24) | (vid << 10);
sw_w32(val, priv->r->l2_tbl_flush_ctrl);
do { } while (sw_r32(priv->r->l2_tbl_flush_ctrl) & BIT(26));
return 0;
}
static int rtl838x_set_ageing_time(unsigned long msec)
{
int t = sw_r32(RTL838X_L2_CTRL_1);
@ -1731,6 +1745,7 @@ const struct rtldsa_config rtldsa_838x_cfg = {
.vlan_port_keep_tag_set = rtl838x_vlan_port_keep_tag_set,
.vlan_port_pvidmode_set = rtl838x_vlan_port_pvidmode_set,
.vlan_port_pvid_set = rtl838x_vlan_port_pvid_set,
.fast_age = rtldsa_838x_fast_age,
.trk_mbr_ctr = rtl838x_trk_mbr_ctr,
.rma_bpdu_fld_pmask = RTL838X_RMA_BPDU_FLD_PMSK,
.spcl_trap_eapol_ctrl = RTL838X_SPCL_TRAP_EAPOL_CTRL,

15
target/linux/realtek/files-6.12/drivers/net/dsa/rtl83xx/rtl839x.c
View File

@ -1554,6 +1554,20 @@ static void rtl839x_vlan_port_pvid_set(int port, enum pbvlan_type type, int pvid
sw_w32_mask(0xfff << 16, pvid << 16, RTL839X_VLAN_PORT_PB_VLAN + (port << 2));
}
static int rtldsa_839x_fast_age(struct rtl838x_switch_priv *priv, int port, int vid)
{
u32 val;
val = BIT(28) | BIT(25) | (port << 6);
if (vid >= 0)
val |= BIT(26) | (vid << 12);
sw_w32(val, priv->r->l2_tbl_flush_ctrl);
do { } while (sw_r32(priv->r->l2_tbl_flush_ctrl) & BIT(28));
return 0;
}
static int rtl839x_set_ageing_time(unsigned long msec)
{
int t = sw_r32(RTL839X_L2_CTRL_1);
@ -1671,6 +1685,7 @@ const struct rtldsa_config rtldsa_839x_cfg = {
.write_l2_entry_using_hash = rtl839x_write_l2_entry_using_hash,
.read_cam = rtl839x_read_cam,
.write_cam = rtl839x_write_cam,
.fast_age = rtldsa_839x_fast_age,
.trk_mbr_ctr = rtl839x_trk_mbr_ctr,
.rma_bpdu_fld_pmask = RTL839X_RMA_BPDU_FLD_PMSK,
.spcl_trap_eapol_ctrl = RTL839X_SPCL_TRAP_EAPOL_CTRL,

2
target/linux/realtek/files-6.12/drivers/net/dsa/rtl83xx/rtl83xx.h
View File

@ -130,7 +130,7 @@ inline void rtl_table_data_w(struct table_reg *r, u32 v, int i);
void rtldsa_838x_qos_init(struct rtl838x_switch_priv *priv);
void rtldsa_839x_qos_init(struct rtl838x_switch_priv *priv);
void rtldsa_83xx_fast_age(struct dsa_switch *ds, int port);
void rtldsa_port_fast_age(struct dsa_switch *ds, int port);
int rtl83xx_packet_cntr_alloc(struct rtl838x_switch_priv *priv);
int rtldsa_port_get_stp_state(struct rtl838x_switch_priv *priv, int port);
int rtl83xx_port_is_under(const struct net_device *dev, struct rtl838x_switch_priv *priv);