diff --git a/.gitignore b/.gitignore index 25c9733b7a..87f814b444 100644 --- a/.gitignore +++ b/.gitignore @@ -44,6 +44,7 @@ git-src *.itb *.ubi *.bin.md5 +*.dts.md5 *.tar.gz fw_tew-829dru_v1(1.0.3.12).zip *-squashfs-*.bin @@ -67,3 +68,6 @@ part*.bin TEW-829DRU*.bin extracted.dtb *flashdump.bin + +# secret(s) +*_PAC* diff --git a/target/linux/ipq40xx/dts/qcom-ipq4019-tew-829dru.dts b/target/linux/ipq40xx/dts/qcom-ipq4019-tew-829dru.dts deleted file mode 100644 index a4293cad89..0000000000 --- a/target/linux/ipq40xx/dts/qcom-ipq4019-tew-829dru.dts +++ /dev/null @@ -1,598 +0,0 @@ -/dts-v1/; - -#include "qcom-ipq4019.dtsi" -#include -#include -#include - -/ { - model = "TRENDnet TEW-829DRU v1.0R"; - //model = "Qualcomm Technologies, Inc. IPQ40xx/AP-DK04.1-C1"; /* OEM line */ - compatible = "trendnet,tew-829dru", "qcom,ipq4019"; - - aliases { - label-mac-device = &gmac; - led-boot = &led_wps; - led-failsafe = &led_wps; - led-running = &led_wps; - led-upgrade = &led_wps; - serial0 = &blsp1_uart2; - ethernet0 = &gmac; /* Critical for MAC address inheritance on IPQ40xx */ - }; - - chosen { - bootargs = "console=ttyMSM0,115200n8 clk_ignore_unused"; - stdout-path = "serial0:115200n8"; - }; - - memory@80000000 { - device_type = "memory"; - reg = <0x80000000 0x10000000>; /* 256MB */ - }; - - cpus { - #address-cells = <0x01>; - #size-cells = <0x00>; - - cpu@0 { - device_type = "cpu"; - compatible = "arm,cortex-a7"; - enable-method = "qcom,arm-cortex-acc"; - reg = <0x00>; - clocks = <0x02 0x09>; - clock-frequency = <0x00>; - }; - - cpu@1 { - device_type = "cpu"; - compatible = "arm,cortex-a7"; - enable-method = "qcom,arm-cortex-acc"; - reg = <0x01>; - clocks = <0x02 0x09>; - clock-frequency = <0x00>; - }; - - cpu@2 { - device_type = "cpu"; - compatible = "arm,cortex-a7"; - enable-method = "qcom,arm-cortex-acc"; - reg = <0x02>; - clocks = <0x02 0x09>; - clock-frequency = <0x00>; - }; - - cpu@3 { - device_type = "cpu"; - compatible = "arm,cortex-a7"; - enable-method = "qcom,arm-cortex-acc"; - reg = <0x03>; - clocks = <0x02 0x09>; - clock-frequency = <0x00>; - }; - - ess_psgmii: psgmii@98000 { - compatible = "qcom,ess-psgmii"; - reg = <0x98000 0x800>; - psgmii_access_mode = "local bus"; - resets = <&gcc ESS_PSGMII_ARES>; - reset-names = "psgmii_rst"; - }; - }; - - /* --- Standard OpenWrt Method: Modify existing nodes from .dtsi --- */ - soc { - - mdio: mdio@90000 { - #address-cells = <1>; - #size-cells = <0>; - compatible = "qcom,ipq4019-mdio"; - reg = <0x90000 0x64>; - status = "okay"; - }; - - ess-switch@c000000 { - compatible = "qcom,ipq4019-qca8337n"; - reg = <0xc000000 0x80000>, <0x98000 0x800>; - reg-names = "base", "psgmii_phy"; - resets = <&gcc ESS_RESET>; - reset-names = "ess_rst"; - clocks = <&gcc GCC_ESS_CLK>; - clock-names = "ess_clk"; - switch_cpu_bmp = <0x1>; - switch_lan_bmp = <0x1fe>; - switch_mac_mode = <0>; - psgmii-ethphy = <&psgmiiphy>; - mdio = <&mdio>; /* ADD THIS LINE */ - status = "okay"; - }; - - ess-psgmii@98000 { - compatible = "qcom,ess-psgmii"; - reg = <0x98000 0x800>; - status = "okay"; - }; - - gmac: ethernet@c080000 { - compatible = "qcom,ess-edma"; - reg = <0xc080000 0x8000>; - qcom,mdio_supported; - qcom,num_gmac = <2>; - interrupts = <0 65 IRQ_TYPE_EDGE_RISING>, <0 66 IRQ_TYPE_EDGE_RISING>, <0 67 IRQ_TYPE_EDGE_RISING>, <0 68 IRQ_TYPE_EDGE_RISING>, <0 69 IRQ_TYPE_EDGE_RISING>, <0 70 IRQ_TYPE_EDGE_RISING>, <0 71 IRQ_TYPE_EDGE_RISING>, <0 72 IRQ_TYPE_EDGE_RISING>, <0 73 IRQ_TYPE_EDGE_RISING>, <0 74 IRQ_TYPE_EDGE_RISING>, <0 75 IRQ_TYPE_EDGE_RISING>, <0 76 IRQ_TYPE_EDGE_RISING>, <0 77 IRQ_TYPE_EDGE_RISING>, <0 78 IRQ_TYPE_EDGE_RISING>, <0 79 IRQ_TYPE_EDGE_RISING>, <0 80 IRQ_TYPE_EDGE_RISING>, <0 240 IRQ_TYPE_EDGE_RISING>, <0 241 IRQ_TYPE_EDGE_RISING>, <0 242 IRQ_TYPE_EDGE_RISING>, <0 243 IRQ_TYPE_EDGE_RISING>, <0 244 IRQ_TYPE_EDGE_RISING>, <0 245 IRQ_TYPE_EDGE_RISING>, <0 246 IRQ_TYPE_EDGE_RISING>, <0 247 IRQ_TYPE_EDGE_RISING>, <0 248 IRQ_TYPE_EDGE_RISING>, <0 249 IRQ_TYPE_EDGE_RISING>, <0 250 IRQ_TYPE_EDGE_RISING>, <0 251 IRQ_TYPE_EDGE_RISING>, <0 252 IRQ_TYPE_EDGE_RISING>, <0 253 IRQ_TYPE_EDGE_RISING>, <0 254 IRQ_TYPE_EDGE_RISING>, <0 255 IRQ_TYPE_EDGE_RISING>; - status = "okay"; - - gmac0: gmac0 { - local-mac-address = [00 00 00 00 00 00]; - vlan_tag = <1 0x1fe>; - }; - - gmac1: gmac1 { - local-mac-address = [00 00 00 00 00 00]; - vlan_tag = <2 0x20>; - }; - }; - - /* Wi-Fi Global Control */ - wifi_glb_tcsr: tcsr@1949000 { - compatible = "qcom,tcsr"; - reg = <0x1949000 0x100>; - qcom,wifi_glb_cfg = <0x41000000>; /* Add this line from OEM */ - }; - /* Wi-Fi NOC Memory Type */ - wifi_noc_memtype_m0_m2_tcsr: tcsr@1957000 { - compatible = "qcom,tcsr"; - reg = <0x1957000 0x100>; - qcom,wifi_noc_memtype_m0_m2 = <0x2222222>; /* Add this line from OEM */ - }; - /* Wi-Fi 0 (2.4GHz and 5GHz Low) */ - wifi0: wifi@a000000 { - compatible = "qca,wifi-ipq40xx"; - reg = <0xa000000 0x200000>; - core-id = <0>; - /* Use symbolic references from ipq4019.dtsi */ - resets = <&gcc WIFI0_CPU_INIT_RESET>, - <&gcc WIFI0_RADIO_SRIF_RESET>, - <&gcc WIFI0_RADIO_WARM_RESET>, - <&gcc WIFI0_RADIO_COLD_RESET>, - <&gcc WIFI0_CORE_WARM_RESET>, - <&gcc WIFI0_CORE_COLD_RESET>; - reset-names = "wifi_cpu_init", - "wifi_radio_srif", - "wifi_radio_warm", - "wifi_radio_cold", - "wifi_core_warm", - "wifi_core_cold"; - clocks = <&gcc GCC_WCSS2G_CLK>, - <&gcc GCC_WCSS2G_REF_CLK>, - <&gcc GCC_WCSS2G_RTC_CLK>; - clock-names = "wifi_wcss_cmd", "wifi_wcss_ref", "wifi_wcss_rtc"; - interrupts = <0 0x20 0x1>, - <0 0x21 0x1>, - <0 0x22 0x1>, - <0 0x23 0x1>, - <0 0x24 0x1>, - <0 0x25 0x1>, - <0 0x26 0x1>, - <0 0x27 0x1>, - <0 0x28 0x1>, - <0 0x29 0x1>, - <0 0x2a 0x1>, - <0 0x2b 0x1>, - <0 0x2c 0x1>, - <0 0x2d 0x1>, - <0 0x2e 0x1>, - <0 0x2f 0x1>, - <0 0xa8 0x0>; - interrupt-names = "msi0", "msi1", "msi2", "msi3", "msi4", "msi5", "msi6", - "msi7", "msi8", "msi9", "msi10", "msi11", "msi12", "msi13", - "msi14", "msi15", "legacy"; - status = "okay"; - qca,msi_addr = <0xb006040>; - qca,msi_base = <0x40>; - wifi_led_num = <2>; - wifi_led_source = <0>; - }; - /* Wi-Fi 1 (5GHz High - QCA9984) */ - wifi1: wifi@a800000 { - compatible = "qca,wifi-ipq40xx"; - reg = <0xa800000 0x200000>; - core-id = <1>; - resets = <&gcc WIFI1_CPU_INIT_RESET>, - <&gcc WIFI1_RADIO_SRIF_RESET>, - <&gcc WIFI1_RADIO_WARM_RESET>, - <&gcc WIFI1_RADIO_COLD_RESET>, - <&gcc WIFI1_CORE_WARM_RESET>, - <&gcc WIFI1_CORE_COLD_RESET>; - reset-names = "wifi_cpu_init", - "wifi_radio_srif", - "wifi_radio_warm", - "wifi_radio_cold", - "wifi_core_warm", - "wifi_core_cold"; - clocks = <&gcc GCC_WCSS5G_CLK>, - <&gcc GCC_WCSS5G_REF_CLK>, - <&gcc GCC_WCSS5G_RTC_CLK>; - clock-names = "wifi_wcss_cmd", "wifi_wcss_ref", "wifi_wcss_rtc"; - interrupts = <0 0x30 0x1>, - <0 0x31 0x1>, - <0 0x32 0x1>, - <0 0x33 0x1>, - <0 0x34 0x1>, - <0 0x35 0x1>, - <0 0x36 0x1>, - <0 0x37 0x1>, - <0 0x38 0x1>, - <0 0x39 0x1>, - <0 0x3a 0x1>, - <0 0x3b 0x1>, - <0 0x3c 0x1>, - <0 0x3d 0x1>, - <0 0x3e 0x1>, - <0 0x3f 0x1>, - <0 0xa9 0x0>; - interrupt-names = "msi0", "msi1", "msi2", "msi3", "msi4", "msi5", "msi6", - "msi7", "msi8", "msi9", "msi10", "msi11", "msi12", "msi13", - "msi14", "msi15", "legacy"; - status = "okay"; - qca,msi_addr = <0xb006040>; - qca,msi_base = <0x50>; - wifi_led_num = <1>; - wifi_led_source = <2>; - }; - }; - - /* GPIO LEDs */ - leds { - compatible = "gpio-leds"; - pinctrl-0 = <&led_pins>; - pinctrl-names = "default"; - - led_wps: led-wps { - label = "green:wps"; - gpios = <&tlmm 55 GPIO_ACTIVE_LOW>; - linux,default-trigger = "default-on"; - }; - led_2g: led-2g { - label = "green:wlan2g"; - gpios = <&tlmm 56 GPIO_ACTIVE_LOW>; - linux,default-trigger = "phy0tpt"; - }; - led_5g1: led-5g1 { - label = "green:wlan5g1"; - gpios = <&tlmm 57 GPIO_ACTIVE_LOW>; - linux,default-trigger = "phy1tpt"; - }; - led_5g2: led-5g2 { - label = "green:wlan5g2"; - gpios = <&tlmm 58 GPIO_ACTIVE_LOW>; - linux,default-trigger = "phy2tpt"; - }; - }; - - /* GPIO Buttons */ - keys { - compatible = "gpio-keys"; - pinctrl-0 = <&button_pins>; - pinctrl-names = "default"; - - button_reset: button-reset { - label = "reset"; - gpios = <&tlmm 59 GPIO_ACTIVE_LOW>; - linux,code = ; - }; - }; -}; - -/* NAND Flash */ -&nand { - status = "okay"; - pinctrl-0 = <&nand_pins>; - pinctrl-names = "default"; - - nandcs@0 { - reg = <0>; /* Chip-select number */ - }; - - partitions { - compatible = "fixed-partitions"; - #address-cells = <1>; - #size-cells = <1>; - - /* This is the single MTD partition that holds the entire UBI container */ - partition@800000 { - label = "ubi"; - reg = <0x00800000 0x07800000>; /* Start after bootloader, use remaining space */ - }; - }; -}; - -// QPIC BAM - req'd for nand -&qpic_bam { - status = "okay"; - qcom,ee = <0>; -}; - -/* PCIe for QCA9984 */ -&pcie0 { - status = "okay"; - pinctrl-0 = <&pcie0_pins>; - pinctrl-names = "default"; - reset-gpio = <&tlmm 61 GPIO_ACTIVE_LOW>; -}; - - - -&blsp1_spi1 { - status = "okay"; - pinctrl-0 = <&spi_0_pins>; - pinctrl-names = "default"; - cs-gpios = <&tlmm 12 GPIO_ACTIVE_LOW>; - - flash@0 { - compatible = "jedec,spi-nor"; - reg = <0>; - spi-max-frequency = <24000000>; - - partitions { - compatible = "fixed-partitions"; - #address-cells = <1>; - #size-cells = <1>; - - partition-art { - label = "0:ART"; - nvmem-layout { - compatible = "fixed-layout"; - #address-cells = <1>; - #size-cells = <1>; - - macaddr_gmac0: macaddr@0 { - reg = <0x0 0x6>; - }; - macaddr_gmac1: macaddr@6 { - reg = <0x6 0x6>; - }; - precal_art_1000: precal@1000 { - reg = <0x1000 0x2f20>; - }; - precal_art_5000: precal@5000 { - reg = <0x5000 0x2f20>; - }; - precal_art_9000: precal@9000 { - reg = <0x9000 0x2f20>; - }; - }; - }; - }; - }; -}; -/* Serial Console */ -&blsp1_uart1 { - pinctrl-0 = <&serial_pins>; - pinctrl-names = "default"; - status = "okay"; -}; - -/*&blsp1_uart2 { - status = "okay"; - pinctrl-0 = <&serial_pins>; - pinctrl-names = "default"; - clocks = <&gcc GCC_BLSP1_UART2_APPS_CLK>; - clock-names = "core"; - resets = <&gcc GCC_BLSP1_UART2_BCR>; - reset-names = "m"; -};*/ - -/* Pinmux */ -&tlmm { - /* SPI 0 Pinmux (from OEM) */ - spi_0_pins: spi_0_pinmux { - mux { - pins = "gpio12", "gpio13", "gpio14", "gpio15"; - function = "blsp_spi0"; - bias-disable; - }; - }; - - /* NAND Pinmux (standard for IPQ4019) */ - nand_pins: nand_pins { - mux { - pins = "gpio0", "gpio1", "gpio2", "gpio3", "gpio4", "gpio5", "gpio6", "gpio7", - "gpio8", "gpio9", "gpio10", "gpio11", "gpio12", "gpio13", "gpio14", "gpio15"; - function = "nand"; - drive-strength = <2>; - bias-pull-up; - }; - }; - - /* PCIe 0 Pinmux (standard for IPQ4019) */ - pcie0_pins: pcie0_pins { - mux { - pins = "gpio61"; - function = "gpio"; - drive-strength = <2>; - bias-pull-up; - }; - }; - - /* MDIO pins - mind the wrapper (not the rapper) */ - mdio_pins: mdio-pinmux { - mdc-pins { - pins = "gpio52"; - function = "mdc"; - bias-pull-up; - }; - mdio-pins { - pins = "gpio53"; - function = "mdio"; - bias-pull-up; - }; - }; - - /* PSGMII pins */ - psgmii_pins: psgmii_pins { - mux { - pins = "gpio28", "gpio29", "gpio30", "gpio31", - "gpio32", "gpio33", "gpio34", "gpio35", - "gpio36", "gpio37", "gpio38", "gpio39"; - function = "psgmii"; - }; - }; - - /* RGMII Pinmux for GMAC1 (QCA8337 Switch) */ - rgmii_pins: rgmii_pins { - mux { - pins = "gpio40", "gpio41", "gpio42", "gpio43", - "gpio44", "gpio45", "gpio46", "gpio47", - "gpio48", "gpio49", "gpio50", "gpio51"; - function = "rgmii"; - drive-strength = <2>; - bias-pull-up; - }; - }; - - /* SGMII Pinmux for GMAC2 (LAN) */ - sgmii_pins: sgmii_pins { - mux { - pins = "gpio40", "gpio41", "gpio42", "gpio43", "gpio44", "gpio45"; - function = "sgmii"; - drive-strength = <2>; - bias-pull-up; - }; - }; - - /* UART Pinmux (from OEM) */ - serial_pins: serial0_pinmux { - mux { - pins = "gpio16", "gpio17"; - function = "blsp_uart0"; - bias-disable; - }; - }; - - led_pins: led_pins { - }; - - button_pins: button_pins { - }; -}; - - - - - - - - - -// LAN Ports (8) + WAN Ports (2) - Handled by IPQ4019 Internal GMACs -&gmac { - status = "okay"; - phy-mode = "internal"; -}; - -&gmac0 { - status = "okay"; - phy-mode = "rgmii"; - /* IPQ40xx typically requires specific delays for RGMII */ - tx-internal-delay-ps = <1000>; - rx-internal-delay-ps = <1000>; - - /* Connect to the first port of the switch node defined below */ - //nvmem-cells = <&macaddr_config_0>; /* Optional: if using nvmem for MAC */ - //nvmem-cell-names = "mac-address"; - - fixed-link { - speed = <1000>; - full-duplex; - pause; - }; -}; - -// Ensure GMAC1 is enabled for RGMII -&gmac1 { - status = "okay"; - phy-mode = "rgmii"; - tx-internal-delay-ps = <1000>; - rx-internal-delay-ps = <1000>; - /* Ensure clocks are enabled if your SoC DTSI doesn't do it by default */ - /* clocks = <&gcc GCC_GPSS0_CFG_AHB_CLK>, <&gcc GCC_GPSS0_CFG_M_CLK>, <&gcc GCC_GPSS0_CFG_SLAVE_M_CLK>; */ - - /* Do NOT put fixed-link here if the switch port defines it */ -}; - -// This node is OUTSIDE the 'soc' block -// LAN Ports (8) - Handled by QCA8337 -// Enable the internal switch fabric -// Define the primary QCA8337 switch -&switch { - status = "okay"; - compatible = "qca,qca8337"; - reset-gpios = <&tlmm 52 GPIO_ACTIVE_LOW>; - ports { - #address-cells = <1>; - #size-cells = <0>; - - /* CPU Port: Connects to GMAC1 */ - port@0 { - reg = <0>; - label = "cpu"; - ethernet = <&gmac1>; - fixed-link { speed = <1000>; full-duplex; pause; }; - }; - - /* WAN and LAN Ports on QCA8337 */ - port@1 { reg = <1>; label = "wan2"; }; - port@2 { reg = <2>; label = "wan1"; }; - port@3 { reg = <3>; label = "lan1"; }; - port@4 { reg = <4>; label = "lan2"; }; - port@5 { reg = <5>; label = "lan3"; }; - - /* Port 6: Connects to the QCA8075 switch */ - port@6 { - reg = <6>; - label = "cpu"; - ethernet = <&gmac0>; /* Uses the second GMAC */ - fixed-link { speed = <1000>; full-duplex; pause; }; - }; - }; -}; - -// Define the secondary QCA8075 switch -&qca8075 { - status = "okay"; - ports { - #address-cells = <1>; - #size-cells = <0>; - - /* CPU Port: Connects to QCA8337 port 6 */ - port@0 { - reg = <0>; - label = "cpu"; - ethernet = <&gmac0>; - fixed-link { speed = <1000>; full-duplex; pause; }; - }; - - /* LAN Ports on QCA8075 */ - port@1 { reg = <1>; label = "lan4"; }; - port@2 { reg = <2>; label = "lan5"; }; - port@3 { reg = <3>; label = "lan6"; }; - port@4 { reg = <4>; label = "lan7"; }; - port@5 { reg = <5>; label = "lan8"; }; - }; -}; - - - -// Ensure the external MDIO bus is enabled for the QCA8075 WAN PHY (if present) -&mdio { - status = "okay"; - pinctrl-0 = <&mdio_pins>; - pinctrl-names = "default"; - - // Define the QCA8075 WAN PHY here if your board has one - // phy0: ethernet-phy@0 { reg = <0>; compatible = "ethernet-phy-id004d.d0b1"; }; - // Ensure the external MDIO bus is enabled - //psgmiiphy: psgmii-phy@5 { - // reg = <5>; - //}; -}; - diff --git a/target/linux/ipq40xx/image/generic.mk b/target/linux/ipq40xx/image/generic.mk index 3f84863cf7..7a7ee747ba 100644 --- a/target/linux/ipq40xx/image/generic.mk +++ b/target/linux/ipq40xx/image/generic.mk @@ -1431,7 +1431,7 @@ define Device/trendnet_tew-829dru DEVICE_VENDOR := TRENDnet DEVICE_MODEL := TEW-829DRU DEVICE_DTS := qcom-ipq4019-tew-829dru - DEVICE_DTS_DIR := ../dts + #DEVICE_DTS_DIR := ../dts DEVICE_DTS_CONFIG := config@1 KERNEL_INSTALL := 1 BLOCKSIZE := 128k