Currently, moving from a port on one LAN8814 PHY package to another results
in a no traffic flowing on that new port.
It was tracked down to upstream change that fixed the issue that QSGMII
was soft reset on .config_init of each of 4 PHY-s in the package resulting
in a temporary traffic loss until QSGMII resynced.
However, it seems that the QSGMII soft reset timing is crucial and doing
the reset during probe only cause the QSGMII link to become partially
unsynced (Like 2 or 3 lanes are not synced).
So, add an upstream patch[1] to fix this, patch was modified as we
dont have the inband caps currently.
[1] https://git.kernel.org/pub/scm/linux/kernel/git/next/linux-next.git/commit/drivers/net/phy/micrel.c?h=next-20260508&id=e027c218c482c6a0ae1948129ccda3b0a2033368
Signed-off-by: Robert Marko <robert.marko@sartura.hr>
SFP I2C buses for ports 1 and 3 were swapped as order changed on production
boards.
So, swap them around to fix SFP 1 and 3 failed to read EEPROM errors.
Fixes: 29b3d929a6 ("microchipsw: lan969x: add Novarq Tactical 1000")
Signed-off-by: Robert Marko <robert.marko@sartura.hr>
(cherry picked from commit 55f1f2c1c4)
Now that DCB is enabled by default, it makes sense to include it on
lan969x.
While we are here, lets include ip-bridge as these devices are switches
and the Busybox applet does not expose enough functionality.
These devices have no space constraints.
Signed-off-by: Robert Marko <robert.marko@sartura.hr>
(cherry picked from commit 51710e9dd4)
Update the DTS to the latest pending upstream version, it looks like this
should get merged soon upstream.
Signed-off-by: Robert Marko <robert.marko@sartura.hr>
(cherry picked from commit 19e097e18a)
Due to PTP conflicts with CONFIG_ALL_KMODS which causes the end images
to end up with no switchdev driver included, lets switch to using the
switchdev and PHY drivers as modules instead.
Fixes: 88a404a2d1 ("microchipsw: add support for Microchip LAN969x switches")
Signed-off-by: Robert Marko <robert.marko@sartura.hr>
(cherry picked from commit b300a9e63d)
Now that there is a consumer board available, lets drop source-only so that
buildbots provide official images.
Signed-off-by: Robert Marko <robert.marko@sartura.hr>
Novarq Tactical 1000 is a LAN9696 based switch.
Specifications:
* CPU: Microchip LAN9696 switch SoC
* DRAM: 2GB DDR4
* Storage:
* 32MB QSPI NOR
* 16GB eMMC
* Networking:
* 24 x 10/100/1000 RJ45 via LAN8804 Quad PHY-s over QSGMII
* 4 x 100/1000/2500/5000/10000 SFP+ ports
* 1 x 10/100/1000 management RJ45 via LAN8840 PHY over RGMII (U-Boot too)
* USB: 1 x USB2.0 Type-A
* Management via USB-C (MCP2200):
* UART @ 115200 baud (Default), 921600 possible
* GPIO-s for bootstrap and reset
* LED-s:
* 2 per networking port (Green and Yellow)
* Green status LED
* Soft reset GPIO
* Power: 12V DC barrel jack
* External PoE:
* Option for PoE add-on
* Temperature Sensors:
* TMP1075 onboard
* CPU temperature
* Microchip MCP79402 RTC with battery back-up
* Microchip ATECC608C secure peripheral
* CPU heatsink with PWM fan
* Onboard header for case fan
Installation instructions:
1. Connect to UART via the USB-C port
2. Connect the management port
3. Boot and interrupt U-Boot
4. TFTP the OpenWrt initramfs image and boot it
5. SCP the OpenWrt eMMC GPT image to a running OpenWrt initramfs to /tmp
openwrt-microchipsw-lan969x-novarq_tactical-1000-squashfs-emmc-gpt.img.gz
And decompress it via:
gzip -d /tmp/openwrt-microchipsw-lan969x-novarq_tactical-1000-squashfs-emmc-gpt.img.gz
6. Wipe eMMC with:
dd if=/dev/zero of=/dev/mmcblk0 bs=1M
7. Flash OpenWrt eMMC image with:
dd if=/tmp/openwrt-microchipsw-lan969x-novarq_tactical-1000-squashfs-emmc-gpt.img
of=/dev/mmcblk0
After a restart OpenWrt will boot, and then regular sysupgrade can be used
for upgrades.
Signed-off-by: Robert Marko <robert.marko@sartura.hr>
(cherry picked from commit 29b3d929a6)
Replace some of the pending patches with the upstreamed versions and mark
them accordingly.
Signed-off-by: Robert Marko <robert.marko@sartura.hr>
(cherry picked from commit 7b7a559976)
Use the latest v3 that is sent upstream, it now uses a DTS header for clock
indices.
Signed-off-by: Robert Marko <robert.marko@sartura.hr>
(cherry picked from commit 6944f1c6a0)
Sync the DTS with the version sent upstream, clock bindings also.
Signed-off-by: Robert Marko <robert.marko@sartura.hr>
(cherry picked from commit bce8432bbd)
Microchip EV23X71A is a LAN9696 based EVB.
Specifications:
* CPU: Microchip LAN9696 switch SoC
* DRAM: 1GB DDR4
* Storage:
* 2MB QSPI NOR
* 4GB eMMC
* Networking:
* 24 x 10/100/1000 RJ45 via LAN8814 Quad PHY-s over QSGMII
* 4 x 100/1000/2500/5000/10000 SFP+ ports
* 1 x 10/100/1000 management RJ45 via LAN8840 PHY over RGMII (U-Boot too)
* USB: 1 x USB2.0 Type-A
* Management via USB-C (MCP2200):
* UART @ 115200 baud
* GPIO-s for bootstrap, reset and clock selection
* DIP switch for boostrap configuration
* LED-s:
* 2 per networking port (Green and Yellow)
* Green status LED
* Yellow reset LED
* Hard reset button
* Power:
* 12V DC barrel jack
* 48/56V DC screw terminal
* Selectable via toggle switch
* PTP support:
* Sync-E DPLL ZL30732B to generate the board required clocks
* Two SMAs for PTP and two for Station clock inputs and outputs
* Two ITU-T G.8275-compliant RS-422 interfaces for PTP applications
* External PoE:
* Option for PoE add-on, like EV14Y36A (IEEE 802.3af/at/bt Type 4
standard com-pliant)
* Option for external CPU control via SPI and PCIe
Installation instructions:
1. Connect to UART via the USB-C port
2. Connect the management port
3. Boot and interrupt U-Boot
4. TFTP the OpenWrt initramfs image and boot it
5. SCP the OpenWrt eMMC GPT image to a running OpenWrt initramfs to /tmp
openwrt-microchipsw-lan969x-microchip_ev23x71a-squashfs-emmc-gpt.img.gz
And decompress it via:
gzip -d /tmp/openwrt-microchipsw-lan969x-microchip_ev23x71a-squashfs-emmc-gpt.img.gz
6. Wipe eMMC with:
dd if=/dev/zero of=/dev/mmcblk0 bs=1M
7. Flash OpenWrt eMMC image with:
dd if=/tmp/openwrt-microchipsw-lan969x-microchip_ev23x71a-squashfs-emmc-gpt.img
of=/dev/mmcblk0
After a restart OpenWrt will boot, and then regular sysupgrade can be used
for upgrades.
Signed-off-by: Robert Marko <robert.marko@sartura.hr>
Add a new microchipsw target aimed add supporting Microchip switch
SoC-s.
Start by supporting LAN969x SoC-s as the first subtarget.
Signed-off-by: Robert Marko <robert.marko@sartura.hr>
