This symbol is selected by CONFIG_BPF, which was already enabled
on generic config-6.12.
Signed-off-by: Shiji Yang <yangshiji66@outlook.com>
Link: https://github.com/openwrt/openwrt/pull/22730
Signed-off-by: Hauke Mehrtens <hauke@hauke-m.de>
This symbol depends on the specific CPU type, so we should not
set it globally.
Signed-off-by: Shiji Yang <yangshiji66@outlook.com>
Link: https://github.com/openwrt/openwrt/pull/22730
Signed-off-by: Hauke Mehrtens <hauke@hauke-m.de>
The RTL8231 LED driver is using the .brightness_set op, which according
to the documentation should not sleep. Since the RTL8231 is controlled
via an MDIO bus, this is not the case.
When using a non-offloaded LED driver such as netdev, this may currently
trigger kernel warnings:
WARNING: CPU: 0 PID: 14 at kernel/time/timer.c:1754 call_timer_fn.isra.0+0x84/0x8c
timer: led_timer_function+0x0/0x1d8 preempt leak: 00000100 -> 00000000
Switch to the .brightness_set_blocking op to indicate the operation
might sleep.
Fixes: 6ef6014887 ("realtek: Add pinctrl support for RTL8231")
Signed-off-by: Sander Vanheule <sander@svanheule.net>
rteth_930x_decode_tag() and rteth_931x_decode_tag() are basically
the same. The only difference is the port bitmask. Luckily on the
RTL930x devices the unused fifth bit is always zero and the mask
can be aligned with RTL931x. Take over the RTL931x reason debugging
for both targets.
Signed-off-by: Markus Stockhausen <markus.stockhausen@gmx.de>
Link: https://github.com/openwrt/openwrt/pull/22717
Signed-off-by: Robert Marko <robimarko@gmail.com>
Use the new PHY_C22() macro for this RTL9301 device.
Signed-off-by: Markus Stockhausen <markus.stockhausen@gmx.de>
Link: https://github.com/openwrt/openwrt/pull/22721
Signed-off-by: Robert Marko <robimarko@gmail.com>
Set the SerDes mode to OFF early in the setup process to have a clear
starting point. This was part of the media handling before as a leftover
from the SDK code import. In the SDK, this function didn't only care
about applying some media settings but was also some kind of mode
setting for fiber modes.
Signed-off-by: Jonas Jelonek <jelonek.jonas@gmail.com>
Link: https://github.com/openwrt/openwrt/pull/22786
Signed-off-by: Robert Marko <robimarko@gmail.com>
Right now we operate with distinct media types for fiber using different
speeds. This is more of a leftover from the SDK then it really makes
sense design-wise. The set_media function from the SDK did a lot more
than just setting some media-specific parameters. As part of
deconstructing this, also reduce the fiber types to a single media type
and handle the speed-agnostic parts based on the hw_mode for now.
This also drops the check for 100M speed around a block of writes. This
check has it's origin in SDK code where a switch statement just didn't
handle this case. However, the rest of the SDK doesn't handle this case
either. While the explicit 100M support isn't verified yet, there's no
need to keep that check.
Signed-off-by: Jonas Jelonek <jelonek.jonas@gmail.com>
Link: https://github.com/openwrt/openwrt/pull/22786
Signed-off-by: Robert Marko <robimarko@gmail.com>
So far we had separate media types for different DAC cable lengths,
equal to how the SDK defines them. However, this seems overengineered.
The types '_50CM' and '_100CM' are always treated equally, same for
'_300CM' and '_500CM'. Not only in the RTL931x code, but also the
RTL930x code usually just makes a distinction between short and long.
Thus, make that a bit cleaner by reducing the DAC type set to '_SHORT'
and '_LONG' with DAC cables < 3m being considered short and those with
>= 3m being considered as long.
Signed-off-by: Jonas Jelonek <jelonek.jonas@gmail.com>
Link: https://github.com/openwrt/openwrt/pull/22786
Signed-off-by: Robert Marko <robimarko@gmail.com>
The term 'port media' was chosen due to how the code taken from the SDK
was organized. However, the SDK does a pretty good job at intermixing a
lot of things which cause confusion in the end. This also applies to the
media settings. To be correct, we do not really have port awareness in
the PCS driver (and probably shouldn't have) so we do not really deal
with a port's media. Instead, we set settings depending on what is
attached to the SerDes itself.
To fix this confusion, rename the enum, its fields and all usage from
'port_media' to 'sds_media'.
Signed-off-by: Jonas Jelonek <jelonek.jonas@gmail.com>
Link: https://github.com/openwrt/openwrt/pull/22786
Signed-off-by: Robert Marko <robimarko@gmail.com>
The dsa probing currently disable multiple spanning tree for RTL93xx
and keeps the bootloader setup for RTL83xx untouched. Additionally it
does this by checking for the family id. Refactor this to a common
"disable msti" setup.
To make it clear: From now on RTL83xx will also run in MSTI disabled
state. Tested on Linksys LGS310C.
Signed-off-by: Markus Stockhausen <markus.stockhausen@gmx.de>
Link: https://github.com/openwrt/openwrt/pull/22749
Signed-off-by: Hauke Mehrtens <hauke@hauke-m.de>
Another two variables that are not part of the runtime but the
configuration structure. Move them around.
Signed-off-by: Markus Stockhausen <markus.stockhausen@gmx.de>
Link: https://github.com/openwrt/openwrt/pull/22749
Signed-off-by: Hauke Mehrtens <hauke@hauke-m.de>
num_lag_ids is a device specific constant and must therefore
live in the configuration structure. Avoid dynamic assignment.
Signed-off-by: Markus Stockhausen <markus.stockhausen@gmx.de>
Link: https://github.com/openwrt/openwrt/pull/22749
Signed-off-by: Hauke Mehrtens <hauke@hauke-m.de>
dsa_switch_ops and phylink_mac_ops do not need to be assigned
by a family check. Instead they can be directly linked in the
configuration structure.
Signed-off-by: Markus Stockhausen <markus.stockhausen@gmx.de>
Link: https://github.com/openwrt/openwrt/pull/22749
Signed-off-by: Hauke Mehrtens <hauke@hauke-m.de>
ports should be ethernet-ports, otherwise initialising ethernet
ports fails on 6.18 testing kernel.
Signed-off-by: Hal Martin <hal.martin@gmail.com>
Link: https://github.com/openwrt/openwrt/pull/22764
Signed-off-by: Robert Marko <robimarko@gmail.com>
Builders are currently complaining. Refresh patches. Automatic
update, no manual intervention needed.
Signed-off-by: Markus Stockhausen <markus.stockhausen@gmx.de>
Link: https://github.com/openwrt/openwrt/pull/22747
Signed-off-by: Robert Marko <robimarko@gmail.com>
Some obsolete values made their way into the Realtek config
files. Identified via:
make menuconfig -> choose target -> save -> exit
make kernel_menuconfig -> save -> exit
Signed-off-by: Markus Stockhausen <markus.stockhausen@gmx.de>
Link: https://github.com/openwrt/openwrt/pull/22747
Signed-off-by: Robert Marko <robimarko@gmail.com>
Add support for Datto L8 with 8 copper ports.
POE+ support with 55W power budget.
Specifications:
---------------
* SoC: Realtek RTL8380M
* Flash: 32MiB Flash
* RAM: 256MiB
* Ethernet: 8x 10/100/1000 Mbps
* PoE: 8x
* Serial: UART 3.3V TTL logic, 115200 8N1
* pinout: G(ND) R(x) T(x) V(cc)
* Buttons: 1x Reset, 1x LED Mode (noop in OpenWrt)
Note: OpenWrt combines the stock dual firmware partitions
for more overlay capacity, however the OpenWrt image cannot
exceed 13504k
Installation:
-------------
> When connected to CloudTrax, the local management login will be disabled to prevent settings conflicts.
Ensure the switch does not have a working internet connection or the local
web management interface is disabled.
Go to the web management page of the switch (may require factory reset).
By default the switch will use DHCP to obtain an IP address.
The default login user is `admin` with password `0p3nm3$h!`
On the left menu, click "Management" and then "Dual Image" and ensure that
"Partition 0" is selected as the active partition. If it is not, select
"Partition 0" and click "Apply" to save changes.
Click on "Upgrade" in the top right of the web interface. Select the
Active boot partition to update. Select the OpenWrt file ending
in `-initramfs-kernel.bin` as the update file to upload.
Upload the file and follow the prompts to upgrade the firmware.
Reboot the switch from the web UI after the firmware update is completed.
Wait for OpenWrt to finish booting (~2 minutes)
Use SSH or the Luci UI (if available) to perform the sysupgrade.
Copy the sysupgrade file ending in `-squashfs-sysupgrade.bin` to the switch:
```
scp -O openwrt-realtek-rtl838x-datto_l8-squashfs-sysupgrade.bin root@192.168.1.1:/tmp/
```
SSH to the switch and run `sysupgrade`:
```
ssh root@192.168.1.1
$ sysupgrade -n /tmp/openwrt-realtek-rtl838x-datto_l8-squashfs-sysupgrade.bin
```
OpenWrt will be installed. Note that first boot after installing requires ~3
minutes for the JFFS2 overlay to be formatted. When the Power LED stops blinking
in the first boot after `sysupgrade`, JFFS2 formatting is completed.
----
Revert back to stock firmware:
You will need a tftp server and the original Datto firmware.
Download the firmware for the S8-L/L8 from Datto:
https://networkinghelp.datto.com/help/Content/kb/Networking/Switches/KB360023113291.html
Rename `s8-l_fw_01.03.24_180823-1639.bix` to `vmlinux.bix`,
put `vmlinux.bix` in the root directory of your tftp server.
Connect a serial console to the UART header and power on the switch.
Interrupt U-Boot by typing `pac` when you see
`Enter correct key to stop autoboot:`
Run the following commands:
```
setenv serverip <tftp_server_ip>
setenv ipaddr <ip_on_same_subnet>
setenv netmask 255.255.255.0
run rtkon
run update_linux
run update_linux2
reset
```
The switch will boot the Datto firmware.
Signed-off-by: Hal Martin <hal.martin@gmail.com>
Tested-By: Raylynn Knight <rayknight@me.com>
Signed-off-by: Sander Vanheule <sander@svanheule.net>
Make the remaining devices use the new PHY_C45() macro. At least
those that have no extra attributes in the phy definitions.
Signed-off-by: Markus Stockhausen <markus.stockhausen@gmx.de>
Link: https://github.com/openwrt/openwrt/pull/22715
Signed-off-by: Robert Marko <robimarko@gmail.com>
Like the PHY_C22() macro before add a helper that allows to define
a C45 based phy. It works basically the same with two parameters
PHY_C45(port_number, bus_address) where
- port_number is the absolute overall unique phy number
- bus_address is the location of the phy on the bus
As a first consumer adapt the Xikestor SKS8300-8T devicetree.
Signed-off-by: Markus Stockhausen <markus.stockhausen@gmx.de>
Link: https://github.com/openwrt/openwrt/pull/22715
Signed-off-by: Robert Marko <robimarko@gmail.com>
GCC generates the same code for 24kc and 34kc. Since we have
converted all 34kc targets to the 24kc, it's better to switch
kernel -mtune to 24kc to avoid confusing developers.
Signed-off-by: Shiji Yang <yangshiji66@outlook.com>
Link: https://github.com/openwrt/openwrt/pull/22703
Signed-off-by: Robert Marko <robimarko@gmail.com>
Backport 2 patches from [1] that cleanup the i2c-rtl9300 upstream driver.
They have been long accepted and are already in mainline kernel as of 7.0-rc1.
The "100-rtl9300-i2c-add-more-speeds.patch" required refreshing after adding
these backport patches.
[1] - https://lore.kernel.org/linux-i2c/20251217063027.37987-1-rosenp@gmail.com/
Signed-off-by: Rustam Adilov <adilov@tutamail.com>
Link: https://github.com/openwrt/openwrt/pull/22662
Signed-off-by: Hauke Mehrtens <hauke@hauke-m.de>
The fib_entries attribute is a device specific constant.
Therefore move it into the configuration structure. Add
a comment why someone used 16K fib_entries for RTL931x
instead of the possible 32K.
Signed-off-by: Markus Stockhausen <markus.stockhausen@gmx.de>
Link: https://github.com/openwrt/openwrt/pull/22438
Signed-off-by: Hauke Mehrtens <hauke@hauke-m.de>
The port_width attribute is only used once and can be derived
from the cpu_port. Drop it. Add a comment for better readability.
Signed-off-by: Markus Stockhausen <markus.stockhausen@gmx.de>
Link: https://github.com/openwrt/openwrt/pull/22438
Signed-off-by: Hauke Mehrtens <hauke@hauke-m.de>
The port_mask attribute is set but never used. Drop it.
Signed-off-by: Markus Stockhausen <markus.stockhausen@gmx.de>
Link: https://github.com/openwrt/openwrt/pull/22438
Signed-off-by: Hauke Mehrtens <hauke@hauke-m.de>
The cpu_port is a per-device constant. Thus move it from the
instance structure to the config structure.
Signed-off-by: Markus Stockhausen <markus.stockhausen@gmx.de>
Link: https://github.com/openwrt/openwrt/pull/22438
Signed-off-by: Hauke Mehrtens <hauke@hauke-m.de>
Make use of the newly invented PHY_C22() macro for the
RTL93xx Linksys LGS3xxC NAND devices.
Signed-off-by: Markus Stockhausen <markus.stockhausen@gmx.de>
Link: https://github.com/openwrt/openwrt/pull/22698
Signed-off-by: Robert Marko <robimarko@gmail.com>
The Realtek target currently uses two phy macros to simplify the
device dts.
- EXTERNAL_PHY() to denote a phy attached to the SoC
- INTERNAL_PHY() to denote an internal PHY (inside the SoC)
There is no benefit doing this. The topology around a port/phy is
well defined by the port macros. They link port, phy, pcs and even
leds. The only consumer of the attribute "phy-is-integrated" is
inside the dsa driver and that is being refactored.
As a first step define a new more meaningful PHY_C22() macro that
describes a c22 capable phy. This does not need to care about the
external/internal relation. To make it even more useful for the
RTL93xx targets with multiple mdio busses give it two parameters
PHY_C22(port_number, bus_address) where
- port_number is the absolute overall unique phy number
- bus_address is the location of the phy on the bus
For RTL83xx these two parameters will usually be the same. Instead
of three steps (inventing the macro, converting the consumers and
removeing the old macor) do a one-step conversion for the existing
EXTERNAL_PHY() macro.
Signed-off-by: Markus Stockhausen <markus.stockhausen@gmx.de>
Link: https://github.com/openwrt/openwrt/pull/22698
Signed-off-by: Robert Marko <robimarko@gmail.com>
The dsa driver currently has different attributes to denote what
hardware is around a port:
- phy_is_integrated: true if phy is not driven by a serdes
- phy: the type of the attached phy (e.g. 0=NONE, 2=RTL8218B, ....)
- pcs: link to a serdes pcs instance
This is somehow redundant and especially the phy type should be only
part of the phy driver and is not needed by the dsa driver at all.
Remove the redundancy by simply keeping a boolean attribute "phy" that
flags a phy driven port and can be used similar to the pcs (pointer)
attribute. With that the driver can check phy/pcs as follows:
- if (ports[i].pcs) -> port has a dedicated serdes
- if (ports[i].phy) -> port has a dedicated phy
That implemented, the "phy-is-integrated" attribute of a phy can be
removed from the dts. This will be a separate commit. As a side effect
the following (annoying) boot message for kernel 6.18 gets fixed.
OF: /switchcore@1b000000/mdio-controller/mdio-bus@0/ethernet-phy@24:
Read of boolean property 'sfp' with a value.
Signed-off-by: Markus Stockhausen <markus.stockhausen@gmx.de>
Link: https://github.com/openwrt/openwrt/pull/22698
Signed-off-by: Robert Marko <robimarko@gmail.com>
In kernel 6.18, upstream added a change to the Aquantia PHY driver which
reports autoneg and inband capabilities as the PHY supports it, and
configures it accordingly in the PHY [1]. Due to how phylink works, it
then decides to turn off in-band signalling and prefer outband signalling
via MDIO.
We do not fully support running a USXGMII link with disabled
autonegotiation which leads to a non-working link between RTL93xx switch
and Aquantia PHYs running on USXGMII. To workaround this issue until
this support is added (if it is properly supported by the hardware),
force the Aquantia PHYs on affected devices to use inband signalling
instead of outband signalling. To achieve this, one can add
> managed = "in-band-status";
to the port definition in the DTS.
[1] https://git.kernel.org/pub/scm/linux/kernel/git/torvalds/linux.git/commit/?id=5d59109d47c00e3e98aba612529b3871e69efb9d
Signed-off-by: Jonas Jelonek <jelonek.jonas@gmail.com>
Link: https://github.com/openwrt/openwrt/pull/22690
Signed-off-by: Robert Marko <robimarko@gmail.com>
Switch the common DTS for Zyxel XGS1250-12 variants to the recently
added SWITCH_PORT_LED macro to reduce boilerplate and make the DTS
cleaner. As a side effect, this also assign labels to the port nodes so
they can be referenced by the variant-specific device tree sources.
Signed-off-by: Jonas Jelonek <jelonek.jonas@gmail.com>
Link: https://github.com/openwrt/openwrt/pull/22690
Signed-off-by: Robert Marko <robimarko@gmail.com>
Add the RTL8231 controlling the port LEDs to the devicetree, so users
can enable them. Using the appropriate link name, the netdev trigger can
be used to reflect the port status. As no hardware port status
offloading is supported, blinking on traffic could result in increased
load due to the numerous LED updates.
Signed-off-by: Sander Vanheule <sander@svanheule.net>
To enable the use of the RTL8231 to control (port) LEDs, the driver
needs to be enabled in the build. Incorporate it into the kernel, so any
LED consumers also work in failsafe mode.
Signed-off-by: Sander Vanheule <sander@svanheule.net>
Add a pinctrl-single node to the switch GPIO/LED control register that
disables the port LED peripheral when selected. When an RTL8231 is
instantiated, this is required to prevent the user config from being
overwritten by the peripheral.
As this is technically not a pin mux operation, but rather a peripheral
disable, using pinctrl-single for this purpose is bit of a hack, but it
does the job.
Signed-off-by: Sander Vanheule <sander@svanheule.net>
It may be possible that the bootloader has left an RTL8231 expander
configured for synchronous operation, which requires the user to signal
that the new GPIO/LED states should be latched.
As drivers typically perform one operation at a time for the higher
level kernel framework, this would require a latch on every update,
which is not very useful. Disable synchronous operation to keeps things
simple.
Signed-off-by: Sander Vanheule <sander@svanheule.net>
The allocated regmap_field object is not stored as a const reference, so
the helper function allocating the object should not return it as such.
Drop 'const' so the build doesn't complain about discarding the
qualifier.
Fixes: 6ef6014887 ("realtek: Add pinctrl support for RTL8231")
Signed-off-by: Sander Vanheule <sander@svanheule.net>
The loop scanning the available toggle rates would stop when the
requested interval exceeded the tested interval. Since the intervals are
searched from small to large, this would always trigger on the shortest
interval, or skip to the largest interval for small requested values.
To correctly clamp (ceil) the toggle rate, the loop needs to continue
until the condition is met, instead of breaking the loop.
Fixes: 6ef6014887 ("realtek: Add pinctrl support for RTL8231")
Signed-off-by: Sander Vanheule <sander@svanheule.net>
The code in 800-gpio-regmap-Bypass-cache-for-shadowed-outputs.patch
was accepted upstream as commit 897396b418d1 ("gpio: regmap: Bypass
cache for aliased inputs"). Update the filename to reflect the first
release containing this change.
Signed-off-by: Sander Vanheule <sander@svanheule.net>
Hardware specification
----------------------
* RTL9301 SoC, 1 MIPS 34KEc core @ 800MHz
* 512MB DRAM
* 64MB NAND Flash
* 24 x 10/100/1000BASE-T ports
* 4 x 10G SFP+ ports
* Power LED, Console LED, Fan Fault LED
* Reset button on front panel
* LM75 temperature sensor
* Atmel AT24C02 2kb eeprom
* fan (controllable via gpio for on/off and LM75 for low/high speed)
* UART (115200 8N1) via RJ45
Installation using serial interface
-----------------------------------
1. Prepare TFTP server & connect to serial port.
2. Connect DGS-1250 to your computer or network with one of the
1G ports. All of them will be fine.
3. Power on DGS-1250 and interrupt autoboot with "&".
4. Change U-Boot startup sequence
> setenv silent
> setenv bootcmd 'cp.l 0xb4200000 0x84000000 0x300000; bootm 0x84000000'
> saveenv
5. Enable networking within U-Boot.
> rtk network on
6. Set switch IP and TFTP server IP (optional, adjust to your setup).
> setenv ipaddr <ip>
> setenv serverip <ip>
7. Download initramfs image from TFTP server.
> tftpboot 0x84000000 <image name>
8. Boot with the downloaded image.
> bootm 0x84000000
9. With rambooted OpenWrt, backup the stock firmware.
THIS IS CRITICAL! /dev/mtd3 contains data that is not provided
in the downloadable vendor firmware images.
10. Copy sysupgrade image to the device.
11. Perform sysupgrade with the sysupgrade image.
12. After reboot, you should have functional OpenWrt.
Installation using OEM webinterface
-----------------------------------
This is not possible because the vendor image uses a ubifs based
loading technique with encrypted images. To be precise the boot
sequence basically runs as follows.
1. U-Boot starts
2. U-Boot mounts 62MB ubifs from mtd3
3. U-Boot reads Linux kernel from file uImage inside ubifs
4. Linux starts (this is a initramfs image)
5. Linux mounts ubifs
6. Linux calls a loader binary
7. Depending on current configuration first (file Image1) or
second firmware image (file Image2) is loaded and decrypted
8. Inside the decrpyted firmware image there is a executable
named “switch”
9. "switch" executable is run and the switch comes alive
Reverting to stock firmware
---------------------------
1. Boot OpenWrt from initramfs (like in installation section above)
2. Restore partition /dev/mtd3 from backup
3. Erase Openwrt special U-Boot env
# mtd erase mtd1
4. reboot
Further information
-------------------
Wiki: https://openwrt.org/toh/d-link/dgs-1250
Forum: https://forum.openwrt.org/t/support-for-d-link-dgs-1250-switches
Partition dumps: https://github.com/plappermaul/realtek-doc/tree/main/DGS-1250
Signed-off-by: Markus Stockhausen <markus.stockhausen@gmx.de>
Link: https://github.com/openwrt/openwrt/pull/22530
Signed-off-by: Hauke Mehrtens <hauke@hauke-m.de>
The four TGRX pages are currently mapped into the page range 4-7 for even
10G serdes. This is only partly right. TGRX0/1 better aligns with RTL93xx
pages TGX_STD_0/TGX_STD_1. Change the mapping. No code update needed as
the pages are not yet used anywhere.
Signed-off-by: Markus Stockhausen <markus.stockhausen@gmx.de>
Link: https://github.com/openwrt/openwrt/pull/22633
Signed-off-by: Hauke Mehrtens <hauke@hauke-m.de>
The ANA_RG pages of the RTL839x SerDes are a wild mix of WDIG, ANA_MISC
and ANA_1G2 data. Its current mapping to the TGX_STD_0 register does
not match at all. From the coding it makes most sense to remap it to the
ANA_1G2/ANA_1G2_EXT range. Adapt all consumers in the pcs driver
accordingly.
Signed-off-by: Markus Stockhausen <markus.stockhausen@gmx.de>
Link: https://github.com/openwrt/openwrt/pull/22633
Signed-off-by: Hauke Mehrtens <hauke@hauke-m.de>
With all the recent development about RTL93xx serdes it has become
clear that the RTL839x ANA_TG page mapping is not perfect. Until
know it is mapped to pages 10/11. As its naming suggests these are
serdes analogous register settings for 10G. Map it to the appropriate
ANA_10G pages to align better with RTL93xx. Adapt all consumers
in the pcs driver accordingly.
Signed-off-by: Markus Stockhausen <markus.stockhausen@gmx.de>
Link: https://github.com/openwrt/openwrt/pull/22633
Signed-off-by: Hauke Mehrtens <hauke@hauke-m.de>
The initial page naming of the debugfs page registers in the mdio
serdes driver was a mix of RTL839x and RTL93xx. Developing the
Realtek pcs driver, it was discovered that the RTL93xx IP block
shares a lot of the registers with the RTL8295 PHY.
The RTL839x serdes development is quite okay and currently on hold.
Thus drop the RTL839x derived page names and substitute them for
their RTL93xx counterpart.
This is only a cosmetic change for better readability.
Signed-off-by: Markus Stockhausen <markus.stockhausen@gmx.de>
Link: https://github.com/openwrt/openwrt/pull/22633
Signed-off-by: Hauke Mehrtens <hauke@hauke-m.de>
Realtek switches have a very simple network adapter for the SOC.
They can ship packets via DMA without further offloading features.
Even on the RTL931x devices they can barely reach 50MB/s. In the
dts there is a mix of 1G/10G definitions. To be consistent and
better reflect the performance set the link speed to 1000.
This is only cosmetic.
Signed-off-by: Markus Stockhausen <markus.stockhausen@gmx.de>
Link: https://github.com/openwrt/openwrt/pull/22639
Signed-off-by: Hauke Mehrtens <hauke@hauke-m.de>
Add patches that extends the upstream smbus support in sfp driver. This
only supports SMBus byte operations and in that case, disables hwmon and
prints warnings because of that. Using the word/block capability of our
I2C controller is totally fine for all that functionality.
The patches are currently pending upstream.
Signed-off-by: Jonas Jelonek <jelonek.jonas@gmail.com>
Link: https://github.com/openwrt/openwrt/pull/21181
Signed-off-by: Robert Marko <robimarko@gmail.com>
Between 6.12 and 6.18, several DSA switch ops have changed.
phylink_mac_* ops were moved out of dsa_switch_ops into dsa_switch using
phylink_mac_ops. Add new definitions for that and adjust the callbacks
accordingly to work with the different signatures.
get_mac_eee() has been dropped and support_eee() was added.
remove_new() has been dropped completely, allowing us to use remove()
again.
Signed-off-by: Jonas Jelonek <jelonek.jonas@gmail.com>
Link: https://github.com/openwrt/openwrt/pull/21181
Signed-off-by: Robert Marko <robimarko@gmail.com>
Between 6.12 and 6.18, neg_mode moved from struct phylink_pcs to a
parameter passed to pcs_get_state. Adjust the implementation
accordingly.
Signed-off-by: Jonas Jelonek <jelonek.jonas@gmail.com>
Link: https://github.com/openwrt/openwrt/pull/21181
Signed-off-by: Robert Marko <robimarko@gmail.com>
