c5f9a5e61c
This is an automatically generated commit which aids following Kernel patch history, as git will see the move and copy as a rename thus defeating the purpose. For the original discussion see: https://lists.openwrt.org/pipermail/openwrt-devel/2023-October/041673.html Link: https://github.com/openwrt/openwrt/pull/22896 Signed-off-by: Linus Walleij <linusw@kernel.org>
71 lines
2.2 KiB
Diff
71 lines
2.2 KiB
Diff
From ececfba255bf3616301419e47a5c824e04b60ab8 Mon Sep 17 00:00:00 2001
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From: Linus Walleij <linusw@kernel.org>
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Date: Thu, 11 Dec 2025 14:05:01 +0100
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Subject: [PATCH] ARM: dts: ixp4xx: Fix up Actiontec MI424WR DTS files
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The KS8995 switch was unconditionally wired to EthC (eth1)
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on both MI424WR variants, this is wrong: the D revision has
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the switch connected to EthB (eth0) so pull this assingment
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out of the generic MI424WR DTSI file and make it a property
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of the respective variants instead.
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Signed-off-by: Linus Walleij <linusw@kernel.org>
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Link: https://patch.msgid.link/20251211-ixp4xx-actiontec-dts-fix-v1-1-97af8e79d474@kernel.org
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Signed-off-by: Krzysztof Kozlowski <krzk@kernel.org>
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---
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.../intel/ixp/intel-ixp42x-actiontec-mi424wr-ac.dts | 11 +++++++++++
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.../intel/ixp/intel-ixp42x-actiontec-mi424wr-d.dts | 11 +++++++++++
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.../dts/intel/ixp/intel-ixp42x-actiontec-mi424wr.dtsi | 1 -
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3 files changed, 22 insertions(+), 1 deletion(-)
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--- a/arch/arm/boot/dts/intel/ixp/intel-ixp42x-actiontec-mi424wr-ac.dts
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+++ b/arch/arm/boot/dts/intel/ixp/intel-ixp42x-actiontec-mi424wr-ac.dts
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@@ -12,6 +12,17 @@
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model = "Actiontec MI424WR rev A/C";
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compatible = "actiontec,mi424wr-ac", "intel,ixp42x";
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+ /* Connect the switch to EthC */
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+ spi {
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+ ethernet-switch@0 {
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+ ethernet-ports {
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+ ethernet-port@4 {
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+ ethernet = <ðc>;
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+ };
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+ };
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+ };
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+ };
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+
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soc {
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/* EthB used for WAN */
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ethernet@c8009000 {
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--- a/arch/arm/boot/dts/intel/ixp/intel-ixp42x-actiontec-mi424wr-d.dts
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+++ b/arch/arm/boot/dts/intel/ixp/intel-ixp42x-actiontec-mi424wr-d.dts
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@@ -12,6 +12,17 @@
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model = "Actiontec MI424WR rev D";
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compatible = "actiontec,mi424wr-d", "intel,ixp42x";
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+ /* Connect the switch to EthB */
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+ spi {
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+ ethernet-switch@0 {
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+ ethernet-ports {
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+ ethernet-port@4 {
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+ ethernet = <ðb>;
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+ };
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+ };
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+ };
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+ };
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+
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soc {
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/* EthB used for LAN */
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ethernet@c8009000 {
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--- a/arch/arm/boot/dts/intel/ixp/intel-ixp42x-actiontec-mi424wr.dtsi
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+++ b/arch/arm/boot/dts/intel/ixp/intel-ixp42x-actiontec-mi424wr.dtsi
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@@ -152,7 +152,6 @@
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};
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ethernet-port@4 {
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reg = <4>;
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- ethernet = <ðc>;
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phy-mode = "mii";
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fixed-link {
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speed = <100>;
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