0bc1d99bcf
Currently, Ralink SoCs use the default ARCH_DMA_MINALIGN value of 128 bytes defined in mach-generic. This is excessive for these platforms and leads to significant memory waste in kmalloc. Override ARCH_DMA_MINALIGN to use L1_CACHE_BYTES, which is 16 bytes for RT288X and 32 bytes for other Ralink SoCs. Signed-off-by: Qingfang Deng <dqfext@gmail.com> Link: https://github.com/openwrt/openwrt/pull/23314 Signed-off-by: Hauke Mehrtens <hauke@hauke-m.de>
32 lines
1.1 KiB
Diff
32 lines
1.1 KiB
Diff
From 1dc85756b759c3ecd21a22b0aef84ed41ddc7596 Mon Sep 17 00:00:00 2001
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From: Qingfang Deng <qingfang.deng@linux.dev>
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Date: Tue, 28 Apr 2026 16:25:40 +0800
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Subject: [PATCH] MIPS: ralink: reduce ARCH_DMA_MINALIGN
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Currently, Ralink SoCs use the default ARCH_DMA_MINALIGN value of 128
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bytes defined in mach-generic. This is excessive for these platforms
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and leads to significant memory waste in kmalloc.
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Override ARCH_DMA_MINALIGN to use L1_CACHE_BYTES, which is 16 bytes for
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RT288X and 32 bytes for other Ralink SoCs.
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Signed-off-by: Qingfang Deng <qingfang.deng@linux.dev>
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Signed-off-by: Thomas Bogendoerfer <tsbogend@alpha.franken.de>
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---
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arch/mips/include/asm/mach-ralink/kmalloc.h | 9 +++++++++
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1 file changed, 9 insertions(+)
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create mode 100644 arch/mips/include/asm/mach-ralink/kmalloc.h
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--- /dev/null
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+++ b/arch/mips/include/asm/mach-ralink/kmalloc.h
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@@ -0,0 +1,9 @@
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+/* SPDX-License-Identifier: GPL-2.0 */
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+#ifndef __ASM_MACH_RALINK_KMALLOC_H
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+#define __ASM_MACH_RALINK_KMALLOC_H
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+
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+#ifdef CONFIG_DMA_NONCOHERENT
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+#define ARCH_DMA_MINALIGN L1_CACHE_BYTES
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+#endif
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+
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+#endif /* __ASM_MACH_RALINK_KMALLOC_H */
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