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openwrt/target/linux/realtek/dts/rtl9313_zyxel_xs1930-12hp.dts
Jonas Jelonek 15ff65e522 realtek: fix SYS LED for XS1930-12HP
The XS1930-12HP model from Zyxel doesn't actually use the same GPIOs for
the SYS LED. This was assumed first but proved wrong now. Instead, the
green part of the SYS LED is on another GPIO and the red part of the SYS
LED is on GPIO 0 instead of the green part. Adjust that accordingly in
the device tree.

Signed-off-by: Jonas Jelonek <jelonek.jonas@gmail.com>
Link: https://github.com/openwrt/openwrt/pull/23428
Signed-off-by: Robert Marko <robimarko@gmail.com>
2026-05-21 12:08:41 +02:00

95 lines
1.9 KiB
Plaintext

// SPDX-License-Identifier: GPL-2.0-or-later
/dts-v1/;
#include "rtl9313_zyxel_xs1930-aqr813.dtsi"
#include <dt-bindings/input/input.h>
#include <dt-bindings/gpio/gpio.h>
#include <dt-bindings/leds/common.h>
#include <dt-bindings/mux/mux.h>
#include <dt-bindings/phy/phy.h>
/ {
compatible = "zyxel,xs1930-12hp", "realtek,rtl9313-soc";
model = "Zyxel XS1930-12HP";
};
&led_set {
/* Phantom port chain padding (2 LEDs) */
led_set1 = <RTL93XX_LED_SET_NONE
RTL93XX_LED_SET_NONE>;
/* The LED PCB has two daisy-chained RTL8231 in scan mode.
* Net LEDs for P3-P12 are on the first RTL8231, P1/P2
* net LEDs are on the second. The 12 real ports provide
* 36 LED bits but the chain requires 65 bits to correctly
* span both chips. Phantom ports 1-7, 9-10 (set0, 3 LEDs
* each) and port 11 (set1, 2 LEDs) pad the chain with
* the remaining 29 bits.
*/
realtek,led-set0-force-port-mask = <0x00000000 0x000006FE>;
realtek,led-set1-force-port-mask = <0x00000000 0x00000800>;
};
&led_sys_green { gpios = <&gpio0 23 GPIO_ACTIVE_LOW>; };
&led_sys_red { gpios = <&gpio0 0 GPIO_ACTIVE_LOW>; };
&gpio0 {
poe_enable_hog {
gpio-hog;
gpios = <10 GPIO_ACTIVE_HIGH>;
output-high;
line-name = "poe-enable";
};
};
&i2c_mst1 {
/* PoE management MCU sits here */
i2c3: i2c@3 {
reg = <3>;
};
};
&mdio_ctrl {
pinctrl-names = "default";
pinctrl-0 = <&pinmux_enable_mdc_mdio_0>,
<&pinmux_enable_mdc_mdio_1>,
<&pinmux_enable_mdc_mdio_2>;
};
&mdio_bus1 {
PHY_C45(52, 0) /* AQR113C */
};
&mdio_bus2 {
PHY_C45(53, 8) /* AQR113C */
};
&switch0 {
ethernet-ports {
/* Copper ports behind AQR113C */
SWITCH_PORT_LED(52, 9, 10, 0, usxgmii)
SWITCH_PORT_LED(53, 10, 11, 0, usxgmii)
SWITCH_PORT_SFP(54, 11, 12, 0, 1)
SWITCH_PORT_SFP(55, 12, 13, 0, 2)
};
};
&port52 {
managed = "in-band-status";
};
&port53 {
managed = "in-band-status";
};
&serdes10 {
tx-polarity = <PHY_POL_INVERT>;
};
&serdes11 {
tx-polarity = <PHY_POL_INVERT>;
};