298db2f5a7
Due to hardware bugs, the PCIE Gen3 IP in Airoha AN7581 requires a special reset procedure: > MAC reset asserted thru the SCU block > PERST asserted thru the SCU for the desired PCIE lane > PHY initialization runs, clocks enabled > MAC reset deasserted > EQ config (if needed) written > PERST deasserted The existing code currently toggles PERST for all three PCIE ports every time mtk_pcie_en7581_power_up is called, resulting in PCIE link down issues. This issue was discovered during porting of the 6.18 kernel to AN7581. It is not entirely clear how the hardware seemed to function under kernel 6.12 with similar driver code, it is presumed that differences in assert/deassert times for PERST in 6.18 changed which exposed the bug. Signed-off-by: Kenneth Kasilag <kenneth@kasilag.me> Link: https://github.com/openwrt/openwrt/pull/21019 Signed-off-by: Jonas Jelonek <jelonek.jonas@gmail.com> |
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| imagebuilder | ||
| linux | ||
| llvm-bpf | ||
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| toolchain | ||
| Config.in | ||
| Makefile | ||