Novarq Tactical 1000 is a LAN9696 based switch. Specifications: * CPU: Microchip LAN9696 switch SoC * DRAM: 2GB DDR4 * Storage: * 32MB QSPI NOR * 16GB eMMC * Networking: * 24 x 10/100/1000 RJ45 via LAN8804 Quad PHY-s over QSGMII * 4 x 100/1000/2500/5000/10000 SFP+ ports * 1 x 10/100/1000 management RJ45 via LAN8840 PHY over RGMII (U-Boot too) * USB: 1 x USB2.0 Type-A * Management via USB-C (MCP2200): * UART @ 115200 baud (Default), 921600 possible * GPIO-s for bootstrap and reset * LED-s: * 2 per networking port (Green and Yellow) * Green status LED * Soft reset GPIO * Power: 12V DC barrel jack * External PoE: * Option for PoE add-on * Temperature Sensors: * TMP1075 onboard * CPU temperature * Microchip MCP79402 RTC with battery back-up * Microchip ATECC608C secure peripheral * CPU heatsink with PWM fan * Onboard header for case fan Installation instructions: 1. Connect to UART via the USB-C port 2. Connect the management port 3. Boot and interrupt U-Boot 4. TFTP the OpenWrt initramfs image and boot it 5. SCP the OpenWrt eMMC GPT image to a running OpenWrt initramfs to /tmp openwrt-microchipsw-lan969x-novarq_tactical-1000-squashfs-emmc-gpt.img.gz And decompress it via: gzip -d /tmp/openwrt-microchipsw-lan969x-novarq_tactical-1000-squashfs-emmc-gpt.img.gz 6. Wipe eMMC with: dd if=/dev/zero of=/dev/mmcblk0 bs=1M 7. Flash OpenWrt eMMC image with: dd if=/tmp/openwrt-microchipsw-lan969x-novarq_tactical-1000-squashfs-emmc-gpt.img of=/dev/mmcblk0 After a restart OpenWrt will boot, and then regular sysupgrade can be used for upgrades. Signed-off-by: Robert Marko <robert.marko@sartura.hr>
172 lines
4.6 KiB
Diff
172 lines
4.6 KiB
Diff
From 190202583edb9dcab5ca49638169d08a332f0fdf Mon Sep 17 00:00:00 2001
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From: Robert Marko <robert.marko@sartura.hr>
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Date: Sun, 2 Nov 2025 16:57:45 +0100
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Subject: [PATCH] microchip: lan969x: add Novarq Tactical 1000 v3
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Add support for Novarq Tactical 1000 v3 board as a separate platform since
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it uses 2GB of RAM and requires a different RAM configuration.
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Signed-off-by: Robert Marko <robert.marko@sartura.hr>
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---
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.../fdts/lan969x-tactical-1000-v3-ddr.dtsi | 90 +++++++++++++++++++
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.../novarq_tactical_1000_v3_tb_fw_config.dts | 30 +++++++
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.../novarq_tactical_1000_v3/platform.mk | 12 +++
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scripts/fwu/fwu.js | 2 +-
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4 files changed, 133 insertions(+), 1 deletion(-)
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create mode 100644 plat/microchip/lan969x/fdts/lan969x-tactical-1000-v3-ddr.dtsi
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create mode 100644 plat/microchip/lan969x/novarq_tactical_1000_v3/fdts/novarq_tactical_1000_v3_tb_fw_config.dts
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create mode 100644 plat/microchip/lan969x/novarq_tactical_1000_v3/platform.mk
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--- /dev/null
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+++ b/plat/microchip/lan969x/fdts/lan969x-tactical-1000-v3-ddr.dtsi
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@@ -0,0 +1,90 @@
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+// SPDX-License-Identifier: (GPL-2.0+ OR MIT)
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+/*
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+ * Copyright (C) 2022 Microchip Technology Inc. and its subsidiaries.
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+ *
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+ */
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+
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+&ddr {
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+ microchip,mem-name = "lan969x_tactical_1000_2gb 2025-11-02-13:03:23 7391dfb-dirty";
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+ microchip,mem-speed = <2400>;
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+ microchip,mem-size = <0x80000000>;
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+ microchip,mem-bus-width = <16>;
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+
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+ microchip,main-reg = <
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+ 0x00001091 /* crcparctl1 */
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+ 0x00000001 /* dbictl */
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+ 0x00000040 /* dfimisc */
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+ 0x0391820f /* dfitmg0 */
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+ 0x00040201 /* dfitmg1 */
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+ 0x40400003 /* dfiupd0 */
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+ 0x004000ff /* dfiupd1 */
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+ 0x003f7f40 /* ecccfg0 */
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+ 0x00020248 /* init0 */
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+ 0x00e80000 /* init1 */
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+ 0x0c340101 /* init3 */
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+ 0x10180200 /* init4 */
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+ 0x00110000 /* init5 */
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+ 0x00000402 /* init6 */
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+ 0x00000c19 /* init7 */
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+ 0x81040010 /* mstr */
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+ 0x00000000 /* pccfg */
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+ 0x00000000 /* pwrctl */
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+ 0x00210020 /* rfshctl0 */
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+ 0x00000000 /* rfshctl3 */
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+ >;
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+
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+ microchip,timing-reg = <
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+ 0x17131413 /* dramtmg0 */
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+ 0x0007051b /* dramtmg1 */
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+ 0x1a000010 /* dramtmg12 */
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+ 0x090b0512 /* dramtmg2 */
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+ 0x0000400c /* dramtmg3 */
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+ 0x08040409 /* dramtmg4 */
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+ 0x07070404 /* dramtmg5 */
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+ 0x07060c0b /* dramtmg8 */
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+ 0x0003040d /* dramtmg9 */
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+ 0x07000610 /* odtcfg */
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+ 0x0049014b /* rfshtmg */
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+ >;
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+
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+ microchip,mapping-reg = <
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+ 0x0000001f /* addrmap0 */
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+ 0x003f0909 /* addrmap1 */
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+ 0x00000700 /* addrmap2 */
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+ 0x00000000 /* addrmap3 */
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+ 0x00001f1f /* addrmap4 */
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+ 0x07070707 /* addrmap5 */
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+ 0x07070707 /* addrmap6 */
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+ 0x00000f07 /* addrmap7 */
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+ 0x00003f01 /* addrmap8 */
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+ >;
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+
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+ microchip,phy-reg = <
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+ 0x0000040c /* dcr */
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+ 0x0064401b /* dsgcr */
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+ 0x8000b0cf /* dtcr0 */
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+ 0x00010a37 /* dtcr1 */
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+ 0x00c01884 /* dxccr */
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+ 0x000010ba /* pgcr2 */
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+ 0x00000000 /* schcr1 */
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+ 0x00079900 /* zq0pr */
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+ 0x10077900 /* zq1pr */
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+ 0x00000000 /* zq2pr */
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+ 0x00058f00 /* zqcr */
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+ >;
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+
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+ microchip,phy_timing-reg = <
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+ 0x0827100a /* dtpr0 */
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+ 0x28250018 /* dtpr1 */
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+ 0x000702a1 /* dtpr2 */
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+ 0x03000101 /* dtpr3 */
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+ 0x02950808 /* dtpr4 */
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+ 0x00361009 /* dtpr5 */
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+ 0x4ae25710 /* ptr0 */
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+ 0x74f4950e /* ptr1 */
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+ 0x00083def /* ptr2 */
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+ 0x2a192000 /* ptr3 */
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+ 0x1003a000 /* ptr4 */
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+ >;
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+
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+};
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--- /dev/null
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+++ b/plat/microchip/lan969x/novarq_tactical_1000_v3/fdts/novarq_tactical_1000_v3_tb_fw_config.dts
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@@ -0,0 +1,30 @@
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+/*
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+ * Copyright (c) 2022, Microchip Technology Inc. and its subsidiaries.
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+ *
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+ * SPDX-License-Identifier: BSD-3-Clause
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+ */
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+
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+/dts-v1/;
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+
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+#include "lan969x.dtsi"
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+#include "lan969x-tactical-1000-v3-ddr.dtsi"
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+
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+&emmc_clk {
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+ clock-frequency = <100000000>;
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+};
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+
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+&sdmmc0 {
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+ status = "okay";
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+ bus-width = <8>;
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+};
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+
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+&qspi0 {
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+ status = "okay";
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+ spi-flash@0 {
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+ compatible = "jedec,spi-nor";
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+ reg = <0>;
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+ spi-max-frequency = <100000000>;
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+ spi-tx-bus-width = <4>;
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+ spi-rx-bus-width = <4>;
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+ };
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+};
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--- /dev/null
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+++ b/plat/microchip/lan969x/novarq_tactical_1000_v3/platform.mk
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@@ -0,0 +1,12 @@
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+#
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+# Copyright (c) 2021, Microchip Technology Inc. and its subsidiaries.
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+#
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+# SPDX-License-Identifier: BSD-3-Clause
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+#
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+
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+include plat/microchip/lan969x/common/common.mk
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+
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+# This is used in lan969x code
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+$(eval $(call add_define,LAN969X_ASIC))
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+# This is used in common drivers
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+$(eval $(call add_define,LAN966X_ASIC))
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--- a/scripts/fwu/fwu.js
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+++ b/scripts/fwu/fwu.js
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@@ -91,7 +91,7 @@ const platforms = [
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"ddr_diag": ddr_diag_regs_lan969x,
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"ddr_regs": ddr_regs_lan969x,
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"ddr_speed": lan969x_speeds,
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- "bl2u_compat": ["lan969x_a0", "lan969x_svb"],
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+ "bl2u_compat": ["lan969x_a0", "lan969x_svb", "novarq_tactical_1000_v3"],
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},
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];
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