716661d562
The Allwinner T113-s3 (sun8i) SoC features a dual-core Cortex-A7 ARM CPU and 128MB of DDR3 memory in the same physical package. It supports industrial temperature ranges. Most of the IP blocks are shared with the D1/D1s core. There are multiple variants of the SoC, which may vary in the included memory size, with some of them including a C906 RISC-V co-processor. Boards supported: - MangoPi MQDual T113 - wireless-only (RTL8723DS) - MYIR MYD-YT113 eMMC - 1Gbit ethernet (Motorcomm YT8531 PHY) - 4GByte eMMC - M.2-type slot for 4G/5G cards, plus 2x SIM slot - USB 2.0 ports - GPIO/I2C/SPI/CAN ports - FNLink 6131 (rtl8733bu) wifi module - MYIR MYD-YT113 SPI - Same as above but with 256Mbyte SPI-NAND flash instead of eMMC - Rongpin RP-T113 - 100Mbit ethernet (ICplus IP101GR PHY) - miniPCIe slot for 4G cards, plus 1x SIM slot - 3x USB 2.0 ports - RTL8723BS wireless - HYM8563 RTC - GPIO/I2C/SPI/CAN ports - Olimex T113-Olinuxino - 100Mbit ethernet (ICplus IP101GR) - UEXT connector (GPIO/I2C/SPI ports) - 1x USB 2.0 - audio jack, LEDC Installation: Use the standard sunxi installation to an SD-card. Signed-off-by: Zoltan HERPAI <wigyori@uid0.hu>
60 lines
2.3 KiB
Diff
60 lines
2.3 KiB
Diff
From 41ee73b7621cd4b689ad9c9f107aff2e8c30ef2f Mon Sep 17 00:00:00 2001
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From: Zoltan HERPAI <wigyori@uid0.hu>
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Date: Sat, 3 Jun 2023 23:41:31 +0200
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Subject: [PATCH 4007/4018] sunxi: add support for UART5 in Port E group on
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T133
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Signed-off-by: Zoltan HERPAI <wigyori@uid0.hu>
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---
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arch/arm/include/asm/arch-sunxi/serial.h | 1 +
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arch/arm/mach-sunxi/board.c | 4 ++++
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drivers/pinctrl/sunxi/pinctrl-sunxi.c | 1 +
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include/configs/sunxi-common.h | 3 +++
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4 files changed, 9 insertions(+)
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--- a/arch/arm/include/asm/arch-sunxi/serial.h
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+++ b/arch/arm/include/asm/arch-sunxi/serial.h
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@@ -20,6 +20,7 @@
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#elif defined(CONFIG_SUNXI_GEN_NCAT2)
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#define SUNXI_UART0_BASE 0x02500000
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#define SUNXI_R_UART_BASE 0 // 0x07080000 (?>
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+#define SUNXI_UART5_BASE (SUNXI_UART0_BASE + 0x1400)
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#else
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#define SUNXI_UART0_BASE 0x01c28000
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#define SUNXI_R_UART_BASE 0x01f02800
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--- a/arch/arm/mach-sunxi/board.c
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+++ b/arch/arm/mach-sunxi/board.c
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@@ -185,6 +185,10 @@ static int gpio_init(void)
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sunxi_gpio_set_cfgpin(SUNXI_GPL(2), SUN8I_GPL_R_UART);
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sunxi_gpio_set_cfgpin(SUNXI_GPL(3), SUN8I_GPL_R_UART);
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sunxi_gpio_set_pull(SUNXI_GPL(3), SUNXI_GPIO_PULL_UP);
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+#elif CONFIG_CONS_INDEX == 6 && defined(CONFIG_MACH_SUN8I_R528)
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+ sunxi_gpio_set_cfgpin(SUNXI_GPE(6), 9);
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+ sunxi_gpio_set_cfgpin(SUNXI_GPE(7), 9);
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+ sunxi_gpio_set_pull(SUNXI_GPE(7), SUNXI_GPIO_PULL_UP);
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#elif CONFIG_CONS_INDEX == 2 && defined(CONFIG_MACH_SUN8I) && \
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!defined(CONFIG_MACH_SUN8I_R40)
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sunxi_gpio_set_cfgpin(SUNXI_GPG(6), SUN8I_GPG_UART1);
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--- a/drivers/pinctrl/sunxi/pinctrl-sunxi.c
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+++ b/drivers/pinctrl/sunxi/pinctrl-sunxi.c
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@@ -615,6 +615,7 @@ static const struct sunxi_pinctrl_functi
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{ "uart1", 2 }, /* PG6-PG7 */
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{ "uart2", 7 }, /* PB0-PB1 */
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{ "uart3", 7 }, /* PB6-PB7 */
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+ { "uart5", 3 }, /* PE6-PE7 */
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};
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static const struct sunxi_pinctrl_desc __maybe_unused sun20i_d1_pinctrl_desc = {
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--- a/include/configs/sunxi-common.h
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+++ b/include/configs/sunxi-common.h
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@@ -30,6 +30,9 @@
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# define CFG_SYS_NS16550_COM3 SUNXI_UART2_BASE
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# define CFG_SYS_NS16550_COM4 SUNXI_UART3_BASE
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# define CFG_SYS_NS16550_COM5 SUNXI_R_UART_BASE
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+#if defined(CONFIG_SUNXI_GEN_NCAT2)
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+# define CFG_SYS_NS16550_COM6 SUNXI_UART5_BASE
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+#endif
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#endif
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/****************************************************************************
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