The rtl9300,smi-address property was first developed for the RTL930x
targets. So it got a device specific prefix. Nowadays it is used for
RTL931x targets too. Convert it to our gerneric realtek prefix.
find ./realtek -type f -exec sed -i 's/rtl9300,smi-address/realtek,smi-address/g' {} +
Signed-off-by: Markus Stockhausen <markus.stockhausen@gmx.de>
Link: https://github.com/openwrt/openwrt/pull/21343
Signed-off-by: Robert Marko <robimarko@gmail.com>
211 lines
3.9 KiB
Plaintext
211 lines
3.9 KiB
Plaintext
// SPDX-License-Identifier: GPL-2.0-or-later
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/dts-v1/;
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#include "rtl930x.dtsi"
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#include <dt-bindings/input/input.h>
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#include <dt-bindings/gpio/gpio.h>
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#include <dt-bindings/leds/common.h>
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/ {
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compatible = "plasmacloud,mcx3", "realtek,rtl9302-soc";
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model = "Plasma Cloud MCX3";
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chosen {
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/* get active mtdparts from u-boot */
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/delete-property/ bootargs;
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};
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aliases {
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led-boot = &led_power;
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led-running = &led_power;
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led-failsafe = &led_power;
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led-upgrade = &led_power;
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label-mac-device = ðernet0;
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};
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memory@0 {
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reg = <0x0 0x10000000>;
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};
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keys {
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compatible = "gpio-keys";
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mode {
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label = "reset";
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gpios = <&gpio0 1 GPIO_ACTIVE_LOW>;
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linux,code = <KEY_RESTART>;
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};
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};
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i2c0: i2c-gpio0 {
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compatible = "i2c-gpio";
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#address-cells = <1>;
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#size-cells = <0>;
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sda-gpios = <&gpio0 9 GPIO_ACTIVE_HIGH>;
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scl-gpios = <&gpio0 8 GPIO_ACTIVE_HIGH>;
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i2c-gpio,delay-us = <5>; /* ~100 kHz */
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};
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sfp0: sfp-lan3 {
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compatible = "sff,sfp";
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i2c-bus = <&i2c0>;
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los-gpio = <&gpio0 11 GPIO_ACTIVE_HIGH>;
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mod-def0-gpio = <&gpio0 12 GPIO_ACTIVE_LOW>;
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tx-disable-gpio = <&gpio0 22 GPIO_ACTIVE_HIGH>;
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};
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leds {
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compatible = "gpio-leds";
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pinctrl-names = "default";
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pinctrl-0 = <&pinmux_disable_sys_led>;
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led_power: led-0 {
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color = <LED_COLOR_ID_GREEN>;
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function = LED_FUNCTION_POWER;
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gpios = <&gpio0 0 GPIO_ACTIVE_LOW>;
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default-state = "on";
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};
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led-1 {
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color = <LED_COLOR_ID_RED>;
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function = LED_FUNCTION_STATUS;
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gpios = <&gpio0 13 GPIO_ACTIVE_LOW>;
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default-state = "on";
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linux,default-trigger = "heartbeat";
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};
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};
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led_set@0 {
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compatible = "realtek,rtl9300-leds";
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active-low;
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led_set0 = <(RTL93XX_LED_SET_10G | RTL93XX_LED_SET_5G |
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RTL93XX_LED_SET_2P5G | RTL93XX_LED_SET_1G |
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RTL93XX_LED_SET_100M | RTL93XX_LED_SET_10M |
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RTL93XX_LED_SET_LINK | RTL93XX_LED_SET_ACT)>;
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};
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};
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&spi0 {
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status = "okay";
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flash@0 {
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compatible = "jedec,spi-nor";
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reg = <0>;
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spi-max-frequency = <10000000>;
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partitions {
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compatible = "fixed-partitions";
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#address-cells = <1>;
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#size-cells = <1>;
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partition@0 {
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label = "u-boot";
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reg = <0x0 0xe0000>;
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read-only;
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};
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partition@e0000 {
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label = "u-boot-env";
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reg = <0xe0000 0x10000>;
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nvmem-layout {
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compatible = "u-boot,env";
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macaddr_ubootenv_ethaddr: ethaddr {
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#nvmem-cell-cells = <1>;
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};
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};
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};
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partition@f0000 {
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label = "u-boot-env2";
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reg = <0xf0000 0x10000>;
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};
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partition@100000 {
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label = "firmware1";
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reg = <0x100000 0xf80000>;
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compatible = "openwrt,uimage", "denx,uimage";
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openwrt,ih-magic = <0x93000000>;
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};
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partition@1080000 {
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label = "firmware2";
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reg = <0x1080000 0xf80000>;
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compatible = "openwrt,uimage", "denx,uimage";
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openwrt,ih-magic = <0x93000000>;
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};
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};
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};
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};
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ðernet0 {
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nvmem-cells = <&macaddr_ubootenv_ethaddr 0>;
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nvmem-cell-names = "mac-address";
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};
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&mdio_bus0 {
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/* External RTL8224 PHY */
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phy0: ethernet-phy@0 {
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reg = <0>;
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compatible = "ethernet-phy-ieee802.3-c45";
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realtek,smi-address = <0 0>;
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};
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phy1: ethernet-phy@1 {
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reg = <1>;
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compatible = "ethernet-phy-ieee802.3-c45";
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realtek,smi-address = <0 1>;
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};
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};
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&switch0 {
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ports {
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#address-cells = <1>;
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#size-cells = <0>;
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SWITCH_PORT_SDS(0, 2, 2, 10g-qxgmii)
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SWITCH_PORT_SDS(1, 1, 2, 10g-qxgmii)
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port@26 {
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reg = <26>;
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label = "lan3";
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pcs-handle = <&serdes8>;
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phy-mode = "1000base-x";
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sfp = <&sfp0>;
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led-set = <0>;
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managed = "in-band-status";
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nvmem-cells = <&macaddr_ubootenv_ethaddr 3>;
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nvmem-cell-names = "mac-address";
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};
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/* CPU-port */
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port@28 {
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ethernet = <ðernet0>;
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reg = <28>;
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phy-mode = "internal";
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fixed-link {
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speed = <1000>;
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full-duplex;
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};
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};
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};
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};
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&port0 {
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nvmem-cells = <&macaddr_ubootenv_ethaddr 2>;
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nvmem-cell-names = "mac-address";
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};
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&port1 {
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nvmem-cells = <&macaddr_ubootenv_ethaddr 1>;
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nvmem-cell-names = "mac-address";
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};
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