catspeed-cc/openwrt
1
1
Fork 0
Code
7bfa1fa83b
openwrt/target/linux/realtek/dts/rtl9311_linksys_lgs352c.dts
Markus Stockhausen 7bfa1fa83b realtek: rename smi-address dts property 
The rtl9300,smi-address property was first developed for the RTL930x
targets. So it got a device specific prefix. Nowadays it is used for
RTL931x targets too. Convert it to our gerneric realtek prefix.

find ./realtek -type f -exec sed -i 's/rtl9300,smi-address/realtek,smi-address/g' {} +

Signed-off-by: Markus Stockhausen <markus.stockhausen@gmx.de>
Link: https://github.com/openwrt/openwrt/pull/21343
Signed-off-by: Robert Marko <robimarko@gmail.com>
2026-01-02 18:05:02 +01:00

428 lines
9.4 KiB
Plaintext
Raw Blame History

// SPDX-License-Identifier: (GPL-2.0-or-later or MIT)
/dts-v1/;
#include "rtl931x.dtsi"
#include "rtl93xx_linksys_lgs3xxc_nand_common.dtsi"
/ {
compatible = "linksys,lgs352c", "realtek,rtl9311-soc";
model = "Linksys LGS352C";
memory@0 {
device_type = "memory";
reg = <0x00000000 0x10000000>, /* 256 MiB lowmem */
<0x90000000 0x10000000>; /* 256 MiB highmem */
};
};
&i2c_mst1 {
status = "okay";
i2c2: i2c@2 {
reg = <2>;
lm63@4c {
compatible = "national,lm63";
reg = <0x4c>;
};
};
i2c5: i2c@5 {
reg = <5>;
};
i2c6: i2c@6 {
reg = <6>;
};
i2c7: i2c@7 {
reg = <7>;
};
i2c9: i2c@9 {
reg = <9>;
};
};
&sfp0 {
i2c-bus = <&i2c5>;
};
&sfp1 {
i2c-bus = <&i2c6>;
};
&sfp2 {
i2c-bus = <&i2c7>;
};
&sfp3 {
i2c-bus = <&i2c9>;
};
&mdio_aux {
status = "okay";
gpio1: expander@3 {
compatible = "realtek,rtl8231";
reg = <3>;
gpio-controller;
#gpio-cells = <2>;
gpio-ranges = <&gpio1 0 0 37>;
led-controller {
compatible = "realtek,rtl8231-leds";
status = "disabled";
};
};
};
&mdio_ctrl {
pinctrl-names = "default";
pinctrl-0 = <&pinmux_enable_mdc_mdio_0>,
<&pinmux_enable_mdc_mdio_1>;
};
&mdio_bus0 {
phy0: ethernet-phy@0 {
reg = <0>;
compatible = "ethernet-phy-ieee802.3-c22";
realtek,smi-address = <0 0>;
};
phy1: ethernet-phy@1 {
reg = <1>;
compatible = "ethernet-phy-ieee802.3-c22";
realtek,smi-address = <0 1>;
};
phy2: ethernet-phy@2 {
reg = <2>;
compatible = "ethernet-phy-ieee802.3-c22";
realtek,smi-address = <0 2>;
};
phy3: ethernet-phy@3 {
reg = <3>;
compatible = "ethernet-phy-ieee802.3-c22";
realtek,smi-address = <0 3>;
};
phy4: ethernet-phy@4 {
reg = <4>;
compatible = "ethernet-phy-ieee802.3-c22";
realtek,smi-address = <0 4>;
};
phy5: ethernet-phy@5 {
reg = <5>;
compatible = "ethernet-phy-ieee802.3-c22";
realtek,smi-address = <0 5>;
};
phy6: ethernet-phy@6 {
reg = <6>;
compatible = "ethernet-phy-ieee802.3-c22";
realtek,smi-address = <0 6>;
};
phy7: ethernet-phy@7 {
reg = <7>;
compatible = "ethernet-phy-ieee802.3-c22";
realtek,smi-address = <0 7>;
};
phy8: ethernet-phy@8 {
reg = <8>;
compatible = "ethernet-phy-ieee802.3-c22";
realtek,smi-address = <0 8>;
};
phy9: ethernet-phy@9 {
reg = <9>;
compatible = "ethernet-phy-ieee802.3-c22";
realtek,smi-address = <0 9>;
};
phy10: ethernet-phy@10 {
reg = <10>;
compatible = "ethernet-phy-ieee802.3-c22";
realtek,smi-address = <0 10>;
};
phy11: ethernet-phy@11 {
reg = <11>;
compatible = "ethernet-phy-ieee802.3-c22";
realtek,smi-address = <0 11>;
};
phy12: ethernet-phy@12 {
reg = <12>;
compatible = "ethernet-phy-ieee802.3-c22";
realtek,smi-address = <0 12>;
};
phy13: ethernet-phy@13 {
reg = <13>;
compatible = "ethernet-phy-ieee802.3-c22";
realtek,smi-address = <0 13>;
};
phy14: ethernet-phy@14 {
reg = <14>;
compatible = "ethernet-phy-ieee802.3-c22";
realtek,smi-address = <0 14>;
};
phy15: ethernet-phy@15 {
reg = <15>;
compatible = "ethernet-phy-ieee802.3-c22";
realtek,smi-address = <0 15>;
};
phy16: ethernet-phy@16 {
reg = <16>;
compatible = "ethernet-phy-ieee802.3-c22";
realtek,smi-address = <0 16>;
};
phy17: ethernet-phy@17 {
reg = <17>;
compatible = "ethernet-phy-ieee802.3-c22";
realtek,smi-address = <0 17>;
};
phy18: ethernet-phy@18 {
reg = <18>;
compatible = "ethernet-phy-ieee802.3-c22";
realtek,smi-address = <0 18>;
};
phy19: ethernet-phy@19 {
reg = <19>;
compatible = "ethernet-phy-ieee802.3-c22";
realtek,smi-address = <0 19>;
};
phy20: ethernet-phy@20 {
reg = <20>;
compatible = "ethernet-phy-ieee802.3-c22";
realtek,smi-address = <0 20>;
};
phy21: ethernet-phy@21 {
reg = <21>;
compatible = "ethernet-phy-ieee802.3-c22";
realtek,smi-address = <0 21>;
};
phy22: ethernet-phy@22 {
reg = <22>;
compatible = "ethernet-phy-ieee802.3-c22";
realtek,smi-address = <0 22>;
};
phy23: ethernet-phy@23 {
reg = <23>;
compatible = "ethernet-phy-ieee802.3-c22";
realtek,smi-address = <0 23>;
};
phy24: ethernet-phy@24 {
reg = <24>;
compatible = "ethernet-phy-ieee802.3-c22";
realtek,smi-address = <1 0>;
};
phy25: ethernet-phy@25 {
reg = <25>;
compatible = "ethernet-phy-ieee802.3-c22";
realtek,smi-address = <1 1>;
};
phy26: ethernet-phy@26 {
reg = <26>;
compatible = "ethernet-phy-ieee802.3-c22";
realtek,smi-address = <1 2>;
};
phy27: ethernet-phy@27 {
reg = <27>;
compatible = "ethernet-phy-ieee802.3-c22";
realtek,smi-address = <1 3>;
};
phy28: ethernet-phy@28 {
reg = <28>;
compatible = "ethernet-phy-ieee802.3-c22";
realtek,smi-address = <1 4>;
};
phy29: ethernet-phy@29 {
reg = <29>;
compatible = "ethernet-phy-ieee802.3-c22";
realtek,smi-address = <1 5>;
};
phy30: ethernet-phy@30 {
reg = <30>;
compatible = "ethernet-phy-ieee802.3-c22";
realtek,smi-address = <1 6>;
};
phy31: ethernet-phy@31 {
reg = <31>;
compatible = "ethernet-phy-ieee802.3-c22";
realtek,smi-address = <1 7>;
};
phy32: ethernet-phy@32 {
reg = <32>;
compatible = "ethernet-phy-ieee802.3-c22";
realtek,smi-address = <1 8>;
};
phy33: ethernet-phy@33 {
reg = <33>;
compatible = "ethernet-phy-ieee802.3-c22";
realtek,smi-address = <1 9>;
};
phy34: ethernet-phy@34 {
reg = <34>;
compatible = "ethernet-phy-ieee802.3-c22";
realtek,smi-address = <1 10>;
};
phy35: ethernet-phy@35 {
reg = <35>;
compatible = "ethernet-phy-ieee802.3-c22";
realtek,smi-address = <1 11>;
};
phy36: ethernet-phy@36 {
reg = <36>;
compatible = "ethernet-phy-ieee802.3-c22";
realtek,smi-address = <1 12>;
};
phy37: ethernet-phy@37 {
reg = <37>;
compatible = "ethernet-phy-ieee802.3-c22";
realtek,smi-address = <1 13>;
};
phy38: ethernet-phy@38 {
reg = <38>;
compatible = "ethernet-phy-ieee802.3-c22";
realtek,smi-address = <1 14>;
};
phy39: ethernet-phy@39 {
reg = <39>;
compatible = "ethernet-phy-ieee802.3-c22";
realtek,smi-address = <1 15>;
};
phy40: ethernet-phy@40 {
reg = <40>;
compatible = "ethernet-phy-ieee802.3-c22";
realtek,smi-address = <1 16>;
};
phy41: ethernet-phy@41 {
reg = <41>;
compatible = "ethernet-phy-ieee802.3-c22";
realtek,smi-address = <1 17>;
};
phy42: ethernet-phy@42 {
reg = <42>;
compatible = "ethernet-phy-ieee802.3-c22";
realtek,smi-address = <1 18>;
};
phy43: ethernet-phy@43 {
reg = <43>;
compatible = "ethernet-phy-ieee802.3-c22";
realtek,smi-address = <1 19>;
};
phy44: ethernet-phy@44 {
reg = <44>;
compatible = "ethernet-phy-ieee802.3-c22";
realtek,smi-address = <1 20>;
};
phy45: ethernet-phy@45 {
reg = <45>;
compatible = "ethernet-phy-ieee802.3-c22";
realtek,smi-address = <1 21>;
};
phy46: ethernet-phy@46 {
reg = <46>;
compatible = "ethernet-phy-ieee802.3-c22";
realtek,smi-address = <1 22>;
};
phy47: ethernet-phy@47 {
reg = <47>;
compatible = "ethernet-phy-ieee802.3-c22";
realtek,smi-address = <1 23>;
};
};
&switch0 {
ports {
#address-cells = <1>;
#size-cells = <0>;
SWITCH_PORT_SDS(0, 1, 2, usxgmii)
SWITCH_PORT_SDS(1, 2, 2, usxgmii)
SWITCH_PORT_SDS(2, 3, 2, usxgmii)
SWITCH_PORT_SDS(3, 4, 2, usxgmii)
SWITCH_PORT_SDS(4, 5, 2, usxgmii)
SWITCH_PORT_SDS(5, 6, 2, usxgmii)
SWITCH_PORT_SDS(6, 7, 2, usxgmii)
SWITCH_PORT_SDS(7, 8, 2, usxgmii)
SWITCH_PORT_SDS(8, 9, 3, usxgmii)
SWITCH_PORT_SDS(9, 10, 3, usxgmii)
SWITCH_PORT_SDS(10, 11, 3, usxgmii)
SWITCH_PORT_SDS(11, 12, 3, usxgmii)
SWITCH_PORT_SDS(12, 13, 3, usxgmii)
SWITCH_PORT_SDS(13, 14, 3, usxgmii)
SWITCH_PORT_SDS(14, 15, 3, usxgmii)
SWITCH_PORT_SDS(15, 16, 3, usxgmii)
SWITCH_PORT_SDS(16, 17, 4, usxgmii)
SWITCH_PORT_SDS(17, 18, 4, usxgmii)
SWITCH_PORT_SDS(18, 19, 4, usxgmii)
SWITCH_PORT_SDS(19, 20, 4, usxgmii)
SWITCH_PORT_SDS(20, 21, 4, usxgmii)
SWITCH_PORT_SDS(21, 22, 4, usxgmii)
SWITCH_PORT_SDS(22, 23, 4, usxgmii)
SWITCH_PORT_SDS(23, 24, 4, usxgmii)
SWITCH_PORT_SDS(24, 25, 5, usxgmii)
SWITCH_PORT_SDS(25, 26, 5, usxgmii)
SWITCH_PORT_SDS(26, 27, 5, usxgmii)
SWITCH_PORT_SDS(27, 28, 5, usxgmii)
SWITCH_PORT_SDS(28, 29, 5, usxgmii)
SWITCH_PORT_SDS(29, 30, 5, usxgmii)
SWITCH_PORT_SDS(30, 31, 5, usxgmii)
SWITCH_PORT_SDS(31, 32, 5, usxgmii)
SWITCH_PORT_SDS(32, 33, 6, usxgmii)
SWITCH_PORT_SDS(33, 34, 6, usxgmii)
SWITCH_PORT_SDS(34, 35, 6, usxgmii)
SWITCH_PORT_SDS(35, 36, 6, usxgmii)
SWITCH_PORT_SDS(36, 37, 6, usxgmii)
SWITCH_PORT_SDS(37, 38, 6, usxgmii)
SWITCH_PORT_SDS(38, 39, 6, usxgmii)
SWITCH_PORT_SDS(39, 40, 6, usxgmii)
SWITCH_PORT_SDS(40, 41, 7, usxgmii)
SWITCH_PORT_SDS(41, 42, 7, usxgmii)
SWITCH_PORT_SDS(42, 43, 7, usxgmii)
SWITCH_PORT_SDS(43, 44, 7, usxgmii)
SWITCH_PORT_SDS(44, 45, 7, usxgmii)
SWITCH_PORT_SDS(45, 46, 7, usxgmii)
SWITCH_PORT_SDS(46, 47, 7, usxgmii)
SWITCH_PORT_SDS(47, 48, 7, usxgmii)
port@48 {
reg = <48>;
label = "lan49";
pcs-handle = <&serdes8>;
phy-mode = "1000base-x";
managed = "in-band-status";
sfp = <&sfp0>;
};
port@49 {
reg = <49>;
label = "lan50";
pcs-handle = <&serdes9>;
phy-mode = "1000base-x";
managed = "in-band-status";
sfp = <&sfp1>;
};
port@50 {
reg = <50>;
label = "lan51";
pcs-handle = <&serdes10>;
phy-mode = "1000base-x";
managed = "in-band-status";
sfp = <&sfp2>;
};
port@51 {
reg = <51>;
label = "lan52";
pcs-handle = <&serdes11>;
phy-mode = "1000base-x";
managed = "in-band-status";
sfp = <&sfp3>;
};
port@56 {
ethernet = <&ethernet0>;
reg = <56>;
phy-mode = "internal";
fixed-link {
speed = <10000>;
full-duplex;
};
};
};
};
View Git Blame Copy Permalink