7ea10c7015
I generate patches form git, so maintaining an old numbering scheme does not integrate well with my workflow. renumber the pacthes here so that the commit shows only the changes to the patches. Signed-off-by: Alexandru Gagniuc <mr.nuke.me@gmail.com> Link: https://github.com/openwrt/openwrt/pull/21506 Signed-off-by: Robert Marko <robimarko@gmail.com>
71 lines
2.2 KiB
Diff
71 lines
2.2 KiB
Diff
From 87da3bbd25eb0a17e2c698120528e76c26b326d0 Mon Sep 17 00:00:00 2001
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From: Mantas Pucka <mantas@8devices.com>
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Date: Mon, 2 Jun 2025 17:18:13 +0300
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Subject: [PATCH] net: pcs: ipq-uniphy: control MISC2 register for 2.5G support
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When 2500base-x mode is enabled MISC2 regsister needs to have different
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value than for other 1G modes.
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Signed-off-by: Mantas Pucka <mantas@8devices.com>
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---
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drivers/net/pcs/pcs-qcom-ipq9574.c | 17 ++++++++++++++++-
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1 file changed, 16 insertions(+), 1 deletion(-)
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--- a/drivers/net/pcs/pcs-qcom-ipq9574.c
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+++ b/drivers/net/pcs/pcs-qcom-ipq9574.c
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@@ -22,6 +22,11 @@
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#define PCS_CALIBRATION 0x1e0
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#define PCS_CALIBRATION_DONE BIT(7)
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+#define PCS_MISC2 0x218
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+#define PCS_MISC2_MODE_MASK GENMASK(6, 5)
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+#define PCS_MISC2_MODE_SGMII FIELD_PREP(PCS_MISC2_MODE_MASK, 0x1)
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+#define PCS_MISC2_MODE_SGMII_PLUS FIELD_PREP(PCS_MISC2_MODE_MASK, 0x2)
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+
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#define PCS_MODE_CTRL 0x46c
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#define PCS_MODE_SEL_MASK GENMASK(12, 8)
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#define PCS_MODE_SGMII FIELD_PREP(PCS_MODE_SEL_MASK, 0x4)
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@@ -275,7 +280,7 @@ static int ipq_pcs_config_mode(struct ip
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phy_interface_t interface)
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{
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unsigned long rate = 125000000;
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- unsigned int val, mask;
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+ unsigned int val, mask, misc2 = 0;
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int ret;
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/* Configure PCS interface mode */
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@@ -283,6 +288,7 @@ static int ipq_pcs_config_mode(struct ip
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switch (interface) {
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case PHY_INTERFACE_MODE_SGMII:
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val = PCS_MODE_SGMII;
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+ misc2 = PCS_MISC2_MODE_SGMII;
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break;
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case PHY_INTERFACE_MODE_QSGMII:
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val = PCS_MODE_QSGMII;
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@@ -290,9 +296,11 @@ static int ipq_pcs_config_mode(struct ip
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case PHY_INTERFACE_MODE_1000BASEX:
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mask |= PCS_MODE_SGMII_MODE_MASK;
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val = PCS_MODE_SGMII | PCS_MODE_SGMII_MODE_1000BASEX;
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+ misc2 = PCS_MISC2_MODE_SGMII;
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break;
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case PHY_INTERFACE_MODE_2500BASEX:
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val = PCS_MODE_2500BASEX;
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+ misc2 = PCS_MISC2_MODE_SGMII_PLUS;
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rate = 312500000;
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break;
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case PHY_INTERFACE_MODE_USXGMII:
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@@ -315,6 +323,13 @@ static int ipq_pcs_config_mode(struct ip
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if (ret)
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return ret;
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}
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+
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+ if (misc2) {
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+ ret = regmap_update_bits(qpcs->regmap, PCS_MISC2,
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+ PCS_MISC2_MODE_MASK, misc2);
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+ if (ret)
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+ return ret;
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+ }
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/* PCS PLL reset */
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ret = regmap_clear_bits(qpcs->regmap, PCS_PLL_RESET, PCS_ANA_SW_RESET);
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