1d9fe3467b
This is an automatically generated commit which aids following Kernel patch history, as git will see the move and copy as a rename thus defeating the purpose. For the original discussion see: https://lists.openwrt.org/pipermail/openwrt-devel/2023-October/041673.html Signed-off-by: Zoltan HERPAI <wigyori@uid0.hu>
61 lines
1.7 KiB
Diff
61 lines
1.7 KiB
Diff
From: Samuel Holland <samuel@sholland.org>
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Subject: riscv: dts: allwinner: d1: Add LED controller node
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Date: Sun, 29 Oct 2023 16:26:58 -0500
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Allwinner D1 contains an LED controller. Add its devicetree node, as
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well as the pinmux used by the reference board design.
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Acked-by: Guo Ren <guoren@kernel.org>
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Reviewed-by: Jernej Skrabec <jernej.skrabec@gmail.com>
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Tested-by: Trevor Woerner <twoerner@gmail.com>
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Signed-off-by: Samuel Holland <samuel@sholland.org>
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---
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(no changes since v5)
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Changes in v5:
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- New patch for v5
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arch/riscv/boot/dts/allwinner/sun20i-d1.dtsi | 6 ++++++
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arch/riscv/boot/dts/allwinner/sunxi-d1s-t113.dtsi | 15 +++++++++++++++
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2 files changed, 21 insertions(+)
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--- a/arch/riscv/boot/dts/allwinner/sun20i-d1.dtsi
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+++ b/arch/riscv/boot/dts/allwinner/sun20i-d1.dtsi
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@@ -59,6 +59,12 @@
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};
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/omit-if-no-ref/
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+ ledc_pc0_pin: ledc-pc0-pin {
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+ pins = "PC0";
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+ function = "ledc";
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+ };
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+
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+ /omit-if-no-ref/
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uart0_pb8_pins: uart0-pb8-pins {
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pins = "PB8", "PB9";
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function = "uart0";
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--- a/arch/riscv/boot/dts/allwinner/sunxi-d1s-t113.dtsi
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+++ b/arch/riscv/boot/dts/allwinner/sunxi-d1s-t113.dtsi
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@@ -156,6 +156,21 @@
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#reset-cells = <1>;
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};
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+ ledc: led-controller@2008000 {
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+ compatible = "allwinner,sun20i-d1-ledc",
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+ "allwinner,sun50i-a100-ledc";
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+ reg = <0x2008000 0x400>;
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+ interrupts = <SOC_PERIPHERAL_IRQ(20) IRQ_TYPE_LEVEL_HIGH>;
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+ clocks = <&ccu CLK_BUS_LEDC>, <&ccu CLK_LEDC>;
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+ clock-names = "bus", "mod";
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+ resets = <&ccu RST_BUS_LEDC>;
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+ dmas = <&dma 42>;
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+ dma-names = "tx";
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+ status = "disabled";
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+ #address-cells = <1>;
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+ #size-cells = <0>;
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+ };
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+
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gpadc: adc@2009000 {
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compatible = "allwinner,sun20i-d1-gpadc";
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reg = <0x2009000 0x400>;
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