86e3c31bcc
This is an automatically generated commit which aids following Kernel patch history, as git will see the move and copy as a rename thus defeating the purpose. For the original discussion see: https://lists.openwrt.org/pipermail/openwrt-devel/2023-October/041673.html Signed-off-by: Tianling Shen <cnsztl@immortalwrt.org> Link: https://github.com/openwrt/openwrt/pull/23139 Signed-off-by: Nick Hainke <vincent@systemli.org>
41 lines
1.2 KiB
Diff
41 lines
1.2 KiB
Diff
From 0000000000000000000000000000000000000000 Mon Sep 17 00:00:00 2001
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From: Nicolas Frattaroli <nicolas.frattaroli@collabora.com>
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Date: Mon, 25 Aug 2025 09:27:08 +0200
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Subject: arm64: dts: rockchip: fix USB on RADXA ROCK 5T
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The RADXA ROCK 5T board uses the same GPIO pin for controlling the USB
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host port regulator. This control pin was mistakenly left out of the
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ROCK 5T device tree.
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Reported-by: FUKAUMI Naoki <naoki@radxa.com>
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Closes: https://libera.catirclogs.org/linux-rockchip/2025-08-25#38609886;
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Fixes: 0ea651de9b79 ("arm64: dts: rockchip: add ROCK 5T device tree")
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Signed-off-by: Nicolas Frattaroli <nicolas.frattaroli@collabora.com>
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--- a/arch/arm64/boot/dts/rockchip/rk3588-rock-5t.dts
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+++ b/arch/arm64/boot/dts/rockchip/rk3588-rock-5t.dts
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@@ -95,6 +95,12 @@
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rockchip,pins = <4 RK_PC3 RK_FUNC_GPIO &pcfg_pull_none>;
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};
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};
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+
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+ usb {
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+ vcc5v0_host_en: vcc5v0-host-en {
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+ rockchip,pins = <1 RK_PA1 RK_FUNC_GPIO &pcfg_pull_none>;
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+ };
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+ };
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};
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&vcc3v3_pcie2x1l0 {
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@@ -103,3 +109,10 @@
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pinctrl-0 = <&pcie2_0_vcc3v3_en>;
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status = "okay";
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};
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+
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+&vcc5v0_host {
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+ enable-active-high;
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+ gpio = <&gpio1 RK_PA1 GPIO_ACTIVE_HIGH>;
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+ pinctrl-names = "default";
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+ pinctrl-0 = <&vcc5v0_host_en>;
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+};
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