86e3c31bcc
This is an automatically generated commit which aids following Kernel patch history, as git will see the move and copy as a rename thus defeating the purpose. For the original discussion see: https://lists.openwrt.org/pipermail/openwrt-devel/2023-October/041673.html Signed-off-by: Tianling Shen <cnsztl@immortalwrt.org> Link: https://github.com/openwrt/openwrt/pull/23139 Signed-off-by: Nick Hainke <vincent@systemli.org>
32 lines
1.1 KiB
Diff
32 lines
1.1 KiB
Diff
From 8a023e86f3d999007f2687952afe78ef34a6aa91 Mon Sep 17 00:00:00 2001
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From: Yao Zi <ziyao@disroot.org>
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Date: Tue, 6 May 2025 09:22:02 +0000
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Subject: [PATCH] dt-bindings: clock: Add GRF clock definition for RK3528
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These clocks are for SD/SDIO tuning purpose and come with registers
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in GRF syscon.
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Signed-off-by: Yao Zi <ziyao@disroot.org>
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Acked-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
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Link: https://lore.kernel.org/r/20250506092206.46143-2-ziyao@disroot.org
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Signed-off-by: Heiko Stuebner <heiko@sntech.de>
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---
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include/dt-bindings/clock/rockchip,rk3528-cru.h | 6 ++++++
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1 file changed, 6 insertions(+)
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--- a/include/dt-bindings/clock/rockchip,rk3528-cru.h
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+++ b/include/dt-bindings/clock/rockchip,rk3528-cru.h
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@@ -414,6 +414,12 @@
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#define MCLK_I2S2_2CH_SAI_SRC_PRE 402
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#define MCLK_I2S3_8CH_SAI_SRC_PRE 403
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#define MCLK_SDPDIF_SRC_PRE 404
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+#define SCLK_SDMMC_DRV 405
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+#define SCLK_SDMMC_SAMPLE 406
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+#define SCLK_SDIO0_DRV 407
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+#define SCLK_SDIO0_SAMPLE 408
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+#define SCLK_SDIO1_DRV 409
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+#define SCLK_SDIO1_SAMPLE 410
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/* scmi-clocks indices */
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#define SCMI_PCLK_KEYREADER 0
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