The clk driver uses the ioread32 and iowrite32 for register access to
switchcore and SoC bases. This works but if at some point the target
wants to enable CONFIG_SWAP_IO_SPACE, the register access breaks as
ioread32/iowrite32 would be operating in little endian as opposed
to the intended native endian.
Fix it by replacing the ioread32/iowrite32 used in register access macros
to a __raw variant which aligns with what upstream use for native endian
access to registers.
Signed-off-by: Rustam Adilov <adilov@tutamail.com>
Link: https://github.com/openwrt/openwrt/pull/23206
Signed-off-by: Markus Stockhausen <markus.stockhausen@gmx.de>
d93c6d9a49