b94de14baf
Remove upstreamed patches: 100-08-cmd-mtd-add-markbad-subcommand-for-NMBM-testing.patch [1] 101-01-mtd-spinand-add-support-for-FORESEE-F35SQA002G.patch [2] 101-02-mtd-spinand-add-support-for-FORESEE-F35SQA001G.patch [3] 110-mtd-spi-nand-add-support-for-FudanMicro-FM25S01A.patch [4] Some SPI-NAND driver macro definitions and function parameters have been changed in the latest release[3]. Hence we also had to rework the related local patches to follow the upstream changes. Tested on MT7981 SPI-NOR/EMMC. [1]21c1098cf4[2]2a0f8e7da0[3]2cbdd3e449[4]8b984b5a39Signed-off-by: Shiji Yang <yangshiji66@outlook.com> [daniel@makrotopia.org: tested MT7622 SNAND and SPI-NOR] Signed-off-by: Daniel Golle <daniel@makrotopia.org>
69 lines
2.6 KiB
Diff
69 lines
2.6 KiB
Diff
Subject: [PATCH] mtd: spinand: esmt: add support for F50L1G41LC
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This adds support for ESMT F50L1G41LC, which appears to be an updated
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version of the already supported F50L1G41LB.
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Add esmt_8c SPI_NAND manufacturer to account for the newly used vendor
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ID with support for the ESMT F50L1G41LC chip.
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--- a/drivers/mtd/nand/spi/core.c
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+++ b/drivers/mtd/nand/spi/core.c
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@@ -1287,6 +1287,7 @@ static const struct spinand_manufacturer
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&alliancememory_spinand_manufacturer,
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&ato_spinand_manufacturer,
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&esmt_c8_spinand_manufacturer,
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+ &esmt_8c_spinand_manufacturer,
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&etron_spinand_manufacturer,
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&fmsh_spinand_manufacturer,
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&foresee_spinand_manufacturer,
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--- a/drivers/mtd/nand/spi/esmt.c
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+++ b/drivers/mtd/nand/spi/esmt.c
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@@ -17,6 +17,7 @@
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/* ESMT uses GigaDevice 0xc8 JECDEC ID on some SPI NANDs */
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#define SPINAND_MFR_ESMT_C8 0xc8
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+#define SPINAND_MFR_ESMT_8C 0x8c
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#define ESMT_F50L1G41LB_CFG_OTP_PROTECT BIT(7)
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#define ESMT_F50L1G41LB_CFG_OTP_LOCK \
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@@ -189,6 +190,18 @@ static const struct spinand_fact_otp_ops
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.read = spinand_fact_otp_read,
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};
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+static const struct spinand_info esmt_8c_spinand_table[] = {
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+ SPINAND_INFO("F50L1G41LC",
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+ SPINAND_ID(SPINAND_READID_METHOD_OPCODE_ADDR, 0x2C),
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+ NAND_MEMORG(1, 2048, 64, 64, 1024, 20, 1, 1, 1),
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+ NAND_ECCREQ(1, 512),
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+ SPINAND_INFO_OP_VARIANTS(&read_cache_variants,
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+ &write_cache_variants,
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+ &update_cache_variants),
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+ 0,
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+ SPINAND_ECCINFO(&f50l1g41lb_ooblayout, NULL)),
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+};
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+
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static const struct spinand_info esmt_c8_spinand_table[] = {
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SPINAND_INFO("F50L1G41LB",
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SPINAND_ID(SPINAND_READID_METHOD_OPCODE_ADDR, 0x01, 0x7f,
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@@ -236,3 +249,11 @@ const struct spinand_manufacturer esmt_c
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.nchips = ARRAY_SIZE(esmt_c8_spinand_table),
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.ops = &esmt_spinand_manuf_ops,
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};
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+
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+const struct spinand_manufacturer esmt_8c_spinand_manufacturer = {
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+ .id = SPINAND_MFR_ESMT_8C,
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+ .name = "ESMT",
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+ .chips = esmt_8c_spinand_table,
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+ .nchips = ARRAY_SIZE(esmt_8c_spinand_table),
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+ .ops = &esmt_spinand_manuf_ops,
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+};
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--- a/include/linux/mtd/spinand.h
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+++ b/include/linux/mtd/spinand.h
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@@ -414,6 +414,7 @@ struct spinand_manufacturer {
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extern const struct spinand_manufacturer alliancememory_spinand_manufacturer;
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extern const struct spinand_manufacturer ato_spinand_manufacturer;
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extern const struct spinand_manufacturer esmt_c8_spinand_manufacturer;
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+extern const struct spinand_manufacturer esmt_8c_spinand_manufacturer;
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extern const struct spinand_manufacturer etron_spinand_manufacturer;
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extern const struct spinand_manufacturer fmsh_spinand_manufacturer;
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extern const struct spinand_manufacturer foresee_spinand_manufacturer;
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