f259fae36c
libunwind solves these in different ways. ppc-musl is still pending upstream. Signed-off-by: Rosen Penev <rosenp@gmail.com> Link: https://github.com/openwrt/openwrt/pull/21057 Signed-off-by: Robert Marko <robimarko@gmail.com>
98 lines
3.0 KiB
Diff
98 lines
3.0 KiB
Diff
From df0807c1c2302c364c281d3d1109ddc10c9c7b19 Mon Sep 17 00:00:00 2001
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From: Ross Burton <ross.burton@arm.com>
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Date: Tue, 16 Jan 2024 18:21:26 +0000
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Subject: [PATCH] coredump: use glibc or musl register names as appropriate on
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MIPS
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glibc has register macros of the form EF_REGx, but musl uses EF_Rx.
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Handle this by using a macro to use the correct names.
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Closes #708.
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Signed-off-by: Ross Burton <ross.burton@arm.com>
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---
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src/coredump/_UCD_access_reg_linux.c | 69 ++++++++++++++++------------
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1 file changed, 39 insertions(+), 30 deletions(-)
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--- a/src/coredump/_UCD_access_reg_linux.c
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+++ b/src/coredump/_UCD_access_reg_linux.c
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@@ -100,38 +100,47 @@ _UCD_access_reg (unw_addr_space_t as UN
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};
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#else
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#if defined(UNW_TARGET_MIPS)
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+
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+/* glibc and musl use different names */
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+#ifdef __GLIBC__
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+#define EF_REG(x) EF_REG ## x
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+#else
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+#include <sys/reg.h>
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+#define EF_REG(x) EF_R ## x
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+#endif
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+
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static const uint8_t remap_regs[] =
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{
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- [UNW_MIPS_R0] = EF_REG0,
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- [UNW_MIPS_R1] = EF_REG1,
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- [UNW_MIPS_R2] = EF_REG2,
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- [UNW_MIPS_R3] = EF_REG3,
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- [UNW_MIPS_R4] = EF_REG4,
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- [UNW_MIPS_R5] = EF_REG5,
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- [UNW_MIPS_R6] = EF_REG6,
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- [UNW_MIPS_R7] = EF_REG7,
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- [UNW_MIPS_R8] = EF_REG8,
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- [UNW_MIPS_R9] = EF_REG9,
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- [UNW_MIPS_R10] = EF_REG10,
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- [UNW_MIPS_R11] = EF_REG11,
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- [UNW_MIPS_R12] = EF_REG12,
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- [UNW_MIPS_R13] = EF_REG13,
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- [UNW_MIPS_R14] = EF_REG14,
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- [UNW_MIPS_R15] = EF_REG15,
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- [UNW_MIPS_R16] = EF_REG16,
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- [UNW_MIPS_R17] = EF_REG17,
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- [UNW_MIPS_R18] = EF_REG18,
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- [UNW_MIPS_R19] = EF_REG19,
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- [UNW_MIPS_R20] = EF_REG20,
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- [UNW_MIPS_R21] = EF_REG21,
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- [UNW_MIPS_R22] = EF_REG22,
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- [UNW_MIPS_R23] = EF_REG23,
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- [UNW_MIPS_R24] = EF_REG24,
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- [UNW_MIPS_R25] = EF_REG25,
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- [UNW_MIPS_R28] = EF_REG28,
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- [UNW_MIPS_R29] = EF_REG29,
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- [UNW_MIPS_R30] = EF_REG30,
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- [UNW_MIPS_R31] = EF_REG31,
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+ [UNW_MIPS_R0] = EF_REG(0),
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+ [UNW_MIPS_R1] = EF_REG(1),
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+ [UNW_MIPS_R2] = EF_REG(2),
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+ [UNW_MIPS_R3] = EF_REG(3),
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+ [UNW_MIPS_R4] = EF_REG(4),
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+ [UNW_MIPS_R5] = EF_REG(5),
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+ [UNW_MIPS_R6] = EF_REG(6),
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+ [UNW_MIPS_R7] = EF_REG(7),
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+ [UNW_MIPS_R8] = EF_REG(8),
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+ [UNW_MIPS_R9] = EF_REG(9),
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+ [UNW_MIPS_R10] = EF_REG(10),
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+ [UNW_MIPS_R11] = EF_REG(11),
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+ [UNW_MIPS_R12] = EF_REG(12),
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+ [UNW_MIPS_R13] = EF_REG(13),
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+ [UNW_MIPS_R14] = EF_REG(14),
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+ [UNW_MIPS_R15] = EF_REG(15),
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+ [UNW_MIPS_R16] = EF_REG(16),
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+ [UNW_MIPS_R17] = EF_REG(17),
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+ [UNW_MIPS_R18] = EF_REG(18),
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+ [UNW_MIPS_R19] = EF_REG(19),
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+ [UNW_MIPS_R20] = EF_REG(20),
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+ [UNW_MIPS_R21] = EF_REG(21),
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+ [UNW_MIPS_R22] = EF_REG(22),
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+ [UNW_MIPS_R23] = EF_REG(23),
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+ [UNW_MIPS_R24] = EF_REG(24),
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+ [UNW_MIPS_R25] = EF_REG(25),
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+ [UNW_MIPS_R28] = EF_REG(28),
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+ [UNW_MIPS_R29] = EF_REG(29),
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+ [UNW_MIPS_R30] = EF_REG(30),
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+ [UNW_MIPS_R31] = EF_REG(31),
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[UNW_MIPS_PC] = EF_CP0_EPC,
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};
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#elif defined(UNW_TARGET_S390X)
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