f9dd769052
Ethernet LAN port is set to `eth1` (silkscreen "ETH2" and case label "2") next to the 2x USB Type-A
ports and WAN is set to `eth0` (silkscreen "ETH1" and case label "1") next to the USB Type-C port.
The USER ("reset") button serves as the reset button. A short press will reboot and a long press
will reset to factory settings (deleting all data) if using squashfs image.
MASK ("maskrom") and RCRY ("recovery") buttons are enabled but are not set to any specific function
Pressing the POWER button will `poweroff` the device and it will stay off until a power cycle.
Hardware
---------------
* SoC: RockChip RK3576 64-bit ARMv8-A 8 cores big.LITTLE (4x A72 and 4x A53)
* RAM: 3/4GB LPDDR4X or 8/16GB LPDDR5
* Ethernet: 2x GbE (SoC RGMII MAC, RTL8211F PHY)
* 3x LEDs (SYS - red / 1 (WAN) - green / 2 (LAN) - green)
* 4x Buttons (MASK ("maskrom"), RCRY ("recovery"), USER ("reset" - OpenWrt reset), POWER)
* 1x 16MiB SPI NOR on board
* 1x UFS slot for optional UFS 2.0 module (currently not supported)
* 1x microSD card slot (UHS-I)
* 1x HDMI OUT
* 1x Headphone OUT 3.5mm
* 1x M.2 M-key 2280 PCIe slot (PCIe 2.1 x1 supports NVMe SSD)
* 1x M.2 E-key *SDIO* slot for optional RTL8822CS Wi-Fi 5
* the case has integrated antennae as well as 2x knockouts
* the device tree is missing the nodes relevant to Wi-Fi operations so it's not supported for now.
* 2x USB 3.2 Gen 1 Type-A Ports
* Power: 1x USB Type-C 6V-20V with both DC and USB PD supported
* Serial: 1500000 8N1 3.3V - 2.54mm 3-pin header next to HDMI
MAC addresses
---------------
WAN (`eth0` case label "1"): generated from /sys/.../mmcblk0/cid (CID of SD card)
LAN (`eth1` case label "2"): WAN + 1
Installation
---------------
Decompress the archive of the OpenWrt sysupgrade image and write it to a microSD card using `dd`
or use Balena Etcher (no need to decompress).
Boot
---------------
Insert microSD card, set boot switch to "UFS/SD" and then supply power.
Signed-off-by: Ryan Leung <untilscour@protonmail.com>
Link: https://github.com/openwrt/openwrt/pull/23008
Signed-off-by: Hauke Mehrtens <hauke@hauke-m.de>
988 lines
22 KiB
Diff
988 lines
22 KiB
Diff
From 96cbdfdd3ac20700b9b1c251fb15c944f33a424a Mon Sep 17 00:00:00 2001
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From: John Clark <inindev@gmail.com>
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Date: Sat, 28 Jun 2025 10:32:29 -0400
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Subject: [PATCH] arm64: dts: rockchip: Add FriendlyElec NanoPi M5 support
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Add device tree for FriendlyElec NanoPi M5 with Rockchip RK3576 SoC
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(4x Cortex-A72, 4x Cortex-A53, Mali-G52 MC3 GPU, 6 TOPS NPU). Enables
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basic booting and connectivity.
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Supported features:
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- RK3576 SoC
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- 4GB LPDDR4X or 8GB/16GB LPDDR5
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- 16MB SPI Nor Flash
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- 2x 1Gbps Ethernet
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- 2x USB 3.2 Gen 1 Type-A ports
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- M.2 M-Key PCIe 2.1 x1 NVMe support
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- M.2 E-Key SDIO connector
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- microSD UHS-I
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- HDMI 1.4/2.0 (up to 4096x2304@60Hz)
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- 30-pin GPIO (2x SPI, 4x UART, 3x I2C, 5x PWM, 20x GPIO)
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- Debug UART
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- RTC with HYM8563TS
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- Power via USB-C (PD, 6V~20V)
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Signed-off-by: John Clark <inindev@gmail.com>
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Link: https://lore.kernel.org/r/20250628143229.74460-3-inindev@gmail.com
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Signed-off-by: Heiko Stuebner <heiko@sntech.de>
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---
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arch/arm64/boot/dts/rockchip/Makefile | 1 +
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.../arm64/boot/dts/rockchip/rk3576-nanopi-m5.dts | 941 ++++++++++++++++++
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2 files changed, 942 insertions(+)
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create mode 100644 arch/arm64/boot/dts/rockchip/rk3576-nanopi-m5.dts
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--- a/arch/arm64/boot/dts/rockchip/Makefile
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+++ b/arch/arm64/boot/dts/rockchip/Makefile
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@@ -126,6 +126,7 @@ dtb-$(CONFIG_ARCH_ROCKCHIP) += rk3568-ro
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dtb-$(CONFIG_ARCH_ROCKCHIP) += rk3568-wolfvision-pf5.dtb
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dtb-$(CONFIG_ARCH_ROCKCHIP) += rk3568-wolfvision-pf5-display-vz.dtbo
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dtb-$(CONFIG_ARCH_ROCKCHIP) += rk3568-wolfvision-pf5-io-expander.dtbo
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+dtb-$(CONFIG_ARCH_ROCKCHIP) += rk3576-nanopi-m5.dtb
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dtb-$(CONFIG_ARCH_ROCKCHIP) += rk3576-nanopi-r76s.dtb
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dtb-$(CONFIG_ARCH_ROCKCHIP) += rk3576-rock-4d.dtb
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dtb-$(CONFIG_ARCH_ROCKCHIP) += rk3582-radxa-e52c.dtb
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--- /dev/null
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+++ b/arch/arm64/boot/dts/rockchip/rk3576-nanopi-m5.dts
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@@ -0,0 +1,941 @@
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+// SPDX-License-Identifier: (GPL-2.0+ OR MIT)
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+/*
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+ * Copyright (c) 2025 FriendlyElec Computer Tech. Co., Ltd.
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+ * Copyright (c) 2025 John Clark <inindev@gmail.com>
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+ */
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+
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+/dts-v1/;
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+
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+#include <dt-bindings/gpio/gpio.h>
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+#include <dt-bindings/input/input.h>
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+#include <dt-bindings/leds/common.h>
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+#include <dt-bindings/pinctrl/rockchip.h>
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+#include <dt-bindings/pwm/pwm.h>
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+#include <dt-bindings/soc/rockchip,vop2.h>
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+#include <dt-bindings/usb/pd.h>
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+#include "rk3576.dtsi"
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+
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+/ {
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+ model = "FriendlyElec NanoPi M5";
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+ compatible = "friendlyarm,nanopi-m5", "rockchip,rk3576";
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+
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+ aliases {
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+ ethernet0 = &gmac0;
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+ ethernet1 = &gmac1;
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+ mmc0 = &sdmmc;
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+ };
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+
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+ chosen {
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+ stdout-path = "serial0:1500000n8";
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+ };
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+
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+ hdmi-con {
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+ compatible = "hdmi-connector";
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+ hdmi-pwr-supply = <&vcc5v_hdmi_tx>;
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+ type = "a";
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+
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+ port {
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+ hdmi_con_in: endpoint {
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+ remote-endpoint = <&hdmi_out_con>;
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+ };
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+ };
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+ };
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+
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+ keys {
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+ compatible = "gpio-keys";
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+
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+ usr_button: key-1 {
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+ debounce-interval = <50>;
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+ gpios = <&gpio1 RK_PA0 GPIO_ACTIVE_LOW>;
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+ label = "user";
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+ linux,code = <BTN_1>;
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+ pinctrl-names = "default";
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+ pinctrl-0 = <&usr_button_l>;
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+ wakeup-source;
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+ };
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+ };
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+
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+ leds {
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+ compatible = "gpio-leds";
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+
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+ led_sys: led-0 {
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+ color = <LED_COLOR_ID_RED>;
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+ function = LED_FUNCTION_HEARTBEAT;
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+ gpios = <&gpio2 RK_PB3 GPIO_ACTIVE_HIGH>;
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+ label = "sys";
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+ linux,default-trigger = "heartbeat";
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+ pinctrl-names = "default";
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+ pinctrl-0 = <&led_sys_h>;
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+ };
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+
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+ led1: led-1 {
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+ color = <LED_COLOR_ID_GREEN>;
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+ function = LED_FUNCTION_LAN;
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+ gpios = <&gpio4 RK_PC5 GPIO_ACTIVE_HIGH>;
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+ label = "led1";
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+ linux,default-trigger = "netdev";
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+ pinctrl-names = "default";
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+ pinctrl-0 = <&led1_h>;
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+ };
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+
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+ led2: led-2 {
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+ color = <LED_COLOR_ID_GREEN>;
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+ function = LED_FUNCTION_LAN;
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+ gpios = <&gpio2 RK_PB0 GPIO_ACTIVE_HIGH>;
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+ label = "led2";
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+ linux,default-trigger = "netdev";
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+ pinctrl-names = "default";
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+ pinctrl-0 = <&led2_h>;
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+ };
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+ };
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+
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+ usb3_port2_5v: regulator-usb3-port2-5v {
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+ compatible = "regulator-fixed";
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+ enable-active-high;
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+ gpios = <&gpio0 RK_PC7 GPIO_ACTIVE_HIGH>;
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+ pinctrl-names = "default";
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+ pinctrl-0 = <&usb3_host_pwren_h>;
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+ regulator-min-microvolt = <5000000>;
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+ regulator-max-microvolt = <5000000>;
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+ regulator-name = "usb3_port2_5v";
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+ vin-supply = <&vcc5v0_sys_s5>;
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+ };
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+
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+ vcc12v_dcin: regulator-vcc12v-dcin {
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+ compatible = "regulator-fixed";
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+ regulator-always-on;
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+ regulator-boot-on;
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+ regulator-min-microvolt = <12000000>;
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+ regulator-max-microvolt = <12000000>;
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+ regulator-name = "vcc12v_dcin";
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+ };
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+
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+ vcc3v3_m2_keym: regulator-vcc3v3-m2-keym {
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+ compatible = "regulator-fixed";
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+ enable-active-high;
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+ gpios = <&gpio0 RK_PD3 GPIO_ACTIVE_HIGH>;
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+ pinctrl-names = "default";
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+ pinctrl-0 = <&pcie0_pwren_h>;
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+ regulator-min-microvolt = <3300000>;
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+ regulator-max-microvolt = <3300000>;
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+ regulator-name = "vcc3v3_m2_keym";
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+ vin-supply = <&vcc5v0_sys_s5>;
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+ };
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+
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+ vcc3v3_sd_s0: regulator-vcc3v3-sd-s0 {
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+ compatible = "regulator-fixed";
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+ enable-active-high;
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+ gpios = <&gpio0 RK_PB6 GPIO_ACTIVE_HIGH>;
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+ pinctrl-names = "default";
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+ pinctrl-0 = <&sdmmc0_pwren_h>;
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+ regulator-boot-on;
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+ regulator-min-microvolt = <3300000>;
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+ regulator-max-microvolt = <3300000>;
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+ regulator-name = "vcc3v3_sd_s0";
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+ vin-supply = <&vcc_3v3_s3>;
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+ };
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+
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+ vcc5v0_sys_s5: regulator-vcc5v0-sys-s5 {
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+ compatible = "regulator-fixed";
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+ regulator-always-on;
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+ regulator-boot-on;
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+ regulator-min-microvolt = <5000000>;
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+ regulator-max-microvolt = <5000000>;
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+ regulator-name = "vcc5v0_sys_s5";
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+ vin-supply = <&vcc12v_dcin>;
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+ };
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+
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+ vcc5v0_usb_otg0: regulator-vcc5v0-usb-otg0 {
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+ compatible = "regulator-fixed";
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+ enable-active-high;
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+ gpios = <&gpio0 RK_PD1 GPIO_ACTIVE_HIGH>;
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+ pinctrl-names = "default";
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+ pinctrl-0 = <&usb_otg0_pwren_h>;
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+ regulator-min-microvolt = <5000000>;
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+ regulator-max-microvolt = <5000000>;
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+ regulator-name = "vcc5v0_usb_otg0";
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+ vin-supply = <&vcc5v0_sys_s5>;
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+ };
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+
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+ vcc5v_hdmi_tx: regulator-vcc5v-hdmi-tx {
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+ compatible = "regulator-fixed";
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+ regulator-always-on;
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+ regulator-min-microvolt = <5000000>;
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+ regulator-max-microvolt = <5000000>;
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+ regulator-name = "vcc5v_hdmi_tx";
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+ vin-supply = <&vcc5v0_sys_s5>;
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+ };
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+
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+ vcc_1v1_nldo_s3: regulator-vcc-1v1-nldo-s3 {
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+ compatible = "regulator-fixed";
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+ regulator-always-on;
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+ regulator-boot-on;
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+ regulator-min-microvolt = <1100000>;
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+ regulator-max-microvolt = <1100000>;
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+ regulator-name = "vcc_1v1_nldo_s3";
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+ vin-supply = <&vcc5v0_sys_s5>;
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+ };
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+
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+ vcc_2v0_pldo_s3: regulator-vcc-2v0-pldo-s3 {
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+ compatible = "regulator-fixed";
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+ regulator-always-on;
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+ regulator-boot-on;
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+ regulator-min-microvolt = <2000000>;
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+ regulator-max-microvolt = <2000000>;
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+ regulator-name = "vcc_2v0_pldo_s3";
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+ vin-supply = <&vcc5v0_sys_s5>;
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+ };
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+
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+ vcc_3v3_s0: regulator-vcc-3v3-s0 {
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+ compatible = "regulator-fixed";
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+ regulator-always-on;
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+ regulator-boot-on;
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+ regulator-min-microvolt = <3300000>;
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+ regulator-max-microvolt = <3300000>;
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+ regulator-name = "vcc_3v3_s0";
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+ vin-supply = <&vcc_3v3_s3>;
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+ };
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+
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+ sound {
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+ compatible = "simple-audio-card";
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+ pinctrl-names = "default";
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+ pinctrl-0 = <&hp_det_l>;
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+
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+ simple-audio-card,format = "i2s";
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+ simple-audio-card,hp-det-gpios = <&gpio2 RK_PD6 GPIO_ACTIVE_LOW>;
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+ simple-audio-card,mclk-fs = <256>;
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+ simple-audio-card,name = "realtek,rt5616-codec";
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+
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+ simple-audio-card,routing =
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+ "Headphones", "HPOL",
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+ "Headphones", "HPOR",
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+ "IN1P", "Microphone Jack";
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+ simple-audio-card,widgets =
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+ "Headphone", "Headphone Jack",
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+ "Microphone", "Microphone Jack";
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+
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+ simple-audio-card,codec {
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+ sound-dai = <&rt5616>;
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+ };
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+
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+ simple-audio-card,cpu {
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+ sound-dai = <&sai2>;
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+ };
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+ };
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+};
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+
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+&combphy0_ps {
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+ status = "okay";
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+};
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+
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+&combphy1_psu {
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+ status = "okay";
|
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+};
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+
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+&cpu_b0 {
|
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+ cpu-supply = <&vdd_cpu_big_s0>;
|
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+};
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+
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+&cpu_b1 {
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+ cpu-supply = <&vdd_cpu_big_s0>;
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+};
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+
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+&cpu_b2 {
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+ cpu-supply = <&vdd_cpu_big_s0>;
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+};
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+
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+&cpu_b3 {
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+ cpu-supply = <&vdd_cpu_big_s0>;
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+};
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+
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+&cpu_l0 {
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+ cpu-supply = <&vdd_cpu_lit_s0>;
|
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+};
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+
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+&cpu_l1 {
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+ cpu-supply = <&vdd_cpu_lit_s0>;
|
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+};
|
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+
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+&cpu_l2 {
|
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+ cpu-supply = <&vdd_cpu_lit_s0>;
|
|
+};
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+
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+&cpu_l3 {
|
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+ cpu-supply = <&vdd_cpu_lit_s0>;
|
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+};
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+
|
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+&fspi1m1_pins {
|
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+ /* gpio1_d5, gpio1_c4-c7 (clk, d0-d4) are for spi nor flash */
|
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+ /* gpio1_d0-d4 muxed to sai2 audio functions */
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+ rockchip,pins =
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+ <1 RK_PD5 3 &pcfg_pull_none>,
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+ <1 RK_PC4 3 &pcfg_pull_none>,
|
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+ <1 RK_PC5 3 &pcfg_pull_none>,
|
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+ <1 RK_PC6 3 &pcfg_pull_none>,
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+ <1 RK_PC7 3 &pcfg_pull_none>;
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+};
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+
|
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+&gmac0 {
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+ clock_in_out = "output";
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+ phy-handle = <&rgmii_phy0>;
|
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+ phy-mode = "rgmii-id";
|
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+ phy-supply = <&vcc_3v3_s3>;
|
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+ pinctrl-names = "default";
|
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+ pinctrl-0 = <ð0m0_miim>,
|
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+ <ð0m0_tx_bus2>,
|
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+ <ð0m0_rx_bus2>,
|
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+ <ð0m0_rgmii_clk>,
|
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+ <ð0m0_rgmii_bus>;
|
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+ status = "okay";
|
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+};
|
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+
|
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+&gmac1 {
|
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+ clock_in_out = "output";
|
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+ phy-handle = <&rgmii_phy1>;
|
|
+ phy-mode = "rgmii-id";
|
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+ phy-supply = <&vcc_3v3_s3>;
|
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+ pinctrl-names = "default";
|
|
+ pinctrl-0 = <ð1m0_miim>,
|
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+ <ð1m0_tx_bus2>,
|
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+ <ð1m0_rx_bus2>,
|
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+ <ð1m0_rgmii_clk>,
|
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+ <ð1m0_rgmii_bus>;
|
|
+ status = "okay";
|
|
+};
|
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+
|
|
+&gpu {
|
|
+ mali-supply = <&vdd_gpu_s0>;
|
|
+ status = "okay";
|
|
+};
|
|
+
|
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+&hdmi {
|
|
+ status = "okay";
|
|
+};
|
|
+
|
|
+&hdmi_in {
|
|
+ hdmi_in_vp0: endpoint {
|
|
+ remote-endpoint = <&vp0_out_hdmi>;
|
|
+ };
|
|
+};
|
|
+
|
|
+&hdmi_out {
|
|
+ hdmi_out_con: endpoint {
|
|
+ remote-endpoint = <&hdmi_con_in>;
|
|
+ };
|
|
+};
|
|
+
|
|
+&hdptxphy {
|
|
+ status = "okay";
|
|
+};
|
|
+
|
|
+&i2c1 {
|
|
+ status = "okay";
|
|
+
|
|
+ pmic@23 {
|
|
+ compatible = "rockchip,rk806";
|
|
+ reg = <0x23>;
|
|
+ #gpio-cells = <2>;
|
|
+ gpio-controller;
|
|
+ interrupt-parent = <&gpio0>;
|
|
+ interrupts = <6 IRQ_TYPE_LEVEL_LOW>;
|
|
+ pinctrl-names = "default";
|
|
+ pinctrl-0 = <&pmic_pins>, <&rk806_dvs1_null>,
|
|
+ <&rk806_dvs2_null>, <&rk806_dvs3_null>;
|
|
+ system-power-controller;
|
|
+
|
|
+ vcc1-supply = <&vcc5v0_sys_s5>;
|
|
+ vcc2-supply = <&vcc5v0_sys_s5>;
|
|
+ vcc3-supply = <&vcc5v0_sys_s5>;
|
|
+ vcc4-supply = <&vcc5v0_sys_s5>;
|
|
+ vcc5-supply = <&vcc5v0_sys_s5>;
|
|
+ vcc6-supply = <&vcc5v0_sys_s5>;
|
|
+ vcc7-supply = <&vcc5v0_sys_s5>;
|
|
+ vcc8-supply = <&vcc5v0_sys_s5>;
|
|
+ vcc9-supply = <&vcc5v0_sys_s5>;
|
|
+ vcc10-supply = <&vcc5v0_sys_s5>;
|
|
+ vcc11-supply = <&vcc_2v0_pldo_s3>;
|
|
+ vcc12-supply = <&vcc5v0_sys_s5>;
|
|
+ vcc13-supply = <&vcc_1v1_nldo_s3>;
|
|
+ vcc14-supply = <&vcc_1v1_nldo_s3>;
|
|
+ vcca-supply = <&vcc5v0_sys_s5>;
|
|
+
|
|
+ rk806_dvs1_null: dvs1-null-pins {
|
|
+ pins = "gpio_pwrctrl1";
|
|
+ function = "pin_fun0";
|
|
+ };
|
|
+
|
|
+ rk806_dvs1_slp: dvs1-slp-pins {
|
|
+ pins = "gpio_pwrctrl1";
|
|
+ function = "pin_fun1";
|
|
+ };
|
|
+
|
|
+ rk806_dvs1_pwrdn: dvs1-pwrdn-pins {
|
|
+ pins = "gpio_pwrctrl1";
|
|
+ function = "pin_fun2";
|
|
+ };
|
|
+
|
|
+ rk806_dvs1_rst: dvs1-rst-pins {
|
|
+ pins = "gpio_pwrctrl1";
|
|
+ function = "pin_fun3";
|
|
+ };
|
|
+
|
|
+ rk806_dvs2_null: dvs2-null-pins {
|
|
+ pins = "gpio_pwrctrl2";
|
|
+ function = "pin_fun0";
|
|
+ };
|
|
+
|
|
+ rk806_dvs2_slp: dvs2-slp-pins {
|
|
+ pins = "gpio_pwrctrl2";
|
|
+ function = "pin_fun1";
|
|
+ };
|
|
+
|
|
+ rk806_dvs2_pwrdn: dvs2-pwrdn-pins {
|
|
+ pins = "gpio_pwrctrl2";
|
|
+ function = "pin_fun2";
|
|
+ };
|
|
+
|
|
+ rk806_dvs2_rst: dvs2-rst-pins {
|
|
+ pins = "gpio_pwrctrl2";
|
|
+ function = "pin_fun3";
|
|
+ };
|
|
+
|
|
+ rk806_dvs2_dvs: dvs2-dvs-pins {
|
|
+ pins = "gpio_pwrctrl2";
|
|
+ function = "pin_fun4";
|
|
+ };
|
|
+
|
|
+ rk806_dvs2_gpio: dvs2-gpio-pins {
|
|
+ pins = "gpio_pwrctrl2";
|
|
+ function = "pin_fun5";
|
|
+ };
|
|
+
|
|
+ rk806_dvs3_null: dvs3-null-pins {
|
|
+ pins = "gpio_pwrctrl3";
|
|
+ function = "pin_fun0";
|
|
+ };
|
|
+
|
|
+ rk806_dvs3_slp: dvs3-slp-pins {
|
|
+ pins = "gpio_pwrctrl3";
|
|
+ function = "pin_fun1";
|
|
+ };
|
|
+
|
|
+ rk806_dvs3_pwrdn: dvs3-pwrdn-pins {
|
|
+ pins = "gpio_pwrctrl3";
|
|
+ function = "pin_fun2";
|
|
+ };
|
|
+
|
|
+ rk806_dvs3_rst: dvs3-rst-pins {
|
|
+ pins = "gpio_pwrctrl3";
|
|
+ function = "pin_fun3";
|
|
+ };
|
|
+
|
|
+ rk806_dvs3_dvs: dvs3-dvs-pins {
|
|
+ pins = "gpio_pwrctrl3";
|
|
+ function = "pin_fun4";
|
|
+ };
|
|
+
|
|
+ rk806_dvs3_gpio: dvs3-gpio-pins {
|
|
+ pins = "gpio_pwrctrl3";
|
|
+ function = "pin_fun5";
|
|
+ };
|
|
+
|
|
+ regulators {
|
|
+ vdd_cpu_big_s0: dcdc-reg1 {
|
|
+ regulator-always-on;
|
|
+ regulator-boot-on;
|
|
+ regulator-enable-ramp-delay = <400>;
|
|
+ regulator-min-microvolt = <550000>;
|
|
+ regulator-max-microvolt = <950000>;
|
|
+ regulator-name = "vdd_cpu_big_s0";
|
|
+ regulator-ramp-delay = <12500>;
|
|
+
|
|
+ regulator-state-mem {
|
|
+ regulator-off-in-suspend;
|
|
+ };
|
|
+ };
|
|
+
|
|
+ vdd_npu_s0: dcdc-reg2 {
|
|
+ regulator-boot-on;
|
|
+ regulator-enable-ramp-delay = <400>;
|
|
+ regulator-min-microvolt = <550000>;
|
|
+ regulator-max-microvolt = <950000>;
|
|
+ regulator-name = "vdd_npu_s0";
|
|
+ regulator-ramp-delay = <12500>;
|
|
+
|
|
+ regulator-state-mem {
|
|
+ regulator-off-in-suspend;
|
|
+ };
|
|
+ };
|
|
+
|
|
+ vdd_cpu_lit_s0: dcdc-reg3 {
|
|
+ regulator-always-on;
|
|
+ regulator-boot-on;
|
|
+ regulator-min-microvolt = <550000>;
|
|
+ regulator-max-microvolt = <950000>;
|
|
+ regulator-name = "vdd_cpu_lit_s0";
|
|
+ regulator-ramp-delay = <12500>;
|
|
+
|
|
+ regulator-state-mem {
|
|
+ regulator-off-in-suspend;
|
|
+ regulator-suspend-microvolt = <750000>;
|
|
+ };
|
|
+ };
|
|
+
|
|
+ vcc_3v3_s3: dcdc-reg4 {
|
|
+ regulator-always-on;
|
|
+ regulator-boot-on;
|
|
+ regulator-min-microvolt = <3300000>;
|
|
+ regulator-max-microvolt = <3300000>;
|
|
+ regulator-name = "vcc_3v3_s3";
|
|
+
|
|
+ regulator-state-mem {
|
|
+ regulator-on-in-suspend;
|
|
+ regulator-suspend-microvolt = <3300000>;
|
|
+ };
|
|
+ };
|
|
+
|
|
+ vdd_gpu_s0: dcdc-reg5 {
|
|
+ regulator-boot-on;
|
|
+ regulator-enable-ramp-delay = <400>;
|
|
+ regulator-min-microvolt = <550000>;
|
|
+ regulator-max-microvolt = <900000>;
|
|
+ regulator-name = "vdd_gpu_s0";
|
|
+ regulator-ramp-delay = <12500>;
|
|
+
|
|
+ regulator-state-mem {
|
|
+ regulator-off-in-suspend;
|
|
+ regulator-suspend-microvolt = <850000>;
|
|
+ };
|
|
+ };
|
|
+
|
|
+ vddq_ddr_s0: dcdc-reg6 {
|
|
+ regulator-always-on;
|
|
+ regulator-boot-on;
|
|
+ regulator-name = "vddq_ddr_s0";
|
|
+
|
|
+ regulator-state-mem {
|
|
+ regulator-off-in-suspend;
|
|
+ };
|
|
+ };
|
|
+
|
|
+ vdd_logic_s0: dcdc-reg7 {
|
|
+ regulator-always-on;
|
|
+ regulator-boot-on;
|
|
+ regulator-min-microvolt = <550000>;
|
|
+ regulator-max-microvolt = <800000>;
|
|
+ regulator-name = "vdd_logic_s0";
|
|
+
|
|
+ regulator-state-mem {
|
|
+ regulator-off-in-suspend;
|
|
+ };
|
|
+ };
|
|
+
|
|
+ vcc_1v8_s3: dcdc-reg8 {
|
|
+ regulator-always-on;
|
|
+ regulator-boot-on;
|
|
+ regulator-min-microvolt = <1800000>;
|
|
+ regulator-max-microvolt = <1800000>;
|
|
+ regulator-name = "vcc_1v8_s3";
|
|
+
|
|
+ regulator-state-mem {
|
|
+ regulator-on-in-suspend;
|
|
+ regulator-suspend-microvolt = <1800000>;
|
|
+ };
|
|
+ };
|
|
+
|
|
+ vdd2_ddr_s3: dcdc-reg9 {
|
|
+ regulator-always-on;
|
|
+ regulator-boot-on;
|
|
+ regulator-name = "vdd2_ddr_s3";
|
|
+
|
|
+ regulator-state-mem {
|
|
+ regulator-on-in-suspend;
|
|
+ };
|
|
+ };
|
|
+
|
|
+ vdd_ddr_s0: dcdc-reg10 {
|
|
+ regulator-always-on;
|
|
+ regulator-boot-on;
|
|
+ regulator-min-microvolt = <550000>;
|
|
+ regulator-max-microvolt = <1200000>;
|
|
+ regulator-name = "vdd_ddr_s0";
|
|
+
|
|
+ regulator-state-mem {
|
|
+ regulator-off-in-suspend;
|
|
+ };
|
|
+ };
|
|
+
|
|
+ vcca_1v8_s0: pldo-reg1 {
|
|
+ regulator-always-on;
|
|
+ regulator-boot-on;
|
|
+ regulator-min-microvolt = <1800000>;
|
|
+ regulator-max-microvolt = <1800000>;
|
|
+ regulator-name = "vcca_1v8_s0";
|
|
+
|
|
+ regulator-state-mem {
|
|
+ regulator-off-in-suspend;
|
|
+ };
|
|
+ };
|
|
+
|
|
+ vcca1v8_pldo2_s0: pldo-reg2 {
|
|
+ regulator-always-on;
|
|
+ regulator-boot-on;
|
|
+ regulator-min-microvolt = <1800000>;
|
|
+ regulator-max-microvolt = <1800000>;
|
|
+ regulator-name = "vcca1v8_pldo2_s0";
|
|
+
|
|
+ regulator-state-mem {
|
|
+ regulator-off-in-suspend;
|
|
+ };
|
|
+ };
|
|
+
|
|
+ vdda_1v2_s0: pldo-reg3 {
|
|
+ regulator-always-on;
|
|
+ regulator-boot-on;
|
|
+ regulator-min-microvolt = <1200000>;
|
|
+ regulator-max-microvolt = <1200000>;
|
|
+ regulator-name = "vdda_1v2_s0";
|
|
+
|
|
+ regulator-state-mem {
|
|
+ regulator-off-in-suspend;
|
|
+ };
|
|
+ };
|
|
+
|
|
+ vcca_3v3_s0: pldo-reg4 {
|
|
+ regulator-always-on;
|
|
+ regulator-boot-on;
|
|
+ regulator-min-microvolt = <3300000>;
|
|
+ regulator-max-microvolt = <3300000>;
|
|
+ regulator-name = "vcca_3v3_s0";
|
|
+
|
|
+ regulator-state-mem {
|
|
+ regulator-off-in-suspend;
|
|
+ };
|
|
+ };
|
|
+
|
|
+ vccio_sd_s0: pldo-reg5 {
|
|
+ regulator-always-on;
|
|
+ regulator-boot-on;
|
|
+ regulator-min-microvolt = <1800000>;
|
|
+ regulator-max-microvolt = <3300000>;
|
|
+ regulator-name = "vccio_sd_s0";
|
|
+
|
|
+ regulator-state-mem {
|
|
+ regulator-off-in-suspend;
|
|
+ };
|
|
+ };
|
|
+
|
|
+ vcca1v8_pldo6_s3: pldo-reg6 {
|
|
+ regulator-always-on;
|
|
+ regulator-boot-on;
|
|
+ regulator-min-microvolt = <1800000>;
|
|
+ regulator-max-microvolt = <1800000>;
|
|
+ regulator-name = "vcca1v8_pldo6_s3";
|
|
+
|
|
+ regulator-state-mem {
|
|
+ regulator-on-in-suspend;
|
|
+ regulator-suspend-microvolt = <1800000>;
|
|
+ };
|
|
+ };
|
|
+
|
|
+ vdd_0v75_s3: nldo-reg1 {
|
|
+ regulator-always-on;
|
|
+ regulator-boot-on;
|
|
+ regulator-min-microvolt = <750000>;
|
|
+ regulator-max-microvolt = <750000>;
|
|
+ regulator-name = "vdd_0v75_s3";
|
|
+
|
|
+ regulator-state-mem {
|
|
+ regulator-on-in-suspend;
|
|
+ regulator-suspend-microvolt = <750000>;
|
|
+ };
|
|
+ };
|
|
+
|
|
+ vdda_ddr_pll_s0: nldo-reg2 {
|
|
+ regulator-always-on;
|
|
+ regulator-boot-on;
|
|
+ regulator-min-microvolt = <850000>;
|
|
+ regulator-max-microvolt = <850000>;
|
|
+ regulator-name = "vdda_ddr_pll_s0";
|
|
+
|
|
+ regulator-state-mem {
|
|
+ regulator-off-in-suspend;
|
|
+ };
|
|
+ };
|
|
+
|
|
+ vdda0v75_hdmi_s0: nldo-reg3 {
|
|
+ regulator-always-on;
|
|
+ regulator-boot-on;
|
|
+ regulator-min-microvolt = <837500>;
|
|
+ regulator-max-microvolt = <837500>;
|
|
+ regulator-name = "vdda0v75_hdmi_s0";
|
|
+
|
|
+ regulator-state-mem {
|
|
+ regulator-off-in-suspend;
|
|
+ };
|
|
+ };
|
|
+
|
|
+ vdda_0v85_s0: nldo-reg4 {
|
|
+ regulator-always-on;
|
|
+ regulator-boot-on;
|
|
+ regulator-min-microvolt = <850000>;
|
|
+ regulator-max-microvolt = <850000>;
|
|
+ regulator-name = "vdda_0v85_s0";
|
|
+
|
|
+ regulator-state-mem {
|
|
+ regulator-off-in-suspend;
|
|
+ };
|
|
+ };
|
|
+
|
|
+ vdda_0v75_s0: nldo-reg5 {
|
|
+ regulator-always-on;
|
|
+ regulator-boot-on;
|
|
+ regulator-min-microvolt = <750000>;
|
|
+ regulator-max-microvolt = <750000>;
|
|
+ regulator-name = "vdda_0v75_s0";
|
|
+
|
|
+ regulator-state-mem {
|
|
+ regulator-off-in-suspend;
|
|
+ };
|
|
+ };
|
|
+ };
|
|
+ };
|
|
+};
|
|
+
|
|
+&i2c2 {
|
|
+ status = "okay";
|
|
+
|
|
+ hym8563: rtc@51 {
|
|
+ compatible = "haoyu,hym8563";
|
|
+ reg = <0x51>;
|
|
+ #clock-cells = <0>;
|
|
+ clock-output-names = "hym8563";
|
|
+ interrupt-parent = <&gpio0>;
|
|
+ interrupts = <RK_PA5 IRQ_TYPE_LEVEL_LOW>;
|
|
+ pinctrl-names = "default";
|
|
+ pinctrl-0 = <&hym8563_int>;
|
|
+ wakeup-source;
|
|
+ };
|
|
+};
|
|
+
|
|
+&i2c5 {
|
|
+ clock-frequency = <200000>;
|
|
+ pinctrl-names = "default";
|
|
+ pinctrl-0 = <&i2c5m3_xfer>;
|
|
+ status = "okay";
|
|
+
|
|
+ rt5616: audio-codec@1b {
|
|
+ compatible = "realtek,rt5616";
|
|
+ reg = <0x1b>;
|
|
+ assigned-clocks = <&cru CLK_SAI2_MCLKOUT>;
|
|
+ assigned-clock-rates = <12288000>;
|
|
+ clocks = <&cru CLK_SAI2_MCLKOUT>;
|
|
+ clock-names = "mclk";
|
|
+ #sound-dai-cells = <0>;
|
|
+ };
|
|
+};
|
|
+
|
|
+&mdio0 {
|
|
+ rgmii_phy0: phy@1 {
|
|
+ compatible = "ethernet-phy-ieee802.3-c22";
|
|
+ reg = <0x1>;
|
|
+ clocks = <&cru REFCLKO25M_GMAC0_OUT>;
|
|
+ interrupt-parent = <&gpio2>;
|
|
+ interrupts = <RK_PB1 IRQ_TYPE_LEVEL_LOW>;
|
|
+ pinctrl-names = "default";
|
|
+ pinctrl-0 = <&gmac0_int>, <&gmac0_rst>;
|
|
+ reset-assert-us = <20000>;
|
|
+ reset-deassert-us = <100000>;
|
|
+ reset-gpios = <&gpio2 RK_PB5 GPIO_ACTIVE_LOW>;
|
|
+ };
|
|
+};
|
|
+
|
|
+&mdio1 {
|
|
+ rgmii_phy1: phy@1 {
|
|
+ compatible = "ethernet-phy-ieee802.3-c22";
|
|
+ reg = <0x1>;
|
|
+ clocks = <&cru REFCLKO25M_GMAC1_OUT>;
|
|
+ interrupt-parent = <&gpio3>;
|
|
+ interrupts = <RK_PA2 IRQ_TYPE_LEVEL_LOW>;
|
|
+ pinctrl-names = "default";
|
|
+ pinctrl-0 = <&gmac1_int>, <&gmac1_rst>;
|
|
+ reset-assert-us = <20000>;
|
|
+ reset-deassert-us = <100000>;
|
|
+ reset-gpios = <&gpio3 RK_PA3 GPIO_ACTIVE_LOW>;
|
|
+ };
|
|
+};
|
|
+
|
|
+&pcie0 {
|
|
+ pinctrl-names = "default";
|
|
+ pinctrl-0 = <&pcie0_perstn>;
|
|
+ reset-gpios = <&gpio2 RK_PB4 GPIO_ACTIVE_HIGH>;
|
|
+ vpcie3v3-supply = <&vcc3v3_m2_keym>;
|
|
+ status = "okay";
|
|
+};
|
|
+
|
|
+&pinctrl {
|
|
+ gmac {
|
|
+ gmac0_int: gmac0-int {
|
|
+ rockchip,pins = <2 RK_PB1 RK_FUNC_GPIO &pcfg_pull_up>;
|
|
+ };
|
|
+ gmac0_rst: gmac0-rst {
|
|
+ rockchip,pins = <2 RK_PB5 RK_FUNC_GPIO &pcfg_pull_none>;
|
|
+ };
|
|
+ gmac1_int: gmac1-int {
|
|
+ rockchip,pins = <3 RK_PA2 RK_FUNC_GPIO &pcfg_pull_up>;
|
|
+ };
|
|
+ gmac1_rst: gmac1-rst {
|
|
+ rockchip,pins = <3 RK_PA3 RK_FUNC_GPIO &pcfg_pull_none>;
|
|
+ };
|
|
+ };
|
|
+
|
|
+ hym8563 {
|
|
+ hym8563_int: hym8563-int {
|
|
+ rockchip,pins = <0 RK_PA5 RK_FUNC_GPIO &pcfg_pull_up>;
|
|
+ };
|
|
+ };
|
|
+
|
|
+ keys {
|
|
+ usr_button_l: usr-button-l {
|
|
+ rockchip,pins = <1 RK_PA0 RK_FUNC_GPIO &pcfg_pull_up>;
|
|
+ };
|
|
+ };
|
|
+
|
|
+ leds {
|
|
+ led_sys_h: led-sys-h {
|
|
+ rockchip,pins = <2 RK_PB3 RK_FUNC_GPIO &pcfg_pull_none>;
|
|
+ };
|
|
+ led1_h: led1-h {
|
|
+ rockchip,pins = <4 RK_PC5 RK_FUNC_GPIO &pcfg_pull_none>;
|
|
+ };
|
|
+ led2_h: led2-h {
|
|
+ rockchip,pins = <2 RK_PB0 RK_FUNC_GPIO &pcfg_pull_none>;
|
|
+ };
|
|
+ };
|
|
+
|
|
+ pcie {
|
|
+ pcie0_pwren_h: pcie0-pwren-h {
|
|
+ rockchip,pins = <0 RK_PD3 RK_FUNC_GPIO &pcfg_pull_none>;
|
|
+ };
|
|
+ pcie0_perstn: pcie0-perstn {
|
|
+ rockchip,pins = <2 RK_PB4 RK_FUNC_GPIO &pcfg_pull_up>;
|
|
+ };
|
|
+ };
|
|
+
|
|
+ sdmmc {
|
|
+ sdmmc0_pwren_h: sdmmc0-pwren-h {
|
|
+ rockchip,pins = <0 RK_PB6 RK_FUNC_GPIO &pcfg_pull_up>;
|
|
+ };
|
|
+ };
|
|
+
|
|
+ sound {
|
|
+ hp_det_l: hp-det-l {
|
|
+ rockchip,pins = <2 RK_PD6 RK_FUNC_GPIO &pcfg_pull_none>;
|
|
+ };
|
|
+ };
|
|
+
|
|
+ usb {
|
|
+ usb3_host_pwren_h: usb3-host-pwren-h {
|
|
+ rockchip,pins = <0 RK_PC7 RK_FUNC_GPIO &pcfg_pull_none>;
|
|
+ };
|
|
+ usb_otg0_pwren_h: usb-otg0-pwren-h {
|
|
+ rockchip,pins = <0 RK_PD1 RK_FUNC_GPIO &pcfg_pull_none>;
|
|
+ };
|
|
+ };
|
|
+};
|
|
+
|
|
+&sai2 {
|
|
+ status = "okay";
|
|
+};
|
|
+
|
|
+&saradc {
|
|
+ vref-supply = <&vcca_1v8_s0>;
|
|
+ status = "okay";
|
|
+};
|
|
+
|
|
+&sdmmc {
|
|
+ bus-width = <4>;
|
|
+ cap-mmc-highspeed;
|
|
+ cap-sd-highspeed;
|
|
+ disable-wp;
|
|
+ no-mmc;
|
|
+ no-sdio;
|
|
+ pinctrl-names = "default";
|
|
+ pinctrl-0 = <&sdmmc0_clk>, <&sdmmc0_cmd>, <&sdmmc0_det>, <&sdmmc0_bus4>;
|
|
+ sd-uhs-sdr104;
|
|
+ vmmc-supply = <&vcc_3v3_s3>;
|
|
+ vqmmc-supply = <&vcc3v3_sd_s0>;
|
|
+ status = "okay";
|
|
+};
|
|
+
|
|
+&sfc1 {
|
|
+ pinctrl-names = "default";
|
|
+ pinctrl-0 = <&fspi1m1_csn0>, <&fspi1m1_pins>;
|
|
+ status = "okay";
|
|
+
|
|
+ flash@0 {
|
|
+ compatible = "jedec,spi-nor";
|
|
+ reg = <0>;
|
|
+ m25p,fast-read;
|
|
+ spi-max-frequency = <50000000>;
|
|
+ spi-rx-bus-width = <4>;
|
|
+ spi-tx-bus-width = <1>;
|
|
+ vcc-supply = <&vcc_1v8_s3>;
|
|
+ };
|
|
+};
|
|
+
|
|
+&u2phy0 {
|
|
+ status = "okay";
|
|
+};
|
|
+
|
|
+&u2phy0_otg {
|
|
+ phy-supply = <&vcc5v0_usb_otg0>;
|
|
+ status = "okay";
|
|
+};
|
|
+
|
|
+&u2phy1 {
|
|
+ status = "okay";
|
|
+};
|
|
+
|
|
+&u2phy1_otg {
|
|
+ phy-supply = <&usb3_port2_5v>;
|
|
+ status = "okay";
|
|
+};
|
|
+
|
|
+&uart0 {
|
|
+ status = "okay";
|
|
+};
|
|
+
|
|
+&usbdp_phy {
|
|
+ status = "okay";
|
|
+};
|
|
+
|
|
+&usb_drd0_dwc3 {
|
|
+ dr_mode = "otg";
|
|
+ extcon = <&u2phy0>;
|
|
+ status = "okay";
|
|
+};
|
|
+
|
|
+&usb_drd1_dwc3 {
|
|
+ dr_mode = "host";
|
|
+ status = "okay";
|
|
+};
|
|
+
|
|
+&vop {
|
|
+ status = "okay";
|
|
+};
|
|
+
|
|
+&vop_mmu {
|
|
+ status = "okay";
|
|
+};
|
|
+
|
|
+&vp0 {
|
|
+ vp0_out_hdmi: endpoint@ROCKCHIP_VOP2_EP_HDMI0 {
|
|
+ reg = <ROCKCHIP_VOP2_EP_HDMI0>;
|
|
+ remote-endpoint = <&hdmi_in_vp0>;
|
|
+ };
|
|
+};
|
|
+
|
|
+&wdt {
|
|
+ status = "okay";
|
|
+};
|