tew-829dru-goldrepo/spi-extracted.dts
MooCat 2c0a4fac8c
DTS update
upload of canonical single source of truth DTS extracted from running device
2026-06-17 13:13:18 -04:00

1100 lines
25 KiB
Plaintext

/dts-v1/;
/ {
#address-cells = <0x01>;
#size-cells = <0x01>;
model = "TRENDnet TEW-829DRU";
compatible = "trendnet,tew-829dru\0qcom,ipq4019-dk04.1-c1\0qcom,ipq4019";
interrupt-parent = <0x01>;
reserved-memory {
#address-cells = <0x01>;
#size-cells = <0x01>;
ranges;
smem@87e00000 {
reg = <0x87e00000 0x80000>;
no-map;
};
tz@87e80000 {
reg = <0x87e80000 0x180000>;
no-map;
};
};
aliases {
spi0 = "/soc/spi@78b5000";
spi1 = "/soc/spi@78b6000";
i2c0 = "/soc/i2c@78b7000";
i2c1 = "/soc/i2c@78b8000";
serial0 = "/soc/serial@78af000";
serial1 = "/soc/serial@78b0000";
mtd0 = "/soc/spi@78b5000/flash@0/partitions/partition@0";
mtd1 = "/soc/spi@78b5000/flash@0/partitions/partition@40000";
mtd2 = "/soc/spi@78b5000/flash@0/partitions/partition@60000";
mtd3 = "/soc/spi@78b5000/flash@0/partitions/partition@c0000";
mtd4 = "/soc/spi@78b5000/flash@0/partitions/partition@d0000";
mtd5 = "/soc/spi@78b5000/flash@0/partitions/partition@e0000";
mtd6 = "/soc/spi@78b5000/flash@0/partitions/partition@f0000";
mtd7 = "/soc/spi@78b5000/flash@0/partitions/partition@170000";
mtd8 = "/soc/nand-controller@79b0000/nand@0/partitions/partition@0";
mtd9 = "/soc/nand-controller@79b0000/nand@0/partitions/partition@3000000";
mtd10 = "/soc/nand-controller@79b0000/nand@0/partitions/partition@6000000";
};
cpus {
#address-cells = <0x01>;
#size-cells = <0x00>;
cpu@0 {
device_type = "cpu";
compatible = "arm,cortex-a7";
enable-method = "qcom,kpss-acc-v2";
next-level-cache = <0x02>;
qcom,acc = <0x03>;
qcom,saw = <0x04>;
reg = <0x00>;
clocks = <0x05 0x09>;
clock-frequency = <0x00>;
clock-latency = <0x3e800>;
operating-points-v2 = <0x06>;
};
cpu@1 {
device_type = "cpu";
compatible = "arm,cortex-a7";
enable-method = "qcom,kpss-acc-v2";
next-level-cache = <0x02>;
qcom,acc = <0x07>;
qcom,saw = <0x08>;
reg = <0x01>;
clocks = <0x05 0x09>;
clock-frequency = <0x00>;
clock-latency = <0x3e800>;
operating-points-v2 = <0x06>;
};
cpu@2 {
device_type = "cpu";
compatible = "arm,cortex-a7";
enable-method = "qcom,kpss-acc-v2";
next-level-cache = <0x02>;
qcom,acc = <0x09>;
qcom,saw = <0x0a>;
reg = <0x02>;
clocks = <0x05 0x09>;
clock-frequency = <0x00>;
clock-latency = <0x3e800>;
operating-points-v2 = <0x06>;
};
cpu@3 {
device_type = "cpu";
compatible = "arm,cortex-a7";
enable-method = "qcom,kpss-acc-v2";
next-level-cache = <0x02>;
qcom,acc = <0x0b>;
qcom,saw = <0x0c>;
reg = <0x03>;
clocks = <0x05 0x09>;
clock-frequency = <0x00>;
clock-latency = <0x3e800>;
operating-points-v2 = <0x06>;
};
l2-cache {
compatible = "cache";
cache-level = <0x02>;
cache-unified;
qcom,saw = <0x0d>;
phandle = <0x02>;
};
};
opp-table {
compatible = "operating-points-v2";
opp-shared;
phandle = <0x06>;
opp-48000000 {
opp-hz = <0x00 0x2dc6c00>;
clock-latency-ns = <0x3e800>;
};
opp-200000000 {
opp-hz = <0x00 0xbebc200>;
clock-latency-ns = <0x3e800>;
};
opp-500000000 {
opp-hz = <0x00 0x1dcd6500>;
clock-latency-ns = <0x3e800>;
};
opp-716000000 {
opp-hz = <0x00 0x2aad4b00>;
clock-latency-ns = <0x3e800>;
};
};
memory {
device_type = "memory";
reg = <0x80000000 0x10000000>;
};
pmu {
compatible = "arm,cortex-a7-pmu";
interrupts = <0x01 0x07 0xf04>;
};
clocks {
sleep_clk {
compatible = "fixed-clock";
clock-frequency = <0x7d00>;
#clock-cells = <0x00>;
phandle = <0x0f>;
};
xo {
compatible = "fixed-clock";
clock-frequency = <0x2dc6c00>;
#clock-cells = <0x00>;
phandle = <0x0e>;
};
};
firmware {
scm {
compatible = "qcom,scm-ipq4019\0qcom,scm";
};
};
timer {
compatible = "arm,armv7-timer";
interrupts = <0x01 0x02 0xf08 0x01 0x03 0xf08 0x01 0x04 0xf08 0x01 0x01 0xf08>;
clock-frequency = <0x2dc6c00>;
always-on;
};
soc {
#address-cells = <0x01>;
#size-cells = <0x01>;
ranges;
compatible = "simple-bus";
interrupt-controller@b000000 {
compatible = "qcom,msm-qgic2";
interrupt-controller;
#interrupt-cells = <0x03>;
reg = <0xb000000 0x1000 0xb002000 0x1000>;
phandle = <0x01>;
};
clock-controller@1800000 {
compatible = "qcom,gcc-ipq4019";
#clock-cells = <0x01>;
#reset-cells = <0x01>;
reg = <0x1800000 0x60000>;
clocks = <0x0e 0x0f>;
clock-names = "xo\0sleep_clk";
phandle = <0x05>;
};
rng@22000 {
compatible = "qcom,prng";
reg = <0x22000 0x140>;
clocks = <0x05 0x2b>;
clock-names = "core";
status = "disabled";
};
pinctrl@1000000 {
compatible = "qcom,ipq4019-pinctrl";
reg = <0x1000000 0x300000>;
gpio-controller;
gpio-ranges = <0x10 0x00 0x00 0x64>;
#gpio-cells = <0x02>;
interrupt-controller;
#interrupt-cells = <0x02>;
interrupts = <0x00 0xd0 0x04>;
phandle = <0x10>;
serial0-state {
pins = "gpio16\0gpio17";
function = "blsp_uart0";
bias-disable;
};
serial1-state {
pins = "gpio8\0gpio9\0gpio10\0gpio11";
function = "blsp_uart1";
bias-disable;
};
spi-0-state {
spi0-pins {
function = "blsp_spi0";
pins = "gpio13\0gpio14\0gpio15";
bias-disable;
};
spi0-cs-pins {
function = "gpio";
pins = "gpio12";
bias-disable;
output-high;
};
};
i2c-0-state {
pins = "gpio20\0gpio21";
function = "blsp_i2c0";
bias-disable;
};
/* MOOLESHACAT CAUGHT A MOUSE :3 */
/* THESE OUR THE NAND GPIOS ? THIS GETS NAND WORKING, WE NEEDED THESE! */
/* NOTE: LOOK, THEY DEFINE GPIO53 ... I WAS WRONG ABOUT 53 BEING ASSIGNED ELSEWHERE */
nand-state {
pins = "gpio53\0gpio55\0gpio56\0gpio57\0gpio58\0gpio59\0gpio60\0gpio62\0gpio63\0gpio64\0gpio65\0gpio66\0gpio67\0gpio68\0gpio69";
function = "qpic";
};
/* We figured this out by probing, but good to see confirmation here */
/* we know GPIO48 works, the USB works driving it high */
usb-power-en {
gpio-hog;
gpios = <0x30 0x00>;
output-high;
line-name = "usb-power-enable";
};
/* MDIO pins! */
mdio_pinmux {
phandle = <0x20>;
pinmux_1 {
pins = "gpio53";
function = "mdio";
};
pinmux_2 {
pins = "gpio52";
function = "mdc";
};
pinconf {
pins = "gpio52\0gpio53";
bias-pull-up;
};
};
uart0-state {
pins = "gpio16\0gpio17";
function = "blsp_uart0";
bias-disable;
phandle = <0x13>;
};
uart1-state {
pins = "gpio8\0gpio9";
function = "blsp_uart1";
bias-disable;
phandle = <0x14>;
};
led0_pinmux {
linux,phandle = <0x52>;
phandle = <0x52>;
mux_1 {
pins = "gpio36";
function = "led0";
bias-pull-down;
};
mux_2 {
pins = "gpio40";
function = "led4";
bias-pull-down;
};
};
uart1_pinmux {
linux,phandle = <0x56>;
phandle = <0x56>;
mux {
pins = "gpio8\0gpio9\0gpio10\0gpio11";
function = "blsp_uart1";
bias-disable;
};
};
spi_0_pinmux {
linux,phandle = <0x4a>;
phandle = <0x4a>;
mux {
pins = "gpio12\0gpio13\0gpio14\0gpio15";
function = "blsp_spi0";
bias-disable;
};
};
i2c_0_pinmux {
linux,phandle = <0x4f>;
phandle = <0x4f>;
mux {
pins = "gpio20\0gpio21";
function = "blsp_i2c0";
bias-disable;
};
};
ts_0_pinmux {
mux_1 {
pins = "gpio34";
output-high;
};
mux_2 {
pins = "gpio35";
input-enable;
bias-pull-up;
};
};
};
regulator@1948000 {
compatible = "qcom,vqmmc-ipq4019-regulator";
reg = <0x1948000 0x04>;
regulator-name = "vqmmc";
regulator-min-microvolt = <0x16e360>;
regulator-max-microvolt = <0x2dc6c0>;
regulator-always-on;
status = "disabled";
};
mmc@7824900 {
compatible = "qcom,ipq4019-sdhci\0qcom,sdhci-msm-v4";
reg = <0x7824900 0x11c 0x7824000 0x800>;
reg-names = "hc\0core";
interrupts = <0x00 0x7b 0x04 0x00 0x8a 0x04>;
interrupt-names = "hc_irq\0pwr_irq";
bus-width = <0x08>;
clocks = <0x05 0x2e 0x05 0x2f 0x0e>;
clock-names = "iface\0core\0xo";
status = "disabled";
};
dma-controller@7884000 {
compatible = "qcom,bam-v1.7.0";
reg = <0x7884000 0x23000>;
interrupts = <0x00 0xee 0x04>;
clocks = <0x05 0x15>;
clock-names = "bam_clk";
#dma-cells = <0x01>;
qcom,ee = <0x00>;
status = "okay";
phandle = <0x11>;
};
/* MOOLESHACAT CAUGHT ANOTHER MOUSE :3 */
/* this gives us confirmation of our partitions, particularily where all three caldata are */
/* going to rip partitions to replace what I have currently, it is lacking this detail */
spi@78b5000 {
compatible = "qcom,spi-qup-v2.2.1";
reg = <0x78b5000 0x600>;
interrupts = <0x00 0x5f 0x04>;
clocks = <0x05 0x17 0x05 0x15>;
clock-names = "core\0iface";
#address-cells = <0x01>;
#size-cells = <0x00>;
dmas = <0x11 0x04 0x11 0x05>;
dma-names = "tx\0rx";
status = "okay";
pinctrl-0 = <0x4a>;
pinctrl-names = "default";
cs-gpios = <0x10 0x0c 0x00>;
flash@0 {
#address-cells = <0x01>;
#size-cells = <0x01>;
reg = <0x00>;
compatible = "mx25l6405d\0jedec,spi-nor";
spi-max-frequency = <0x16e3600>;
partitions {
compatible = "fixed-partitions";
#address-cells = <0x01>;
#size-cells = <0x01>;
partition@0 {
label = "SBL1";
reg = <0x00 0x40000>;
read-only;
};
partition@40000 {
label = "MIBIB";
reg = <0x40000 0x20000>;
read-only;
};
partition@60000 {
label = "QSEE";
reg = <0x60000 0x60000>;
read-only;
};
partition@c0000 {
label = "CDT";
reg = <0xc0000 0x10000>;
read-only;
};
partition@d0000 {
label = "DDRPARAMS";
reg = <0xd0000 0x10000>;
read-only;
};
partition@e0000 {
label = "APPSBLENV";
reg = <0xe0000 0x10000>;
};
partition@f0000 {
label = "APPSBL";
reg = <0xf0000 0x80000>;
read-only;
};
partition@170000 {
label = "ART";
reg = <0x170000 0x10000>;
read-only;
compatible = "nvmem-cells";
#address-cells = <0x01>;
#size-cells = <0x01>;
macaddr@0 {
reg = <0x00 0x06>;
};
caldata@1000 {
reg = <0x1000 0x2f20>;
phandle = <0x17>;
};
caldata@5000 {
reg = <0x5000 0x2f20>;
phandle = <0x18>;
};
caldata@9000 {
reg = <0x9000 0x2f20>;
phandle = <0x15>;
};
};
};
};
};
spi@78b6000 {
compatible = "qcom,spi-qup-v2.2.1";
reg = <0x78b6000 0x600>;
interrupts = <0x00 0x60 0x04>;
clocks = <0x05 0x19 0x05 0x15>;
clock-names = "core\0iface";
#address-cells = <0x01>;
#size-cells = <0x00>;
dmas = <0x11 0x06 0x11 0x07>;
dma-names = "tx\0rx";
status = "disabled";
};
i2c@78b7000 {
compatible = "qcom,i2c-qup-v2.2.1";
reg = <0x78b7000 0x600>;
interrupts = <0x00 0x61 0x04>;
clocks = <0x05 0x16 0x05 0x15>;
clock-names = "core\0iface";
#address-cells = <0x01>;
#size-cells = <0x00>;
dmas = <0x11 0x08 0x11 0x09>;
dma-names = "tx\0rx";
status = "disabled";
};
i2c@78b8000 {
compatible = "qcom,i2c-qup-v2.2.1";
reg = <0x78b8000 0x600>;
interrupts = <0x00 0x62 0x04>;
clocks = <0x05 0x18 0x05 0x15>;
clock-names = "core\0iface";
#address-cells = <0x01>;
#size-cells = <0x00>;
dmas = <0x11 0x0a 0x11 0x0b>;
dma-names = "tx\0rx";
status = "disabled";
};
dma-controller@8e04000 {
compatible = "qcom,bam-v1.7.0";
reg = <0x8e04000 0x20000>;
interrupts = <0x00 0xcf 0x04>;
clocks = <0x05 0x21>;
clock-names = "bam_clk";
#dma-cells = <0x01>;
qcom,ee = <0x01>;
qcom,controlled-remotely;
status = "disabled";
phandle = <0x12>;
};
crypto@8e3a000 {
compatible = "qcom,crypto-v5.1";
reg = <0x8e3a000 0x6000>;
clocks = <0x05 0x21 0x05 0x22 0x05 0x23>;
clock-names = "iface\0bus\0core";
dmas = <0x12 0x02 0x12 0x03>;
dma-names = "rx\0tx";
status = "disabled";
};
power-manager@b088000 {
compatible = "qcom,kpss-acc-v2";
reg = <0xb088000 0x1000 0xb008000 0x1000>;
phandle = <0x03>;
};
power-manager@b098000 {
compatible = "qcom,kpss-acc-v2";
reg = <0xb098000 0x1000 0xb008000 0x1000>;
phandle = <0x07>;
};
power-manager@b0a8000 {
compatible = "qcom,kpss-acc-v2";
reg = <0xb0a8000 0x1000 0xb008000 0x1000>;
phandle = <0x09>;
};
power-manager@b0b8000 {
compatible = "qcom,kpss-acc-v2";
reg = <0xb0b8000 0x1000 0xb008000 0x1000>;
phandle = <0x0b>;
};
power-manager@b089000 {
compatible = "qcom,ipq4019-saw2-cpu\0qcom,saw2";
reg = <0xb089000 0x1000 0xb009000 0x1000>;
phandle = <0x04>;
};
power-manager@b099000 {
compatible = "qcom,ipq4019-saw2-cpu\0qcom,saw2";
reg = <0xb099000 0x1000 0xb009000 0x1000>;
phandle = <0x08>;
};
power-manager@b0a9000 {
compatible = "qcom,ipq4019-saw2-cpu\0qcom,saw2";
reg = <0xb0a9000 0x1000 0xb009000 0x1000>;
phandle = <0x0a>;
};
power-manager@b0b9000 {
compatible = "qcom,ipq4019-saw2-cpu\0qcom,saw2";
reg = <0xb0b9000 0x1000 0xb009000 0x1000>;
phandle = <0x0c>;
};
power-manager@b012000 {
compatible = "qcom,ipq4019-saw2-l2\0qcom,saw2";
reg = <0xb012000 0x1000>;
phandle = <0x0d>;
};
serial@78af000 {
compatible = "qcom,msm-uartdm-v1.4\0qcom,msm-uartdm";
reg = <0x78af000 0x200>;
interrupts = <0x00 0x6b 0x04>;
status = "okay";
clocks = <0x05 0x1a 0x05 0x15>;
clock-names = "core\0iface";
dmas = <0x11 0x00 0x11 0x01>;
dma-names = "tx\0rx";
pinctrl-0 = <0x13>;
pinctrl-names = "default";
};
serial@78b0000 {
compatible = "qcom,msm-uartdm-v1.4\0qcom,msm-uartdm";
reg = <0x78b0000 0x200>;
interrupts = <0x00 0x6c 0x04>;
status = "okay";
clocks = <0x05 0x1b 0x05 0x15>;
clock-names = "core\0iface";
dmas = <0x11 0x02 0x11 0x03>;
dma-names = "tx\0rx";
pinctrl-0 = <0x14>;
pinctrl-names = "default";
};
watchdog@b017000 {
compatible = "qcom,kpss-wdt-ipq4019\0qcom,kpss-wdt";
reg = <0xb017000 0x40>;
clocks = <0x0f>;
timeout-sec = <0x0a>;
status = "disabled";
};
restart@4ab000 {
compatible = "qcom,pshold";
reg = <0x4ab000 0x04>;
};
pcie@40000000 {
compatible = "qcom,pcie-ipq4019";
reg = <0x40000000 0xf1d 0x40000f20 0xa8 0x80000 0x2000 0x40100000 0x1000>;
reg-names = "dbi\0elbi\0parf\0config";
device_type = "pci";
linux,pci-domain = <0x00>;
bus-range = <0x00 0xff>;
num-lanes = <0x01>;
#address-cells = <0x03>;
#size-cells = <0x02>;
ranges = <0x81000000 0x00 0x00 0x40200000 0x00 0x100000 0x82000000 0x00 0x40300000 0x40300000 0x00 0xd00000>;
interrupts = <0x00 0x8d 0x04>;
interrupt-names = "msi";
#interrupt-cells = <0x01>;
interrupt-map-mask = <0x00 0x00 0x00 0x07>;
interrupt-map = <0x00 0x00 0x00 0x01 0x01 0x00 0x8e 0x04 0x00 0x00 0x00 0x02 0x01 0x00 0x8f 0x04 0x00 0x00 0x00 0x03 0x01 0x00 0x90 0x04 0x00 0x00 0x00 0x04 0x01 0x00 0x91 0x04>;
clocks = <0x05 0x27 0x05 0x28 0x05 0x29>;
clock-names = "aux\0master_bus\0slave_bus";
resets = <0x05 0x1c 0x05 0x1b 0x05 0x1a 0x05 0x19 0x05 0x18 0x05 0x17 0x05 0x16 0x05 0x15 0x05 0x14 0x05 0x13 0x05 0x12 0x05 0x11>;
reset-names = "axi_m\0axi_s\0pipe\0axi_m_vmid\0axi_s_xpu\0parf\0phy\0axi_m_sticky\0pipe_sticky\0pwr\0ahb\0phy_ahb";
status = "okay";
perst-gpios = <0x10 0x26 0x01>;
pcie@0 {
device_type = "pci";
reg = <0x00 0x00 0x00 0x00 0x00>;
bus-range = <0x01 0xff>;
#address-cells = <0x03>;
#size-cells = <0x02>;
ranges;
wifi@0,0 {
compatible = "qcom,ath10k";
reg = <0x10000 0x00 0x00 0x00 0x00>;
nvmem-cells = <0x15>;
nvmem-cell-names = "pre-calibration";
};
};
};
dma-controller@7984000 {
compatible = "qcom,bam-v1.7.0";
reg = <0x7984000 0x1a000>;
interrupts = <0x00 0x65 0x04>;
clocks = <0x05 0x2d>;
clock-names = "bam_clk";
#dma-cells = <0x01>;
qcom,ee = <0x00>;
status = "okay";
phandle = <0x16>;
};
/* confirmation of our correct nand layout */
nand-controller@79b0000 {
compatible = "qcom,ipq4019-nand";
reg = <0x79b0000 0x1000>;
#address-cells = <0x01>;
#size-cells = <0x00>;
clocks = <0x05 0x2d 0x05 0x2c>;
clock-names = "core\0aon";
dmas = <0x16 0x00 0x16 0x01 0x16 0x02>;
dma-names = "tx\0rx\0cmd";
status = "disabled";
nand@0 {
reg = <0x00>;
nand-ecc-strength = <0x04>;
nand-ecc-step-size = <0x200>;
nand-bus-width = <0x08>;
partitions {
compatible = "fixed-partitions";
#address-cells = <0x01>;
#size-cells = <0x01>;
partition@0 {
label = "rootfs";
reg = <0x00 0x3000000>;
};
partition@3000000 {
label = "rootfs_1";
reg = <0x3000000 0x3000000>;
};
partition@6000000 {
label = "overlay";
reg = <0x6000000 0x2000000>;
};
};
};
};
/* confirmation of our wifi parameters - resets, interrupts, clocks, variant */
wifi@a000000 {
compatible = "qcom,ipq4019-wifi";
reg = <0xa000000 0x200000>;
resets = <0x05 0x00 0x05 0x01 0x05 0x02 0x05 0x03 0x05 0x04 0x05 0x05>;
reset-names = "wifi_cpu_init\0wifi_radio_srif\0wifi_radio_warm\0wifi_radio_cold\0wifi_core_warm\0wifi_core_cold";
clocks = <0x05 0x3b 0x05 0x3c 0x05 0x3d>;
clock-names = "wifi_wcss_cmd\0wifi_wcss_ref\0wifi_wcss_rtc";
interrupts = <0x00 0x20 0x01 0x00 0x21 0x01 0x00 0x22 0x01 0x00 0x23 0x01 0x00 0x24 0x01 0x00 0x25 0x01 0x00 0x26 0x01 0x00 0x27 0x01 0x00 0x28 0x01 0x00 0x29 0x01 0x00 0x2a 0x01 0x00 0x2b 0x01 0x00 0x2c 0x01 0x00 0x2d 0x01 0x00 0x2e 0x01 0x00 0x2f 0x01 0x00 0xa8 0x04>;
interrupt-names = "msi0\0msi1\0msi2\0msi3\0msi4\0msi5\0msi6\0msi7\0msi8\0msi9\0msi10\0msi11\0msi12\0msi13\0msi14\0msi15\0legacy";
status = "okay";
qcom,ath10k-calibration-variant = "TEW-829DRU-2G";
nvmem-cells = <0x17>;
nvmem-cell-names = "pre-calibration";
};
wifi@a800000 {
compatible = "qcom,ipq4019-wifi";
reg = <0xa800000 0x200000>;
resets = <0x05 0x06 0x05 0x07 0x05 0x08 0x05 0x09 0x05 0x0a 0x05 0x0b>;
reset-names = "wifi_cpu_init\0wifi_radio_srif\0wifi_radio_warm\0wifi_radio_cold\0wifi_core_warm\0wifi_core_cold";
clocks = <0x05 0x3e 0x05 0x3f 0x05 0x40>;
clock-names = "wifi_wcss_cmd\0wifi_wcss_ref\0wifi_wcss_rtc";
interrupts = <0x00 0x30 0x01 0x00 0x31 0x01 0x00 0x32 0x01 0x00 0x33 0x01 0x00 0x34 0x01 0x00 0x35 0x01 0x00 0x36 0x01 0x00 0x37 0x01 0x00 0x38 0x01 0x00 0x39 0x01 0x00 0x3a 0x01 0x00 0x3b 0x01 0x00 0x3c 0x01 0x00 0x3d 0x01 0x00 0x3e 0x01 0x00 0x3f 0x01 0x00 0xa9 0x04>;
interrupt-names = "msi0\0msi1\0msi2\0msi3\0msi4\0msi5\0msi6\0msi7\0msi8\0msi9\0msi10\0msi11\0msi12\0msi13\0msi14\0msi15\0legacy";
status = "okay";
qcom,ath10k-calibration-variant = "TEW-829DRU-5G";
nvmem-cells = <0x18>;
nvmem-cell-names = "pre-calibration";
};
/* MOOLESHACAT CAUGHT ANOTHER MOUSE :3 */
/* NOW WE HAVE EXACT SWITCH LAYOUT */
switch@c000000 {
compatible = "qca,ipq4019-qca8337n";
reg = <0xc000000 0x80000 0x98000 0x800>;
reg-names = "base\0psgmii_phy";
resets = <0x05 0x4d>;
reset-names = "psgmii_rst";
mdio = <0x19>;
psgmii-ethphy = <0x1a>;
status = "okay";
mdio-bus = <0x19>;
ports {
#address-cells = <0x01>;
#size-cells = <0x00>;
port@0 {
reg = <0x00>;
label = "cpu";
ethernet = <0x1b>;
phy-mode = "internal";
fixed-link {
speed = <0x3e8>;
full-duplex;
pause;
asym-pause;
};
};
port@1 {
reg = <0x01>;
label = "wan1";
phy-handle = <0x1c>;
phy-mode = "psgmii";
status = "okay";
};
port@2 {
reg = <0x02>;
label = "wan2";
phy-handle = <0x1d>;
phy-mode = "psgmii";
status = "okay";
};
port@3 {
reg = <0x03>;
label = "lan1";
phy-handle = <0x1e>;
phy-mode = "psgmii";
status = "okay";
};
port@4 {
reg = <0x04>;
label = "lan2";
phy-handle = <0x1f>;
phy-mode = "psgmii";
status = "okay";
};
port@5 {
reg = <0x05>;
label = "lan3";
phy-handle = <0x1a>;
phy-mode = "psgmii";
status = "okay";
};
};
};
ethernet@c080000 {
compatible = "qcom,ipq4019-ess-edma";
reg = <0xc080000 0x8000>;
resets = <0x05 0x1d>;
reset-names = "ess";
clocks = <0x05 0x24>;
clock-names = "ess";
interrupts = <0x00 0x41 0x01 0x00 0x42 0x01 0x00 0x43 0x01 0x00 0x44 0x01 0x00 0x45 0x01 0x00 0x46 0x01 0x00 0x47 0x01 0x00 0x48 0x01 0x00 0x49 0x01 0x00 0x4a 0x01 0x00 0x4b 0x01 0x00 0x4c 0x01 0x00 0x4d 0x01 0x00 0x4e 0x01 0x00 0x4f 0x01 0x00 0x50 0x01 0x00 0xf0 0x01 0x00 0xf1 0x01 0x00 0xf2 0x01 0x00 0xf3 0x01 0x00 0xf4 0x01 0x00 0xf5 0x01 0x00 0xf6 0x01 0x00 0xf7 0x01 0x00 0xf8 0x01 0x00 0xf9 0x01 0x00 0xfa 0x01 0x00 0xfb 0x01 0x00 0xfc 0x01 0x00 0xfd 0x01 0x00 0xfe 0x01 0x00 0xff 0x01>;
phy-mode = "internal";
status = "okay";
phandle = <0x1b>;
fixed-link {
speed = <0x3e8>;
full-duplex;
pause;
};
};
/* MOOLESHACAT CAUGHT ANOTHER MOUSE :3 */
/* WE HAVE THE 8337 CONFIG AND LAYOUT */
mdio@90000 {
#address-cells = <0x01>;
#size-cells = <0x00>;
compatible = "qcom,ipq4019-mdio";
reg = <0x90000 0x64>;
status = "okay";
pinctrl-0 = <0x20>;
pinctrl-names = "default";
phandle = <0x19>;
ethernet-phy-package@8 {
#address-cells = <0x01>;
#size-cells = <0x00>;
compatible = "qcom,qca8075-package";
reg = <0x08>;
qcom,tx-drive-strength-milliwatt = <0x12c>;
ethernet-phy@8 {
reg = <0x08>;
phandle = <0x1c>;
};
ethernet-phy@9 {
reg = <0x09>;
phandle = <0x1d>;
};
ethernet-phy@10 {
reg = <0x0a>;
phandle = <0x1e>;
};
ethernet-phy@11 {
reg = <0x0b>;
phandle = <0x1f>;
};
ethernet-phy@12 {
reg = <0x0c>;
phandle = <0x1a>;
};
};
switch@10 {
compatible = "qca,ipq4019-qca8337n";
#address-cells = <0x01>;
#size-cells = <0x00>;
reg = <0x10>;
ports {
#address-cells = <0x01>;
#size-cells = <0x00>;
port@0 {
reg = <0x00>;
label = "cpu";
ethernet = <0x1b>;
phy-mode = "rgmii";
tag-protocol = "none";
fixed-link {
speed = <0x3e8>;
full-duplex;
};
};
port@1 {
reg = <0x01>;
label = "lan4";
phy-mode = "internal";
phy-handle = <0x21>;
};
port@2 {
reg = <0x02>;
label = "lan5";
phy-mode = "internal";
phy-handle = <0x22>;
};
port@3 {
reg = <0x03>;
label = "lan6";
phy-mode = "internal";
phy-handle = <0x23>;
};
port@4 {
reg = <0x04>;
label = "lan7";
phy-mode = "internal";
phy-handle = <0x24>;
};
port@5 {
reg = <0x05>;
label = "lan8";
phy-mode = "internal";
phy-handle = <0x25>;
};
};
mdio {
#address-cells = <0x01>;
#size-cells = <0x00>;
ethernet-phy@0 {
reg = <0x00>;
phandle = <0x21>;
};
ethernet-phy@1 {
reg = <0x01>;
phandle = <0x22>;
};
ethernet-phy@2 {
reg = <0x02>;
phandle = <0x23>;
};
ethernet-phy@3 {
reg = <0x03>;
phandle = <0x24>;
};
ethernet-phy@4 {
reg = <0x04>;
phandle = <0x25>;
};
};
};
};
usb-phy@9a000 {
compatible = "qcom,usb-ss-ipq4019-phy";
#phy-cells = <0x00>;
reg = <0x9a000 0x800>;
reg-names = "phy_base";
resets = <0x05 0x0c>;
reset-names = "por_rst";
status = "okay";
phandle = <0x27>;
};
usb-phy@a6000 {
compatible = "qcom,usb-hs-ipq4019-phy";
#phy-cells = <0x00>;
reg = <0xa6000 0x40>;
reg-names = "phy_base";
resets = <0x05 0x0d 0x05 0x0e>;
reset-names = "por_rst\0srif_rst";
status = "okay";
phandle = <0x26>;
};
usb@8af8800 {
compatible = "qcom,ipq4019-dwc3\0qcom,dwc3";
reg = <0x8af8800 0x100>;
#address-cells = <0x01>;
#size-cells = <0x01>;
clocks = <0x05 0x38 0x05 0x39 0x05 0x3a>;
clock-names = "core\0sleep\0mock_utmi";
ranges;
status = "okay";
dr_mode = "host";
phys = <0x26 0x27>;
phy-names = "usb2-phy\0usb3-phy";
usb@8a00000 {
compatible = "snps,dwc3";
reg = <0x8a00000 0xf8000>;
interrupts = <0x00 0x84 0x04>;
phys = <0x26 0x27>;
phy-names = "usb2-phy\0usb3-phy";
dr_mode = "host";
};
};
usb-phy@a8000 {
compatible = "qcom,usb-hs-ipq4019-phy";
#phy-cells = <0x00>;
reg = <0xa8000 0x40>;
reg-names = "phy_base";
resets = <0x05 0x0f 0x05 0x10>;
reset-names = "por_rst\0srif_rst";
status = "okay";
phandle = <0x28>;
};
usb@60f8800 {
compatible = "qcom,ipq4019-dwc3\0qcom,dwc3";
reg = <0x60f8800 0x100>;
#address-cells = <0x01>;
#size-cells = <0x01>;
clocks = <0x05 0x35 0x05 0x36 0x05 0x37>;
clock-names = "core\0sleep\0mock_utmi";
ranges;
status = "okay";
usb@6000000 {
compatible = "snps,dwc3";
reg = <0x6000000 0xf8000>;
interrupts = <0x00 0x88 0x04>;
phys = <0x28>;
phy-names = "usb2-phy";
dr_mode = "host";
};
};
};
chosen {
stdout-path = "serial0:115200n8";
bootargs = "console=ttyMSM0,115200n8 earlyprintk";
};
};