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realtek: eth: remove redundant RTL93xx ring setup

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RTL93xx sets up the ring counters twice. One location is
inside rteth_93xx_hw_en_rxtx() and the other one is inside
rteth_93xx_hw_reset(). There are slight differences (e.g.
the ring size that is set or how the counters are cleared).
It is currently unclear where to place it best. For now
align this to RTL83xx and remove the coding from function
rteth_93xx_hw_en_rxtx(). Provide a complete & proper setup
in rteth_93xx_hw_reset().

Looking at the different old implementations one can see
that one initialized the ring counters with offset "-2".
This headroom is not needed. The old comment " Some SoCs
have issues with missing underflow protection" was only
regarding the way the counters are being resetted and not
how large they are setup.

Signed-off-by: Markus Stockhausen <markus.stockhausen@gmx.de>
Link: https://github.com/openwrt/openwrt/pull/22421
Signed-off-by: Robert Marko <robimarko@gmail.com>
This commit is contained in:
Markus Stockhausen 2026-03-14 18:27:53 +01:00 committed by Robert Marko
parent d3f23e9602
commit 39e2af7ed6
1 changed files with 9 additions and 16 deletions
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25
target/linux/realtek/files-6.12/drivers/net/ethernet/rtl838x_eth.c
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@ -460,11 +460,16 @@ static void rteth_93xx_hw_reset(struct rteth_ctrl *ctrl)
rteth_nic_reset(ctrl, 0x6);
/* Setup Head of Line */
for (int i = 0; i < RTETH_RX_RINGS; i++) {
int pos = (i % 3) * 10;
for (int r = 0; r < RTETH_RX_RINGS; r++) {
int cnt = min(RTETH_RX_RING_SIZE, 0x3ff);
int pos = (r % 3) * 10;
u32 v;
sw_w32_mask(0x3ff << pos, 0, ctrl->r->dma_if_rx_ring_size(i));
sw_w32_mask(0x3ff << pos, RTETH_RX_RING_SIZE, ctrl->r->dma_if_rx_ring_cntr(i));
/* set ring size */
sw_w32_mask(0x3ff << pos, cnt << pos, ctrl->r->dma_if_rx_ring_size(r));
/* clear counters */
v = (sw_r32(ctrl->r->dma_if_rx_ring_cntr(r)) >> pos) & 0x3ff;
sw_w32_mask(0x3ff << pos, v, ctrl->r->dma_if_rx_ring_cntr(r));
}
}
@ -576,18 +581,6 @@ static void rteth_93xx_hw_en_rxtx(struct rteth_ctrl *ctrl)
/* Setup CPU-Port: RX Buffer truncated at DEFAULT_MTU Bytes */
sw_w32((DEFAULT_MTU << 16) | RX_TRUNCATE_EN_93XX, ctrl->r->dma_if_ctrl);
for (int i = 0; i < RTETH_RX_RINGS; i++) {
int cnt = min(RTETH_RX_RING_SIZE - 2, 0x3ff);
int pos = (i % 3) * 10;
u32 v;
sw_w32_mask(0x3ff << pos, cnt << pos, ctrl->r->dma_if_rx_ring_size(i));
/* Some SoCs have issues with missing underflow protection */
v = (sw_r32(ctrl->r->dma_if_rx_ring_cntr(i)) >> pos) & 0x3ff;
sw_w32_mask(0x3ff << pos, v, ctrl->r->dma_if_rx_ring_cntr(i));
}
rteth_enable_all_rx_irqs(ctrl);
/* Enable DMA */