econet: add EN751627 subtarget and Zyxel EX3301-T0 board
The EN751627 EcoNet subtarget consists of the EN7516 DSL SoC and the (rare) EN7527 xPON SoC. We currently support pci / wifi, usb and flash, but the EN751221 eth driver is not portable to this family right now. Zyxel EX3301-T0 is a wifi router based on the EN7516, it is a DSL SoC but lacks the DSL port. Installation instructions: 1. Serial access is required, stop the Zyxel bootloader. 2. Use ATENv3 https://github.com/cjdelisle/ATENv3 to unlock bootloader 3. "ATLD x" on the prompt to start a TFTP server 4. Connect ethernet cable from any lan (yellow) port on modem to a device. 5. On your device, configure network to 192.168.1.2/30 6. On your device, send TRX file to 192.168.1.1 with name x, i.e. tftp -p -l ./econet/tclinux -r x 192.168.1.1 7. On modem, you should see a line like this: "Total 8022324 (0x7A6934) bytes received" note the hex value 8. "ATGU" to enter econet bootloader 9. "flash 80000 80020000 <the hex number without 0x>" For example: flash 80000 80020000 7A6934 10. "reboot 1" -- start the system If it boots back into the factory OS, you need to switch OS, from the ZHAL prompt: 1. "ATCB" -- load data from flash 2. "ATCF 0" -- switch to OS 0 3. "ATBT 1" -- enable flash write 4. "ATSB" -- save data 5. "ATSR 1" -- reboot system Signed-off-by: Caleb James DeLisle <cjd@cjdns.fr> Link: https://github.com/openwrt/openwrt/pull/22945 Signed-off-by: Hauke Mehrtens <hauke@hauke-m.de>
This commit is contained in:
Caleb James DeLisle
Hauke Mehrtens
parent
80eeb316a6
commit
b33959a668
@ -7,7 +7,7 @@ include $(TOPDIR)/rules.mk
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BOARD:=econet
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BOARDNAME:=EcoNet EN75xx MIPS
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FEATURES:=dt source-only squashfs nand usb
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SUBTARGETS:=en751221 en7528
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SUBTARGETS:=en751221 en751627 en7528
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KERNEL_PATCHVER:=6.12
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@ -137,6 +137,14 @@ main() {
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code_openwrt=30000000
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code_factory=31000000
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;;
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zyxel,ex3301-t0)
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part=$(part_named '"reservearea"')
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offset_blocks=5
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block_size=$((1024 * 128))
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code_offset=4095
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code_openwrt=30
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code_factory=31
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;;
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zyxel,pmg5617ga)
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# 00060fff
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part=$(part_named '"reservearea"')
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246
target/linux/econet/dts/en751627.dtsi
Normal file
246
target/linux/econet/dts/en751627.dtsi
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@ -0,0 +1,246 @@
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// SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
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/dts-v1/;
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#include <dt-bindings/interrupt-controller/mips-gic.h>
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#include <dt-bindings/clock/en7523-clk.h>
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#include <dt-bindings/reset/airoha,en7523-reset.h>
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/ {
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compatible = "econet,en751627";
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#address-cells = <1>;
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#size-cells = <1>;
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hpt_clock: clock {
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compatible = "fixed-clock";
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#clock-cells = <0>;
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clock-frequency = <200000000>; /* 200 MHz */
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};
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spi_clock: spi-clock {
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compatible = "fixed-clock";
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#clock-cells = <0>;
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clock-frequency = <40000000>; /* 40 MHz */
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};
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cpus {
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#address-cells = <1>;
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#size-cells = <0>;
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cpu@0 {
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device_type = "cpu";
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compatible = "mips,mips1004Kc";
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reg = <0>;
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};
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cpu@1 {
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device_type = "cpu";
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compatible = "mips,mips1004Kc";
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reg = <1>;
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};
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};
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cpuintc: interrupt-controller {
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compatible = "mti,cpu-interrupt-controller";
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interrupt-controller;
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#address-cells = <0>;
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#interrupt-cells = <1>;
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};
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gic: interrupt-controller@1f8c0000 {
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compatible = "mti,gic";
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reg = <0x1f8c0000 0x20000>;
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interrupt-controller;
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#interrupt-cells = <3>;
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interrupt-parent = <&cpuintc>;
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interrupts = <2>;
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};
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pcie_phy0: pcie-phy@1faf2000 {
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compatible = "econet,en7528-pcie-phy1";
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reg = <0x1faf2000 0x1000>;
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#phy-cells = <0>;
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};
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pcie_phy1: pcie-phy@1fac0000 {
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compatible = "econet,en7528-pcie-phy1";
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reg = <0x1fac0000 0x1000>;
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#phy-cells = <0>;
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};
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gpio0: gpio@1fbf0200 {
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compatible = "airoha,en7523-gpio";
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reg = <0x1fbf0204 0x4>,
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<0x1fbf0200 0x4>,
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<0x1fbf0220 0x4>,
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<0x1fbf0214 0x4>;
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gpio-controller;
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#gpio-cells = <2>;
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};
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gpio1: gpio@1fbf0270 {
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compatible = "airoha,en7523-gpio";
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reg = <0x1fbf0270 0x4>,
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<0x1fbf0260 0x4>,
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<0x1fbf0264 0x4>,
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<0x1fbf0278 0x4>;
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gpio-controller;
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#gpio-cells = <2>;
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};
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scu: system-controller@1fb00000 {
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compatible = "airoha,en7523-scu";
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reg = <0x1fa20000 0x400>,
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<0x1fb00000 0x1000>;
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#clock-cells = <1>;
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#reset-cells = <1>;
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};
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timer_hpt: timer@1fbf0400 {
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compatible = "econet,en7528-timer";
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reg = <0x1fbf0400 0x14>,
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<0x1fbe0000 0x14>;
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interrupt-parent = <&gic>;
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interrupts = <GIC_SHARED 30 IRQ_TYPE_LEVEL_HIGH>,
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<GIC_SHARED 29 IRQ_TYPE_LEVEL_HIGH>,
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<GIC_SHARED 37 IRQ_TYPE_LEVEL_HIGH>,
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<GIC_SHARED 36 IRQ_TYPE_LEVEL_HIGH>;
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clocks = <&hpt_clock>;
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};
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spi_ctrl: spi@1fa10000 {
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compatible = "airoha,en7581-snand";
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reg = <0x1fa10000 0x140>,
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<0x1fa11000 0x160>;
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clocks = <&spi_clock>;
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clock-names = "spi";
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#address-cells = <1>;
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#size-cells = <0>;
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nand: nand@0 {
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compatible = "spi-nand";
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reg = <0>;
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spi-max-frequency = <40000000>;
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spi-tx-bus-width = <1>;
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spi-rx-bus-width = <2>;
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};
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};
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uart: serial@1fbf0000 {
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compatible = "airoha,en7523-uart";
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reg = <0x1fbf0000 0x30>;
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reg-io-width = <4>;
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reg-shift = <2>;
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interrupt-parent = <&gic>;
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interrupts = <GIC_SHARED 2 IRQ_TYPE_LEVEL_HIGH>;
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clock-frequency = <7372800>;
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};
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pciecfg: pciecfg@1fb80000 {
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compatible = "mediatek,generic-pciecfg", "syscon";
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reg = <0x1fb80000 0x1000>;
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};
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pcie0: pcie@1fb81000 {
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compatible = "econet,en7528-pcie";
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device_type = "pci";
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reg = <0x1fb81000 0x1000>;
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reg-names = "port0";
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linux,pci-domain = <0>;
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#address-cells = <3>;
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#size-cells = <2>;
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interrupt-parent = <&gic>;
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interrupts = <GIC_SHARED 23 IRQ_TYPE_LEVEL_HIGH>;
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interrupt-names = "pcie_irq";
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clocks = <&scu EN7523_CLK_PCIE>;
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clock-names = "sys_ck0";
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phys = <&pcie_phy0>;
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phy-names = "pcie-phy0";
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bus-range = <0x00 0xff>;
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ranges = <0x01000000 0 0x00000000 0x1f600000 0 0x00010000>,
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<0x82000000 0 0x20000000 0x20000000 0 0x08000000>;
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status = "disabled";
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#interrupt-cells = <1>;
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interrupt-map-mask = <0 0 0 7>;
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interrupt-map = <0 0 0 1 &pcie_intc0 0>,
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<0 0 0 2 &pcie_intc0 1>,
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<0 0 0 3 &pcie_intc0 2>,
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<0 0 0 4 &pcie_intc0 3>;
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pcie_intc0: interrupt-controller {
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interrupt-controller;
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#address-cells = <0>;
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#interrupt-cells = <1>;
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};
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slot0: pcie@0,0 {
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reg = <0x0000 0 0 0 0>;
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#address-cells = <3>;
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#size-cells = <2>;
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ranges;
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};
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};
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pcie1: pcie@1fb83000 {
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compatible = "econet,en7528-pcie";
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device_type = "pci";
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reg = <0x1fb83000 0x1000>;
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reg-names = "port1";
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linux,pci-domain = <1>;
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#address-cells = <3>;
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#size-cells = <2>;
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interrupt-parent = <&gic>;
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interrupts = <GIC_SHARED 24 IRQ_TYPE_LEVEL_HIGH>;
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interrupt-names = "pcie_irq";
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clocks = <&scu EN7523_CLK_PCIE>;
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clock-names = "sys_ck1";
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phys = <&pcie_phy1>;
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phy-names = "pcie-phy1";
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bus-range = <0x00 0xff>;
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ranges = <0x01000000 0 0x00000000 0x1f610000 0 0x00010000>,
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<0x82000000 0 0x28000000 0x28000000 0 0x08000000>;
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status = "disabled";
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#interrupt-cells = <1>;
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interrupt-map-mask = <0 0 0 7>;
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interrupt-map = <0 0 0 1 &pcie_intc1 0>,
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<0 0 0 2 &pcie_intc1 1>,
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<0 0 0 3 &pcie_intc1 2>,
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<0 0 0 4 &pcie_intc1 3>;
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pcie_intc1: interrupt-controller {
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interrupt-controller;
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#address-cells = <0>;
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#interrupt-cells = <1>;
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};
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slot1: pcie@1,0 {
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reg = <0x0800 0 0 0 0>;
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#address-cells = <3>;
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#size-cells = <2>;
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ranges;
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};
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};
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usb: usb@1fb90000 {
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compatible = "mediatek,mt8173-xhci", "mediatek,mtk-xhci";
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reg = <0x1fb90000 0x4000>,
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<0x1fa80700 0x100>;
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reg-names = "mac", "ippc";
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#address-cells = <1>;
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#size-cells = <0>;
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interrupt-parent = <&gic>;
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interrupts = <GIC_SHARED 17 IRQ_TYPE_LEVEL_HIGH>;
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usb3-lpm-capable;
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};
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};
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117
target/linux/econet/dts/en751627_zyxel_ex3301-t0.dts
Normal file
117
target/linux/econet/dts/en751627_zyxel_ex3301-t0.dts
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@ -0,0 +1,117 @@
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// SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
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/dts-v1/;
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#include "en751627.dtsi"
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/ {
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model = "Zyxel EX3301-T0";
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compatible = "zyxel,ex3301-t0", "econet,en751627";
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memory@0 {
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device_type = "memory";
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reg = <0x00000000 0x10000000>;
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};
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chosen {
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stdout-path = "/serial@1fbf0000:115200";
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};
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};
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&nand {
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status = "okay";
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econet,bmt;
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partitions {
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compatible = "fixed-partitions";
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#address-cells = <1>;
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#size-cells = <1>;
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partition@0all {
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label = "all_of_flash";
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reg = <0x0 0x8000000>;
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read-only;
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};
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partition@0 {
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label = "bootloader";
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reg = <0x0 0x40000>;
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read-only;
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};
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partition@40000 {
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label = "romfile";
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reg = <0x40000 0x40000>;
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read-only;
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};
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partition@80000 {
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label = "tclinux";
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reg = <0x80000 0x2800000>;
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read-only;
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econet,enable-remap;
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};
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/* Nested inside of tclinux */
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partition@480000 {
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label = "rootfs";
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reg = <0x480000 0x2400000>;
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linux,rootfs;
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read-only;
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};
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partition@2880000 {
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label = "tclinux_alt";
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reg = <0x2880000 0x2620000>;
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};
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partition@4ea0000 {
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label = "wwan";
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reg = <0x4ea0000 0x100000>;
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};
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partition@4fa0000 {
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label = "factory_data";
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reg = <0x4fa0000 0x400000>;
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};
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partition@53a0000 {
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label = "rom-d";
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reg = <0x53a0000 0x100000>;
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};
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partition@54a0000 {
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label = "misc";
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reg = <0x54a0000 0x2000000>;
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};
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factory: partition@74a0000 {
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label = "factory";
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reg = <0x74a0000 0x80000>;
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};
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partition@7520000 {
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label = "reservearea";
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reg = <0x7520000 0xc0000>;
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};
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};
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};
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&pcie0 {
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status = "okay";
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};
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&slot0 {
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status = "okay";
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wifi@0,0 {
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compatible = "mediatek,mt76";
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reg = <0x0000 0 0 0 0>;
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mediatek,mtd-eeprom = <&factory 0x0000>;
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big-endian;
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};
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};
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&pcie1 {
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status = "okay";
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/* Slot 1 is a second link to the same wifi chip */
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};
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239
target/linux/econet/en751627/config-6.12
Normal file
239
target/linux/econet/en751627/config-6.12
Normal file
@ -0,0 +1,239 @@
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CONFIG_ARCH_32BIT_OFF_T=y
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CONFIG_ARCH_HIBERNATION_POSSIBLE=y
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CONFIG_ARCH_KEEP_MEMBLOCK=y
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CONFIG_ARCH_MMAP_RND_BITS_MAX=15
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CONFIG_ARCH_MMAP_RND_COMPAT_BITS_MAX=15
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CONFIG_ARCH_SUSPEND_POSSIBLE=y
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CONFIG_BLK_MQ_PCI=y
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CONFIG_BOARD_SCACHE=y
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CONFIG_CLKSRC_MMIO=y
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CONFIG_CLONE_BACKWARDS=y
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CONFIG_COMMON_CLK=y
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CONFIG_COMMON_CLK_EN7523=y
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CONFIG_COMPACT_UNEVICTABLE_DEFAULT=1
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CONFIG_COMPAT_32BIT_TIME=y
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CONFIG_CONTEXT_TRACKING=y
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CONFIG_CONTEXT_TRACKING_IDLE=y
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CONFIG_CPU_BIG_ENDIAN=y
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CONFIG_CPU_GENERIC_DUMP_TLB=y
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CONFIG_CPU_HAS_DIEI=y
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CONFIG_CPU_HAS_PREFETCH=y
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CONFIG_CPU_HAS_RIXI=y
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CONFIG_CPU_HAS_SYNC=y
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CONFIG_CPU_MIPS32=y
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# CONFIG_CPU_MIPS32_R1 is not set
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CONFIG_CPU_MIPS32_R2=y
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CONFIG_CPU_MIPSR2=y
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CONFIG_CPU_MIPSR2_IRQ_EI=y
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CONFIG_CPU_MIPSR2_IRQ_VI=y
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CONFIG_CPU_MITIGATIONS=y
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CONFIG_CPU_NEEDS_NO_SMARTMIPS_OR_MICROMIPS=y
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CONFIG_CPU_R4K_CACHE_TLB=y
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CONFIG_CPU_RMAP=y
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CONFIG_CPU_SUPPORTS_32BIT_KERNEL=y
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CONFIG_CPU_SUPPORTS_HIGHMEM=y
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CONFIG_CPU_SUPPORTS_MSA=y
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CONFIG_CRC16=y
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CONFIG_CRYPTO_DEFLATE=y
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CONFIG_CRYPTO_ECB=y
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CONFIG_CRYPTO_HASH_INFO=y
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CONFIG_CRYPTO_LIB_BLAKE2S_GENERIC=y
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CONFIG_CRYPTO_LIB_GF128MUL=y
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CONFIG_CRYPTO_LIB_POLY1305_RSIZE=2
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CONFIG_CRYPTO_LIB_SHA1=y
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CONFIG_CRYPTO_LIB_UTILS=y
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CONFIG_CRYPTO_LZO=y
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CONFIG_CRYPTO_ZSTD=y
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CONFIG_DEBUG_INFO=y
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CONFIG_DEBUG_ZBOOT=y
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CONFIG_DMA_NEED_SYNC=y
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CONFIG_DMA_NONCOHERENT=y
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CONFIG_DTB_ECONET_NONE=y
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CONFIG_DTC=y
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CONFIG_EARLY_PRINTK=y
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CONFIG_EARLY_PRINTK_8250=y
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CONFIG_ECONET=y
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CONFIG_ECONET_EN751221_TIMER=y
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CONFIG_EXCLUSIVE_SYSTEM_RAM=y
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CONFIG_FS_IOMAP=y
|
||||
CONFIG_FUNCTION_ALIGNMENT=0
|
||||
CONFIG_FW_LOADER_PAGED_BUF=y
|
||||
CONFIG_FW_LOADER_SYSFS=y
|
||||
CONFIG_GENERIC_ALLOCATOR=y
|
||||
CONFIG_GENERIC_ATOMIC64=y
|
||||
CONFIG_GENERIC_CLOCKEVENTS=y
|
||||
CONFIG_GENERIC_CMOS_UPDATE=y
|
||||
CONFIG_GENERIC_CPU_AUTOPROBE=y
|
||||
CONFIG_GENERIC_GETTIMEOFDAY=y
|
||||
CONFIG_GENERIC_IDLE_POLL_SETUP=y
|
||||
CONFIG_GENERIC_IOMAP=y
|
||||
CONFIG_GENERIC_IRQ_CHIP=y
|
||||
CONFIG_GENERIC_IRQ_EFFECTIVE_AFF_MASK=y
|
||||
CONFIG_GENERIC_IRQ_SHOW=y
|
||||
CONFIG_GENERIC_LIB_ASHLDI3=y
|
||||
CONFIG_GENERIC_LIB_ASHRDI3=y
|
||||
CONFIG_GENERIC_LIB_CMPDI2=y
|
||||
CONFIG_GENERIC_LIB_LSHRDI3=y
|
||||
CONFIG_GENERIC_LIB_UCMPDI2=y
|
||||
CONFIG_GENERIC_MSI_IRQ=y
|
||||
CONFIG_GENERIC_PCI_IOMAP=y
|
||||
CONFIG_GENERIC_PHY=y
|
||||
CONFIG_GENERIC_SCHED_CLOCK=y
|
||||
CONFIG_GENERIC_SMP_IDLE_THREAD=y
|
||||
CONFIG_GENERIC_TIME_VSYSCALL=y
|
||||
CONFIG_GPIOLIB_IRQCHIP=y
|
||||
CONFIG_GPIO_CDEV=y
|
||||
CONFIG_GPIO_EN7523=y
|
||||
CONFIG_GPIO_GENERIC=y
|
||||
CONFIG_HARDWARE_WATCHPOINTS=y
|
||||
CONFIG_HAS_DMA=y
|
||||
CONFIG_HAS_IOMEM=y
|
||||
CONFIG_HAS_IOPORT=y
|
||||
CONFIG_HAS_IOPORT_MAP=y
|
||||
CONFIG_HZ_PERIODIC=y
|
||||
CONFIG_INITRAMFS_SOURCE=""
|
||||
CONFIG_IRQCHIP=y
|
||||
CONFIG_IRQ_DOMAIN=y
|
||||
CONFIG_IRQ_DOMAIN_HIERARCHY=y
|
||||
CONFIG_IRQ_FORCED_THREADING=y
|
||||
CONFIG_IRQ_MIPS_CPU=y
|
||||
CONFIG_IRQ_WORK=y
|
||||
# CONFIG_JFFS2_FS is not set
|
||||
CONFIG_LEDS_GPIO=y
|
||||
CONFIG_LIBFDT=y
|
||||
CONFIG_LOCK_DEBUGGING_SUPPORT=y
|
||||
CONFIG_LZO_COMPRESS=y
|
||||
CONFIG_LZO_DECOMPRESS=y
|
||||
CONFIG_MFD_SYSCON=y
|
||||
CONFIG_MIGRATION=y
|
||||
CONFIG_MIPS=y
|
||||
CONFIG_MIPS_ASID_BITS=8
|
||||
CONFIG_MIPS_ASID_SHIFT=0
|
||||
CONFIG_MIPS_CM=y
|
||||
# CONFIG_MIPS_CMDLINE_FROM_BOOTLOADER is not set
|
||||
CONFIG_MIPS_CMDLINE_FROM_DTB=y
|
||||
CONFIG_MIPS_CPC=y
|
||||
CONFIG_MIPS_CPS=y
|
||||
# CONFIG_MIPS_CPS_NS16550_BOOL is not set
|
||||
CONFIG_MIPS_CPU_SCACHE=y
|
||||
CONFIG_MIPS_GIC=y
|
||||
CONFIG_MIPS_L1_CACHE_SHIFT=5
|
||||
CONFIG_MIPS_MT=y
|
||||
CONFIG_MIPS_MT_FPAFF=y
|
||||
CONFIG_MIPS_MT_SMP=y
|
||||
# CONFIG_MIPS_NO_APPENDED_DTB is not set
|
||||
CONFIG_MIPS_NR_CPU_NR_MAP=4
|
||||
CONFIG_MIPS_PERF_SHARED_TC_COUNTERS=y
|
||||
CONFIG_MIPS_RAW_APPENDED_DTB=y
|
||||
CONFIG_MIPS_SPRAM=y
|
||||
CONFIG_MMU_LAZY_TLB_REFCOUNT=y
|
||||
CONFIG_MODULES_USE_ELF_REL=y
|
||||
CONFIG_MTD_NAND_CORE=y
|
||||
CONFIG_MTD_NAND_ECC=y
|
||||
CONFIG_MTD_NAND_MTK_BMT=y
|
||||
CONFIG_MTD_SPI_NAND=y
|
||||
CONFIG_MTD_UBI=y
|
||||
CONFIG_MTD_UBI_BEB_LIMIT=13
|
||||
CONFIG_MTD_UBI_BLOCK=y
|
||||
CONFIG_MTD_UBI_WL_THRESHOLD=4096
|
||||
CONFIG_NEED_DMA_MAP_STATE=y
|
||||
CONFIG_NEED_SRCU_NMI_SAFE=y
|
||||
CONFIG_NET_EGRESS=y
|
||||
CONFIG_NET_FLOW_LIMIT=y
|
||||
CONFIG_NET_INGRESS=y
|
||||
CONFIG_NET_XGRESS=y
|
||||
CONFIG_NLS=y
|
||||
CONFIG_NR_CPUS=4
|
||||
CONFIG_NVMEM=y
|
||||
CONFIG_NVMEM_LAYOUTS=y
|
||||
CONFIG_NVMEM_SYSFS=y
|
||||
CONFIG_OF=y
|
||||
CONFIG_OF_ADDRESS=y
|
||||
CONFIG_OF_EARLY_FLATTREE=y
|
||||
CONFIG_OF_FLATTREE=y
|
||||
CONFIG_OF_GPIO=y
|
||||
CONFIG_OF_IRQ=y
|
||||
CONFIG_OF_KOBJ=y
|
||||
CONFIG_PADATA=y
|
||||
CONFIG_PAGE_POOL=y
|
||||
CONFIG_PAGE_SIZE_LESS_THAN_256KB=y
|
||||
CONFIG_PAGE_SIZE_LESS_THAN_64KB=y
|
||||
CONFIG_PCI=y
|
||||
CONFIG_PCIE_MEDIATEK=y
|
||||
CONFIG_PCI_DOMAINS=y
|
||||
CONFIG_PCI_DOMAINS_GENERIC=y
|
||||
CONFIG_PCI_DRIVERS_GENERIC=y
|
||||
CONFIG_PCI_MSI=y
|
||||
CONFIG_PCI_MSI_ARCH_FALLBACKS=y
|
||||
CONFIG_PERF_USE_VMALLOC=y
|
||||
CONFIG_PGTABLE_LEVELS=2
|
||||
CONFIG_PHY_EN7528_PCIE=y
|
||||
CONFIG_PTP_1588_CLOCK_OPTIONAL=y
|
||||
CONFIG_QUEUED_RWLOCKS=y
|
||||
CONFIG_QUEUED_SPINLOCKS=y
|
||||
CONFIG_RANDSTRUCT_NONE=y
|
||||
CONFIG_RATIONAL=y
|
||||
CONFIG_REGMAP=y
|
||||
CONFIG_REGMAP_MMIO=y
|
||||
CONFIG_RESET_CONTROLLER=y
|
||||
CONFIG_RFS_ACCEL=y
|
||||
CONFIG_RPS=y
|
||||
# CONFIG_SCHED_CORE is not set
|
||||
CONFIG_SCHED_SMT=y
|
||||
CONFIG_SERIAL_8250_AIROHA=y
|
||||
CONFIG_SERIAL_MCTRL_GPIO=y
|
||||
CONFIG_SERIAL_OF_PLATFORM=y
|
||||
CONFIG_SGL_ALLOC=y
|
||||
CONFIG_SMP=y
|
||||
CONFIG_SMP_UP=y
|
||||
CONFIG_SOCK_RX_QUEUE_MAPPING=y
|
||||
# CONFIG_SOC_ECONET_EN751221 is not set
|
||||
CONFIG_SOC_ECONET_EN7528=y
|
||||
CONFIG_SPI=y
|
||||
# CONFIG_SPI_AIROHA_EN7523 is not set
|
||||
CONFIG_SPI_AIROHA_SNFI=y
|
||||
CONFIG_SPI_MASTER=y
|
||||
CONFIG_SPI_MEM=y
|
||||
CONFIG_SPLIT_PTE_PTLOCKS=y
|
||||
CONFIG_SYNC_R4K=y
|
||||
CONFIG_SYSCTL_EXCEPTION_TRACE=y
|
||||
CONFIG_SYS_HAS_CPU_MIPS32_R1=y
|
||||
CONFIG_SYS_HAS_CPU_MIPS32_R2=y
|
||||
CONFIG_SYS_HAS_EARLY_PRINTK=y
|
||||
CONFIG_SYS_SUPPORTS_32BIT_KERNEL=y
|
||||
CONFIG_SYS_SUPPORTS_ARBIT_HZ=y
|
||||
CONFIG_SYS_SUPPORTS_BIG_ENDIAN=y
|
||||
CONFIG_SYS_SUPPORTS_HIGHMEM=y
|
||||
CONFIG_SYS_SUPPORTS_HOTPLUG_CPU=y
|
||||
CONFIG_SYS_SUPPORTS_LITTLE_ENDIAN=y
|
||||
CONFIG_SYS_SUPPORTS_MIPS16=y
|
||||
CONFIG_SYS_SUPPORTS_MIPS_CPS=y
|
||||
CONFIG_SYS_SUPPORTS_MULTITHREADING=y
|
||||
CONFIG_SYS_SUPPORTS_SCHED_SMT=y
|
||||
CONFIG_SYS_SUPPORTS_SMP=y
|
||||
CONFIG_SYS_SUPPORTS_ZBOOT=y
|
||||
CONFIG_SYS_SUPPORTS_ZBOOT_UART16550=y
|
||||
CONFIG_TARGET_ISA_REV=2
|
||||
CONFIG_TICK_CPU_ACCOUNTING=y
|
||||
CONFIG_TIMER_OF=y
|
||||
CONFIG_TIMER_PROBE=y
|
||||
CONFIG_TREE_RCU=y
|
||||
CONFIG_TREE_SRCU=y
|
||||
CONFIG_UBIFS_FS=y
|
||||
CONFIG_USB=y
|
||||
CONFIG_USB_COMMON=y
|
||||
CONFIG_USB_SUPPORT=y
|
||||
CONFIG_USB_XHCI_HCD=y
|
||||
CONFIG_USB_XHCI_MTK=y
|
||||
# CONFIG_USB_XHCI_PLATFORM is not set
|
||||
CONFIG_USE_GENERIC_EARLY_PRINTK_8250=y
|
||||
CONFIG_USE_OF=y
|
||||
CONFIG_WEAK_ORDERING=y
|
||||
CONFIG_XPS=y
|
||||
CONFIG_XXHASH=y
|
||||
CONFIG_ZBOOT_LOAD_ADDRESS=0x80020000
|
||||
CONFIG_ZLIB_DEFLATE=y
|
||||
CONFIG_ZLIB_INFLATE=y
|
||||
CONFIG_ZSTD_COMMON=y
|
||||
CONFIG_ZSTD_COMPRESS=y
|
||||
CONFIG_ZSTD_DECOMPRESS=y
|
||||
12
target/linux/econet/en751627/profiles/00-default.mk
Normal file
12
target/linux/econet/en751627/profiles/00-default.mk
Normal file
@ -0,0 +1,12 @@
|
||||
# SPDX-License-Identifier: GPL-2.0-only
|
||||
#
|
||||
# Copyright (C) 2025 OpenWrt.org
|
||||
|
||||
define Profile/Default
|
||||
NAME:=Default Profile
|
||||
endef
|
||||
|
||||
define Profile/Default/Description
|
||||
Default package set compatible with most EN7516 and EN7527 boards.
|
||||
endef
|
||||
$(eval $(call Profile,Default))
|
||||
13
target/linux/econet/en751627/target.mk
Normal file
13
target/linux/econet/en751627/target.mk
Normal file
@ -0,0 +1,13 @@
|
||||
# SPDX-License-Identifier: GPL-2.0-only
|
||||
|
||||
ARCH:=mips
|
||||
SUBTARGET:=en751627
|
||||
BOARDNAME:=EN7516 and EN7527 based boards
|
||||
CPU_TYPE:=24kc
|
||||
KERNELNAME:=vmlinuz.bin
|
||||
|
||||
DEFAULT_PACKAGES += kmod-leds-gpio kmod-gpio-button-hotplug wpad-basic-mbedtls
|
||||
|
||||
define Target/Description
|
||||
Build firmware images for EcoNet EN7516 and EN7527 based boards.
|
||||
endef
|
||||
11
target/linux/econet/image/en751627.mk
Normal file
11
target/linux/econet/image/en751627.mk
Normal file
@ -0,0 +1,11 @@
|
||||
TRX_ENDIAN := be
|
||||
|
||||
define Device/zyxel_ex3301-t0
|
||||
DEVICE_VENDOR := Zyxel
|
||||
DEVICE_MODEL := EX3301-T0
|
||||
DEVICE_DTS := en751627_zyxel_ex3301-t0
|
||||
IMAGES := tclinux.trx
|
||||
IMAGE/tclinux.trx := append-kernel | lzma | tclinux-trx
|
||||
DEVICE_PACKAGES := kmod-usb3 kmod-mt7915e kmod-mt7915-firmware
|
||||
endef
|
||||
TARGET_DEVICES += zyxel_ex3301-t0
|
||||
Loading…
Reference in New Issue
Block a user