Add support for TP-Link Festa F65, an AX3000 ceiling mount WiFi 6 AP. Hardware -------- SOC : MediaTek MT7981B 2x A53 RAM : ESMT M15T4G16256A 512MiB Flash : ESMT F50L1G41LB 128 MiB ETH : 1x 1GbE WiFi : MT7976 Buttons : Reset Leds : Blue status led on top Power : DC 12V 1.2A / PoE Installation ------------ 1. Disassemble the device 2. Solder UART to pins VGRT right of the ethernet port 3. Connect UART console (3.3V) 4. Press Ctrl+b to stop in u-boot shell 5. Use `mtkload` to boot `openwrt-initramfs-kernel.bin` via tftp 6. Flash `openwrt-squashfs-sysupgrade.bin` via sysupgrade Revert to OEM firmware ---------------------- 1. Hold reset button while plugging in power 2. Configure host ethernet to 192.168.0.1/24 3. Go to http://192.168.0.254 4. Upload OEM firmware MAC Addresses ------------- LAN : DC:62:79:xx:xx:28 (printed on label) 2.4GHz: DC:62:79:xx:xx:28 5GHz : DC:62:79:xx:xx:29 Signed-off-by: Leonard Anderweit <leonard.anderweit@gmail.com> Link: https://github.com/openwrt/openwrt/pull/22138 Signed-off-by: Hauke Mehrtens <hauke@hauke-m.de>
196 lines
3.2 KiB
Plaintext
196 lines
3.2 KiB
Plaintext
// SPDX-License-Identifier: GPL-2.0-only OR MIT
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/dts-v1/;
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#include <dt-bindings/gpio/gpio.h>
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#include <dt-bindings/input/input.h>
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#include <dt-bindings/leds/common.h>
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#include <dt-bindings/pinctrl/mt65xx.h>
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#include "mt7981b.dtsi"
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/ {
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compatible = "tplink,f65-v1", "mediatek,mt7981";
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model = "TP-Link F65 v1";
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aliases {
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serial0 = &uart0;
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led-boot = &led_status;
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led-failsafe = &led_status;
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led-running = &led_status;
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led-upgrade = &led_status;
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};
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chosen {
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bootargs-append = " ubi.mtd=ubi root=/dev/ubiblock0_1";
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stdout-path = "serial0:115200n8";
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};
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memory@40000000 {
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reg = <0 0x40000000 0 0x20000000>;
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device_type = "memory";
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};
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gpio-keys {
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compatible = "gpio-keys";
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reset {
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label = "reset";
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linux,code = <KEY_RESTART>;
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gpios = <&pio 1 GPIO_ACTIVE_LOW>;
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};
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};
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leds {
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compatible = "gpio-leds";
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led_status: led_status {
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function = LED_FUNCTION_STATUS;
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color = <LED_COLOR_ID_BLUE>;
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gpios = <&pio 35 GPIO_ACTIVE_HIGH>;
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};
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};
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};
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&uart0 {
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status = "okay";
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};
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&watchdog {
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status = "okay";
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};
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&spi0 {
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pinctrl-names = "default";
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pinctrl-0 = <&spi0_flash_pins>;
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status = "okay";
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spi_nand@0 {
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compatible = "spi-nand";
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reg = <0>;
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spi-max-frequency = <52000000>;
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spi-tx-buswidth = <4>;
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spi-rx-buswidth = <4>;
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mediatek,nmbm;
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mediatek,bmt-max-ratio = <1>;
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mediatek,bmt-max-reserved-blocks = <64>;
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partitions {
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compatible = "fixed-partitions";
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#address-cells = <1>;
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#size-cells = <1>;
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partition@0 {
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label = "bl2";
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reg = <0x00000 0x100000>;
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read-only;
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};
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partition@100000 {
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label = "boot-config";
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reg = <0x100000 0x100000>;
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read-only;
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};
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partition@200000 {
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label = "boot-config1";
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reg = <0x200000 0x100000>;
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read-only;
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};
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partition@300000 {
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compatible = "u-boot,env";
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label = "u-boot-env";
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reg = <0x300000 0x100000>;
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};
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partition@400000 {
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label = "fip0";
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reg = <0x400000 0x200000>;
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read-only;
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};
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partition@600000 {
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label = "fip1";
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reg = <0x600000 0x200000>;
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read-only;
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};
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partition@800000 {
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label = "oops";
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reg = <0x800000 0x100000>;
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read-only;
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};
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partition@900000 {
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label = "ubi";
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reg = <0x900000 0x2680000>;
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};
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partition@2F80000 {
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label = "ubi_1";
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reg = <0x2F80000 0x2680000>;
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read-only;
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};
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partition@5600000 {
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label = "factory";
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reg = <0x5600000 0x800000>;
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read-only;
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};
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partition@5E00000 {
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label = "runtime_data";
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reg = <0x5E00000 0xC00000>;
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read-only;
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};
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partition@6A00000 {
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label = "backup_data";
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reg = <0x6A00000 0x800000>;
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read-only;
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};
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partition@7200000 {
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label = "runtime_backup";
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reg = <0x7200000 0x800000>;
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read-only;
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};
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};
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};
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};
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&pio {
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spi0_flash_pins: spi0-pins {
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mux {
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function = "spi";
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groups = "spi0", "spi0_wp_hold";
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};
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conf-pu {
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pins = "SPI0_CS", "SPI0_HOLD", "SPI0_WP";
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drive-strength = <MTK_DRIVE_8mA>;
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};
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conf-pd {
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pins = "SPI0_CLK", "SPI0_MOSI", "SPI0_MISO";
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drive-strength = <MTK_DRIVE_8mA>;
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};
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};
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};
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ð {
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status = "okay";
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gmac1: mac@1 {
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compatible = "mediatek,eth-mac";
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reg = <1>;
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phy-mode = "gmii";
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phy-handle = <&int_gbe_phy>;
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};
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};
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&wifi {
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status = "okay";
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};
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