The Rollball command byte needs to be written last. Otherwise the
controller might access the wrong register or write the wrong value.
Fixes: 1fc19bc06e ("realtek: rtl93xx: mdio-smbus support for clause 45 and Rollball SFPs")
Signed-off-by: Jan Hoffmann <jan@3e8.eu>
Link: https://github.com/openwrt/openwrt/pull/23049
Signed-off-by: Hauke Mehrtens <hauke@hauke-m.de>
At least the XikeStor SKT-2.5G-100M SFP module seems to internally use
MDIO address 0 to access the PHY. This module allows accessing PHY
registers using Rollball protocol on address 0x51, and also provides
read-only C22 access on address 0x56. However, after disabling the
PHYAD0 configuration bit, only 0xffff can be read via both methods
(except for MMD device 30 which can still be accessed).
Since having MDIO address 0 enabled shouldn't do any harm on SFP modules
just leave the configuration bit alone in that case.
Signed-off-by: Jan Hoffmann <jan@3e8.eu>
Link: https://github.com/openwrt/openwrt/pull/23065
Signed-off-by: Hauke Mehrtens <hauke@hauke-m.de>
The defines should have been named SMI like everywhere else.
Signed-off-by: Markus Stockhausen <markus.stockhausen@gmx.de>
Link: https://github.com/openwrt/openwrt/pull/23070
Signed-off-by: Hauke Mehrtens <hauke@hauke-m.de>
This commit adds support for Hasivo S600WP-5GT-2SX-SE switch.
Device specification
--------------------
SoC Type: Realtek RTL9303
RAM: 128MB DDR3 SDRAM
Flash: Fudan FM25Q128A (16 MB)
Ethernet: 5x RTL8221B 10/100/1000/2500Mbps PHY (RJ45)
2x SFP+ 10G (I2C/DOM via bit-banged GPIO)
LEDs: 1x power green (no control)
1x system green (via RTL9303 GPIO)
3x RJ45 LEDs/port (HC595 shift regs on LED SPI)
1x Green (1G link)
1x Green (10M/100M link)
1x Orange (2.5G link)
2x SFP+ LEDs/port (HC595 shift regs on LED SPI)
1x 10G link
1x 1G link
Button: Reset
USB ports: None
Bootloader: Realtek U-Boot 2011.12
PoE: 1x HS104PTI for 802.3af/at/bt PoE (driver
will follow in a separate patch)
Installing OpenWrt
------------------
1. UART RJ45 requires soldering a connector to the empty footprint (RJ1).
(Amphenol RJHSEE380 or similar)
2. Connect to UART 38400@8n1, using Cisco Console Rollover cable (RS232)
3. Enter bootloader by pressing esc key during boot
4. Enter password `Hs2021cfgmg`
5. Type `XXXX` to get into U-Boot
6. Increase baudrate: `setenv baudrate 115200`
7. Use serial transfer (Y modem) via minicom:
`loady 0x84f00000`
Then send the initramfs image via minicom's Y modem upload.
8. `bootm 0x84f00000`
Now you should be in OpenWrt, and can use sysupgrade to install.
Signed-off-by: Carlo Szelinsky <github@szelinsky.de>
Link: https://github.com/openwrt/openwrt/pull/22310
Signed-off-by: Robert Marko <robimarko@gmail.com>
With the recent backport of the common PHY properties infrastructure
(phy-common-props and the phy_get_manual_{rx,tx}_polarity() helpers) to
OpenWrt, the generic `{rx,tx}-polarity` device tree properties are now
usable for the Realtek PCS driver. Switch the driver and all affected
boards from the local vendor-specific `realtek,pnswap-{rx,tx}` booleans
to the common properties.
Add a `config_polarity` SerDes op (implemented by RTL930x and RTL931x;
RTL838x/RTL839x polarity support not yet added) and a generic wrapper
that resolves the requested polarity via phy_get_manual_{rx,tx}_polarity()
and dispatches to the op. Variants without the op silently accept the
default polarity but warn when a non-default polarity is requested,
since that cannot be honored.
Move the polarity programming out of the variant setup_serdes callbacks
into rtpcs_pcs_config, so it runs before setup_serdes. This matches the
ordering used by the vendor SDK, which configures polarity first.
Update all board DTS files that previously used `realtek,pnswap-{rx,tx}`
to the new `{rx,tx}-polarity = <PHY_POL_INVERT>` property, and select
PHY_COMMON_PROPS from Kconfig.
Each SerDes now retains its DT node for later polarity lookup. Use
for_each_child_of_node_scoped for the iterator, and register a
devm_add_action_or_reset for each stored reference so it is released on
unbind or probe failure.
Signed-off-by: Jonas Jelonek <jelonek.jonas@gmail.com>
Link: https://github.com/openwrt/openwrt/pull/23044
Signed-off-by: Robert Marko <robimarko@gmail.com>
The hardware usually takes care that
- a packet is no larger than the available buffer
- has at least a FCS checksum of 4 bytes
Nevertheless be cautious and improve the existing
packet check. Just in case ...
Signed-off-by: Markus Stockhausen <markus.stockhausen@gmx.de>
Link: https://github.com/openwrt/openwrt/pull/22884
Signed-off-by: Robert Marko <robimarko@gmail.com>
Some occurrences of regmap_update_bits can be simplified by
using other regmap commands. Use set_bits/clear_bits/assign_bits
for better readability.
Signed-off-by: Markus Stockhausen <markus.stockhausen@gmx.de>
Link: https://github.com/openwrt/openwrt/pull/23039
Signed-off-by: Robert Marko <robimarko@gmail.com>
All consumers of legacy table commands have been refactored and
use the rtl_table helpers. Drop unused code.
rtl839x_exec_tbl2_cmd() cannot be dropped as it is still used
in the qos code. Keep it for now.
Signed-off-by: Markus Stockhausen <markus.stockhausen@gmx.de>
Link: https://github.com/openwrt/openwrt/pull/23037
Signed-off-by: Robert Marko <robimarko@gmail.com>
rtldsa_931x_stp_get() and rtl931x_stp_set() use legacy table code.
Replace that with rtl_table_xxx() helpers.
Signed-off-by: Markus Stockhausen <markus.stockhausen@gmx.de>
Link: https://github.com/openwrt/openwrt/pull/23037
Signed-off-by: Robert Marko <robimarko@gmail.com>
rtldsa_930x_stp_get() and rtl930x_stp_set() use legacy table code.
Replace that with rtl_table_xxx() helpers.
Signed-off-by: Markus Stockhausen <markus.stockhausen@gmx.de>
Link: https://github.com/openwrt/openwrt/pull/23037
Signed-off-by: Robert Marko <robimarko@gmail.com>
rtldsa_839x_stp_get() and rtl839x_stp_set() use legacy table code.
Replace that with rtl_table_xxx() helpers.
Signed-off-by: Markus Stockhausen <markus.stockhausen@gmx.de>
Link: https://github.com/openwrt/openwrt/pull/23037
Signed-off-by: Robert Marko <robimarko@gmail.com>
rtldsa_838x_stp_get() and rtl838x_stp_set() use legacy table code.
Replace that with rtl_table_xxx() helpers.
Signed-off-by: Markus Stockhausen <markus.stockhausen@gmx.de>
Link: https://github.com/openwrt/openwrt/pull/23037
Signed-off-by: Robert Marko <robimarko@gmail.com>
Use regmap in the four target specific hw_init() functions.
Signed-off-by: Markus Stockhausen <markus.stockhausen@gmx.de>
Link: https://github.com/openwrt/openwrt/pull/23038
Signed-off-by: Robert Marko <robimarko@gmail.com>
Another cleanup of legacy sw() code.
Signed-off-by: Markus Stockhausen <markus.stockhausen@gmx.de>
Link: https://github.com/openwrt/openwrt/pull/23038
Signed-off-by: Robert Marko <robimarko@gmail.com>
Another two functions that are cleaned from the legacy sw() macros.
Signed-off-by: Markus Stockhausen <markus.stockhausen@gmx.de>
Link: https://github.com/openwrt/openwrt/pull/23038
Signed-off-by: Robert Marko <robimarko@gmail.com>
The EXTERNAL_SFP_PHY macro is very strange. It has attributes
sfp and media but is not linked to any SFP definition. There
is nothing that the kernel can evaluate better than the classic
PHY_C22 macro.
Remark! For the current D-Link DGS-1210 consumers this macro
should be converted to a PHY_C22_SFP in the future. As of now
there is no hardware to identify the proper gpios and define
and verify the corresponding SFP ports. Add a TODO comment
where needed.
Signed-off-by: Markus Stockhausen <markus.stockhausen@gmx.de>
Link: https://github.com/openwrt/openwrt/pull/23036
Signed-off-by: Robert Marko <robimarko@gmail.com>
Several EXTERNAL macros have been removed in the past. There is
no need to distinguish if a phy is built into the SoC or is
attached externally.
Do the same for EXTERNAL_SFP_PHY_FULL. This macro denotes a phy
that has a SFP port attached to it. This is usually RTL8214FC
based. To be consistent with other macros name it PHY_C22_SFP.
While we are here make use of the new port/phy notation.
So PHY_C22_SFP(p, n, s) gives
- p: the overall port number
- n: the phy address on the current bus
- s: the sfp identifier
Signed-off-by: Markus Stockhausen <markus.stockhausen@gmx.de>
Link: https://github.com/openwrt/openwrt/pull/23036
Signed-off-by: Robert Marko <robimarko@gmail.com>
Import pending series introducing support for standalone PCS drivers.
This has previously already been used by the airoha target, and is
also the base for the closer-to-upstream patches for MediaTek MT7988
10G SerDes support.
In order to not having to diverge from upstream also backport series
for standardized handling for PHY and PCS SerDes pair polarity.
Signed-off-by: Daniel Golle <daniel@makrotopia.org>
Refactor rteth_hw_ring_setup() and rteth_839x_hw_en_rxtx().
Signed-off-by: Markus Stockhausen <markus.stockhausen@gmx.de>
Link: https://github.com/openwrt/openwrt/pull/23006
Signed-off-by: Robert Marko <robimarko@gmail.com>
Refactor rteth_setup_cpu_rx_rings() and rteth_838x_hw_en_rxtx().
Signed-off-by: Markus Stockhausen <markus.stockhausen@gmx.de>
Link: https://github.com/openwrt/openwrt/pull/23006
Signed-off-by: Robert Marko <robimarko@gmail.com>
Add support for RTL9313-based Zyxel XS1930-12HP, a 12-port Multi-Gig
switch with 10x 100M/1G/2.5G/5G/10G RJ45 and 2x 1G/10G SFP+ ports.
Hardware
========
- RTL9313 SoC
- 256MiB DDR3 RAM (Winbond W632GU6MB)
- 32MiB SPI-NOR Flash (Macronix MX25L25645G)
- 8x 100M/1G/2.5G/5G/10G RJ45 (Aquantia AQR813)
- 2x 100M/1G/2.5G/5G/10G RJ45 (2x Aquantia AQR113C)
- 2x 1G/10G SFP+
- PoE:
- Ports 1-8 with PoE++/802.3bt
- 2x RTL8239 + GigaDevice FD32F103 MCU
- RTL8231 for port LEDs
- LM96000 I2C hardware monitor
- 3-pin fans
- Front LEDs: PWR, SYS, CLOUD, LOCATOR, POE USAGE
- Console: TTL 3.3V, 115200 8N1
- Software chain:
- Bootbase/stripped-down U-Boot
- BootExt
- RAS/ZyNOS
Console
=======
The console port is a 4-pin header reachable without opening case.
Looking at the front port-side of the device, turn the device 90 degrees
clockwise. On this side, there's a rectangular opening in the honeycomb
structure. Pinout is (from left/front to right/back): GND RX TX VCC
Hardware quirks
===============
* The SFP signals RX_LOS, MOD_ABS and TX_FAULT do not have dedicated GPIO
lines each. Instead, there's a multiplexer (using GPIO12 and GPIO14)
which - depending on its state - connect this single GPIO line to RX_LOS,
MOD_ABS or TX_FAULT (GPIO19 for SFP1, GPIO27 for SFP2). This requires
a special adapter driver (which is backed by a gpio-mux) that makes
this hardware design and Linux' SFP core work together.
* SFP slots are disabled by default. GPIO6 and GPIO7 seems to be gates
for SFP1 and SFP2 respectively. The need to be pulled low to make SFP
modules work (i.e. respond to I2C requests and pass GPIO signals).
* Fan can only be set to SLOW or FAST mode, no real speed/PWM control.
Disclaimer
==========
PoE not yet supported.
Flashing OpenWrt will overwrite BootExtension + ZyNOS. BootExtension
functionality (e.g. initramfs boot as mentioned below) is not available
anymore then. The U-boot/Bootbase still has some limited functionality
which can be used in emergency cases.
Installation
============
Simple web upgrade:
1. Take the OpenWrt factory.bin image generated by the build.
2. In the ZyNOS web UI, login and go to Maintenance -> Firmware Upgrade.
3. Under "Boot Image", make sure the Config Boot Image is set to 1. In
other words, make sure the switch booted from firmware image 1 or it
will do so on next reboot.
This is crucial, otherwise OpenWrt cannot boot.
4. Below, select and upload the factory.bin image. After clicking
upgrade, the image will be flashed.
5. After flashing has finished, reboot the switch. It will now boot into
OpenWrt.
Initramfs boot
==============
NOTE: You need to use Xmodem transfer, the bootloader doesn't support
Ymodem nor any networking.
This only works as long as the default ZyNOS firmware is
installed.
1. Connect to the switch using serial and interrupt the boot process
to enter debug/recovery mode.
2. You need to unlock the bootloader. Use known methods [1] and [2] to
obtain the unlock code and unlock the bootloader with:
> ATEN 1,<unlock_code>
3. Upload the initramfs image using Xmodem:
> ATUP <address>,<file_length>
<address>: you may use any RAM address >= 0x80300000
<file_length>: length of image in bytes
4. After the transfer has finished, boot the image with:
> ATGO <address>
5. Wait for OpenWrt to boot. At this stage, it might be wise to create a
backup/dump of the Flash partitions.
Return to stock firmware
========================
1. Download the firmware for the switch from Zyxel website.
2. Unzip the download, there should be a .bin file with a alphanumeric
name.
3. Upload this file to running OpenWrt.
4. Run (use -F since the image doesn't have image metadata):
> sysupgrade -F <stock-firmware>.bin
5. Wait for the sysupgrade to succeed and the switch reboot. At the next
boot, ZyNOS should come up again.
Recovery
========
The Bootbase loader is actually a modified U-Boot variant. You can enter
it by spamming $ during the DRAM test.
The U-Boot shell can be unlocked with [1] and [2]. Note that the command
is slightly different, using a space instead of a comma, and lowercase:
> aten 1 <unlock_code>
You should now have more-or-less a standard RTK-U-boot shell from where
you can upload and write a new image to flash. Use e.g.:
> upgradeY image2 81000000 115200
Wait for the upgrade process to finish and reboot the switch.
===
[1] https://akao.co.uk/tools/zyxel_unlocker/
[2] https://www.ixo.de/info/zyxel_uclinux/
Signed-off-by: Jonas Jelonek <jelonek.jonas@gmail.com>
Link: https://github.com/openwrt/openwrt/pull/22909
Signed-off-by: Robert Marko <robimarko@gmail.com>
Add support for RTL9313-based Zyxel XS1930-12F, a 12-port Multi-Gig
switch with 8x 1G/10G SFP+ ports and 2x 100M/1G/2.5G/5G/10G RJ45.
Hardware
========
- RTL9313 SoC
- 256MiB DDR3 RAM (Nanya NT5CC128M16JR-EK)
- 32MiB SPI-NOR Flash (Macronix MX25L25645G)
- 10x 1G/10G SFP+
- 2x 100M/1G/2.5G/5G/10G RJ45 (2x Aquantia AQR113C)
- 2x RTL8231 for GPIO expansion + port LEDs
- TI PM555 GPIO expander
- LM96000 I2C hardware monitor
- 3-pin fan
- Front LEDs: PWR, SYS, CLOUD, LOCATOR
- Console: TTL 3.3V, 115200 8N1
- Software chain:
- Bootbase/stripped-down U-Boot
- BootExt
- RAS/ZyNOS
Console
=======
The console port is a 4-pin header reachable without opening case.
Looking at the front port-side of the device, turn the device 90 degrees
clockwise. On this side, there's a rectangular opening in the honeycomb
structure. Pinout is (from left/front to right/back): GND RX TX VCC
Hardware quirks
===============
* SFP slots are disabled by default. Several GPIO lines on the PM555
GPIO expander need to be pulled low to activate SFPs, one for each SFP
slot. Otherwise modules cannot respond to I2C requests and GPIO signals
do not reach the SoC.
* Fan can only be set to SLOW or FAST mode, no real speed/PWM control.
Disclaimer
==========
Flashing OpenWrt will overwrite BootExtension + ZyNOS. BootExtension
functionality (e.g. initramfs boot as mentioned below) is not available
anymore then. The U-boot/Bootbase still has some limited functionality
which can be used in emergency cases.
Installation
============
Simple web upgrade:
1. Take the OpenWrt factory.bin image generated by the build.
2. In the ZyNOS web UI, login and go to Maintenance -> Firmware Upgrade.
3. Under "Boot Image", make sure the Config Boot Image is set to 1. In
other words, make sure the switch booted from firmware image 1 or it
will do so on next reboot.
This is crucial, otherwise OpenWrt cannot boot.
4. Below, select and upload the factory.bin image. After clicking
upgrade, the image will be flashed.
5. After flashing has finished, reboot the switch. It will now boot into
OpenWrt.
Initramfs boot
==============
NOTE: You need to use Xmodem transfer, the bootloader doesn't support
Ymodem nor any networking.
This only works as long as the default ZyNOS firmware is
installed.
1. Connect to the switch using serial and interrupt the boot process
to enter debug/recovery mode.
2. You need to unlock the bootloader. Use known methods [1] and [2] to
obtain the unlock code and unlock the bootloader with:
> ATEN 1,<unlock_code>
3. Upload the initramfs image using Xmodem:
> ATUP <address>,<file_length>
<address>: you may use any RAM address >= 0x80300000
<file_length>: length of image in bytes
4. After the transfer has finished, boot the image with:
> ATGO <address>
5. Wait for OpenWrt to boot. At this stage, it might be wise to create a
backup/dump of the Flash partitions.
Return to stock firmware
========================
1. Download the firmware for the switch from Zyxel website.
2. Unzip the download, there should be a .bin file with a alphanumeric
name.
3. Upload this file to running OpenWrt.
4. Run (use -F since the image doesn't have image metadata):
> sysupgrade -F <stock-firmware>.bin
5. Wait for the sysupgrade to succeed and the switch reboot. At the next
boot, ZyNOS should come up again.
Recovery
========
The Bootbase loader is actually a modified U-Boot variant. You can enter
it by spamming $ during the DRAM test.
The U-Boot shell can be unlocked with [1] and [2]. Note that the command
is slightly different, using a space instead of a comma, and lowercase:
> aten 1 <unlock_code>
You should now have more-or-less a standard RTK-U-boot shell from where
you can upload and write a new image to flash. Use e.g.:
> upgradeY image2 81000000 115200
Wait for the upgrade process to finish and reboot the switch.
===
[1] https://akao.co.uk/tools/zyxel_unlocker/
[2] https://www.ixo.de/info/zyxel_uclinux/
Signed-off-by: Jonas Jelonek <jelonek.jonas@gmail.com>
Link: https://github.com/openwrt/openwrt/pull/22909
Signed-off-by: Robert Marko <robimarko@gmail.com>
Add support for RTL9313-based Zyxel XS1930-10, a 10-port Multi-Gig
switch with 8x 100M/1G/2.5G/5G/10G RJ45 and 2x 1G/10G SFP+ ports.
Hardware
========
- RTL9313 SoC
- 256MiB DDR3 RAM (Winbond W632GU6MB)
- 32MiB SPI-NOR Flash (Macronix MX25L25645G)
- 8x 100M/1G/2.5G/5G/10G RJ45 (Aquantia AQR813)
- 2x 1G/10G SFP+
- RTL8231 for port LEDs
- LM96000 I2C hardware monitor
- 3-pin fan
- Front LEDs: PWR, SYS, CLOUD, LOCATOR
- Console: TTL 3.3V, 115200 8N1
- Software chain:
- Bootbase/stripped-down U-Boot
- BootExt
- RAS/ZyNOS
Console
=======
The console port is a 4-pin header reachable without opening case.
Looking at the front port-side of the device, turn the device 90 degrees
clockwise. On this side, there's a rectangular opening in the honeycomb
structure. Pinout is (from left/front to right/back): GND RX TX VCC
Hardware quirks
===============
* The SFP signals RX_LOS, MOD_ABS and TX_FAULT do not have dedicated GPIO
lines each. Instead, there's a multiplexer (using GPIO12 and GPIO14)
which - depending on its state - connect this single GPIO line to RX_LOS,
MOD_ABS or TX_FAULT (GPIO19 for SFP1, GPIO27 for SFP2). This requires
a special adapter driver (which is backed by a gpio-mux) that makes
this hardware design and Linux' SFP core work together.
* SFP slots are disabled by default. GPIO6 and GPIO7 seems to be gates
for SFP1 and SFP2 respectively. The need to be pulled low to make SFP
modules work (i.e. respond to I2C requests and pass GPIO signals).
* Fan can only be set to SLOW or FAST mode, no real speed/PWM control.
Disclaimer
==========
Flashing OpenWrt will overwrite BootExtension + ZyNOS. BootExtension
functionality (e.g. initramfs boot as mentioned below) is not available
anymore then. The U-boot/Bootbase still has some limited functionality
which can be used in emergency cases.
Installation
============
Simple web upgrade:
1. Take the OpenWrt factory.bin image generated by the build.
2. In the ZyNOS web UI, login and go to Maintenance -> Firmware Upgrade.
3. Under "Boot Image", make sure the Config Boot Image is set to 1. In
other words, make sure the switch booted from firmware image 1 or it
will do so on next reboot.
This is crucial, otherwise OpenWrt cannot boot.
4. Below, select and upload the factory.bin image. After clicking
upgrade, the image will be flashed.
5. After flashing has finished, reboot the switch. It will now boot into
OpenWrt.
Initramfs boot
==============
NOTE: You need to use Xmodem transfer, the bootloader doesn't support
Ymodem nor any networking.
This only works as long as the default ZyNOS firmware is
installed.
1. Connect to the switch using serial and interrupt the boot process
to enter debug/recovery mode.
2. You need to unlock the bootloader. Use known methods [1] and [2] to
obtain the unlock code and unlock the bootloader with:
> ATEN 1,<unlock_code>
3. Upload the initramfs image using Xmodem:
> ATUP <address>,<file_length>
<address>: you may use any RAM address >= 0x80300000
<file_length>: length of image in bytes
4. After the transfer has finished, boot the image with:
> ATGO <address>
5. Wait for OpenWrt to boot. At this stage, it might be wise to create a
backup/dump of the Flash partitions.
Return to stock firmware
========================
1. Download the firmware for the switch from Zyxel website.
2. Unzip the download, there should be a .bin file with a alphanumeric
name.
3. Upload this file to running OpenWrt.
4. Run (use -F since the image doesn't have image metadata):
> sysupgrade -F <stock-firmware>.bin
5. Wait for the sysupgrade to succeed and the switch reboot. At the next
boot, ZyNOS should come up again.
Recovery
========
The Bootbase loader is actually a modified U-Boot variant. You can enter
it by spamming $ during the DRAM test.
The U-Boot shell can be unlocked with [1] and [2]. Note that the command
is slightly different, using a space instead of a comma, and lowercase:
> aten 1 <unlock_code>
You should now have more-or-less a standard RTK-U-boot shell from where
you can upload and write a new image to flash. Use e.g.:
> upgradeY image2 81000000 115200
Wait for the upgrade process to finish and reboot the switch.
===
[1] https://akao.co.uk/tools/zyxel_unlocker/
[2] https://www.ixo.de/info/zyxel_uclinux/
Signed-off-by: Jonas Jelonek <jelonek.jonas@gmail.com>
Link: https://github.com/openwrt/openwrt/pull/22909
Signed-off-by: Robert Marko <robimarko@gmail.com>
Add generic support for Zyxel's XS1930 10G switch lineup. This will be
used by subsequent patches to share common behavior/settings.
Common specs:
- Realtek RTL9313 switch SoC
- 256MB RAM
- 32MB Flash with shared layout
- different 10G copper/SFP port configurations
The devices use a proprietary software chain from Zyxel, consisting of:
- stripped-down, heavily modified U-boot masked as "Bootbase"
- BootExtension stage2 loader
- Thread-X based ZyNOS
Those devices require to add some symbols to the kernel config, i.e.
CONFIG_AQUANTIA_PHY for the used PHYs and symbols for GPIO peripherals
and muxes due to the hardware design.
Signed-off-by: Jonas Jelonek <jelonek.jonas@gmail.com>
Link: https://github.com/openwrt/openwrt/pull/22909
Signed-off-by: Robert Marko <robimarko@gmail.com>
Add a new recipe 'zyxel-zynos' which contains common
behavior/definitions for ZyNOS-based Zyxel devices which requirea
special image to be built using 'zynos-firmware' recipe.
Signed-off-by: Jonas Jelonek <jelonek.jonas@gmail.com>
Link: https://github.com/openwrt/openwrt/pull/22909
Signed-off-by: Robert Marko <robimarko@gmail.com>
Add a build recipe to build a ZyNOS firmware image using mkzynfw from
firmware-utils to produce an image that can be flashed with the web
interface of ZyNOS vendor firmware.
Signed-off-by: Jonas Jelonek <jelonek.jonas@gmail.com>
Link: https://github.com/openwrt/openwrt/pull/22909
Signed-off-by: Robert Marko <robimarko@gmail.com>
The whole driver often does some range checks of the SerDes ID to
restrict some functionality to a group of SerDes. However, having these
open-coded checks everywhere is rather confusing because it's not
obvious what it actually means.
Luckily, those checks give a good picture of what SerDes types we have:
- 5G: RTL838x, RTL839x (0-7, 10, 11), RTL930x (0, 1)
- 10G: RTL839x (8, 9, 12, 13), RTL930x (2-9), RTL931x (2-13)
- unknown: RTL930x (10, 11), RTL931x (0, 1)
Add a new enum and field in rtpcs_serdes for the type of a SerDes we
have. This is filled during SerDes probe, making use of the stub
implementations for that hook.. All SerDes ID range checks related to
this are replaced with corresponding checks of the SerDes type.
Signed-off-by: Jonas Jelonek <jelonek.jonas@gmail.com>
Link: https://github.com/openwrt/openwrt/pull/22941
Signed-off-by: Robert Marko <robimarko@gmail.com>
Add a per-SerDes probe hook to rtpcs_config, called once for each SerDes
during driver probe. This provides a place for variant-specific, one-time
per-SerDes initialization that doesn't fit into the existing controller-
level init hook — such as allocating per-lane regmap fields or assigning
per-SerDes metadata.
Add stub implementations for all variants for now. They will be used by
all variants in a subsequent comment. For RTL839x, reuse the existing
rtl839x_sds_init hook and move its call out of the global init.
Signed-off-by: Jonas Jelonek <jelonek.jonas@gmail.com>
Link: https://github.com/openwrt/openwrt/pull/22941
Signed-off-by: Robert Marko <robimarko@gmail.com>
Our USXGMII config only covers one single register of which kind there
are actually more. We only set a value for 'CFG_QHSG_TXCFG_MAC_CH0' but
there are additional registers for CH1-CH3. Those refer to the 4
USXGMII 'channels'. While the RTL930x part of the SDK doesn't set them
explicitly, from RTK setup SerDes dumps we can see they are usually
similarly set.
The RTL931x part of the SDK actually writes those register explicitly
during USXGMII. We just haven't implemented that so far. Thus, add this
to the USXGMII config for both RTL93xx.
Signed-off-by: Jonas Jelonek <jelonek.jonas@gmail.com>
Link: https://github.com/openwrt/openwrt/pull/22939
Signed-off-by: Robert Marko <robimarko@gmail.com>
Since the USXGMII config was made generic before, we can use it now for
the RTL931x setup too. This brings it closer to what the SDK configures
(see _dal_mango_construct_init_usxgmii), fixes some deviations in our
previous settings and makes clearer what is actually done.
Signed-off-by: Jonas Jelonek <jelonek.jonas@gmail.com>
Link: https://github.com/openwrt/openwrt/pull/22939
Signed-off-by: Robert Marko <robimarko@gmail.com>
The USXGMII config setting specific options currently is only
implemented for RTL930x. Looking at the SDK one can see that RTL931x
shares a lot of these configuration options. Additionally, several dumps
from RTK setups have shown that values which aren't set yet by us for
RTL930x but for RTL931x, also apply for RTL930x. Thus, both can be
merged. Start this by making the current function generic for RTL93xx.
Signed-off-by: Jonas Jelonek <jelonek.jonas@gmail.com>
Link: https://github.com/openwrt/openwrt/pull/22939
Signed-off-by: Robert Marko <robimarko@gmail.com>
USXGMII autoneg setting is currently hardcoded for RTL930x and not even
handled explicitly for RTL931x. This should be handled via neg_mode from
phylink subsystem too. Thus, move it over to rtpcs_93xx_sds_set_autoneg
as generic implementation for RTL93xx and set it depending on the
provided negotiation mode.
Signed-off-by: Jonas Jelonek <jelonek.jonas@gmail.com>
Link: https://github.com/openwrt/openwrt/pull/22939
Signed-off-by: Robert Marko <robimarko@gmail.com>
The XMG1915-10E is a switch with 8 copper ports and 2 SFP+ cages.
Specifications:
---------------
* SoC: RTL9302C
* Flash: 32 MiB SPI NOR flash
* RAM: 256 MiB
* Ethernet: 8x 10/100/1000/2500 Mbps (RTL8224)
* SFP: 2x SFP+ cages
* UART: 1x 4 pins serial header, 115200 bauds, 8n1, 3.3v logic levels,
pinout: unused (top), TX, RX, GND (bottom)
* Buttons: 1x "Reset" button
Works:
------
- 2 SFP+ cages either 1G/10G or 2.5G
- 8*2.5G Ethernet ports
- Switch function
- LEDs
- Boot from flash
- Assigning MAC addresses from flash
Ethernet ports:
---------------
The 8x 2.5Gbps ethernet ports are provided by two RTL8224 chips. The
ports are supported by the upstream realtek PHY driver plus a local
initialization patch for the 10g-qxgmii mode.
Installation:
-------------
This device uses ZyNOS instead of Linux which makes the installation a
bit cumbersome. OpenWRT will be installed on the slot of the second
firmware image, thus the switch original firmware can be booted with a
little change. The serial console is required.
1. Set the switch to boot from the first image. This is required to
be sure not to be blocked in the middle of the installation
procedure.
2. Connect to the switch using the serial adapter and interrupt the boot
process by pressing "Enter" repeatedly.
3. Load the OpenWRT initramfs image using xmodem. From bootext console
(use ATHE to get the list of commands):
> ATUP 81800000,file_length
> ATGO 81800000
4. Wait for OpenWRT to boot, once this is done transfer the loader
binary and the sysupgrade image to /tmp using scp.
5. Install OpenWRT permanently by writing the images on the flash:
> mtd write /tmp/loader.bin loader
> mtd write /tmp/sysupgrade.bin firmware
6. Reboot the switch and from the stock firmware set the configuration
to boot from the second image (Maintenance > Firmware upgrade > Boot
image).
7. Reboot again and enjoy OpenWRT.
Recovery/Return to stock:
-------------------------
1. Connect the switch using the serial adapter and interrupt the boot
process during the "DRAM POST: Testing:" sequence by pressing '$'
until the "XMG1915$" prompt appears.
2. Start an ymodem upgrade using the following command and use an xmodem
upload tool to send the .bin file provided in an OEM upgrade package.
XMG1915$ upgradeY image2 81000000 115200
## Ready for binary (ymodem) download to 0x081000000 at 115200 bps...
3. Wait for the upgrade process to finish and reboot the switch.
Signed-off-by: Damien Dejean <dam.dejean@gmail.com>
Link: https://github.com/openwrt/openwrt/pull/21341
Signed-off-by: Robert Marko <robimarko@gmail.com>
This refactoring is a little bit of all ...
For access to the ring counter and size registers there exist currently
separate helpers. These are only for the register number but not the
bit position inside the register. Register definitions still use the
old prefix. Resolve this mix by
- Changing the prefixes of the register defines
- replacing the helpers with the register addresses
- just calculating register & offset manually where needed.
This might be a little step back but at least aligns with the rest of
the register access code. A future commit might bring an even better
version.
While we are here convert the main consumer rteth_93xx_hw_reset() to
regmap and fix a bug. Until now this function only clears the first
counter in a register because of a missing bit shift during writeback.
Signed-off-by: Markus Stockhausen <markus.stockhausen@gmx.de>
Link: https://github.com/openwrt/openwrt/pull/22920
Signed-off-by: Robert Marko <robimarko@gmail.com>
The rtl838x.h header is needed for all targets and not only RTL838x
specific. Rename it to rtl-otto.h to make clear that this is a
generic include.
Signed-off-by: Markus Stockhausen <markus.stockhausen@gmx.de>
Link: https://github.com/openwrt/openwrt/pull/22931
Signed-off-by: Robert Marko <robimarko@gmail.com>
There are currently two header files for the dsa driver. rtl83xx.h
and rtl838x.h. It is unclear for what reason they are separated.
Especially as one always includes the other. Merge those two files
into one.
Signed-off-by: Markus Stockhausen <markus.stockhausen@gmx.de>
Link: https://github.com/openwrt/openwrt/pull/22931
Signed-off-by: Robert Marko <robimarko@gmail.com>
Use the new macro for the SFP ports.
Signed-off-by: Markus Stockhausen <markus.stockhausen@gmx.de>
Link: https://github.com/openwrt/openwrt/pull/22947
Signed-off-by: Robert Marko <robimarko@gmail.com>
Previous commits carved out some TX configuration from different places
into a dedicated function. A cause of this is a behavioral change where
the TX amplifier values aren't applied anymore if it isn't a "fiber
mode". To restore this behavior and make the media/TX-RX configuration
more generic, we need a dedicated media type. The existing ones only
cover fiber and DACs, but not the other left case where a PHY is
attached to the SerDes. This now calls set_media for USXGMII and XSGMII
modes intentionally, both to prepare for future changes and to restore
previous behavior.
We do not have a reliable way to distinct between the actually used
media types, this is still a TODO. But several parts of the code already
have different values applied based on this information. Moreover, this
is especially needed for DAC cables to work properly. While this is
missing, we need to rely on inferring the media from the SerDes mode.
While at it, improve the call site of media handling since there's a
media type for all cases now. This allows to reduce the number of
function calls by moving it out and just have the media type in the
decision block.
Signed-off-by: Jonas Jelonek <jelonek.jonas@gmail.com>
Link: https://github.com/openwrt/openwrt/pull/22814
Signed-off-by: Robert Marko <robimarko@gmail.com>
Proceed with the consolidation of TX/RX path config by carving out some
TX configuration out into a separate function. For now, this only
affects TX amplifier config. But it already slims down other polluted
call sites and brings some structure into the TX/RX path config.
While at it, already provide a similar function for RX configuration.
This does nothing yet but should be filled with RX path config later.
Signed-off-by: Jonas Jelonek <jelonek.jonas@gmail.com>
Link: https://github.com/openwrt/openwrt/pull/22814
Signed-off-by: Robert Marko <robimarko@gmail.com>
Shed some light into the darkness by giving a part of the setup a
dedicated name. This applies to the magic data blocks in the generic
setup entrypoint and some writes in the media handling. This was just
copied from the SDK which doesn't annotate this properly with
information. But we can clearly connect this with some other functions
of the SDK and extract meaningful information.
The mentioned magic blocks and register writes set coefficients of three
amplifiers in the TX path, a pre-amp, a main-amp and a post-amp. They
are used to tune the signal for different kinds of media. Generic values
are applied for all SerDes and further special values for different media
types depending on the needs.
Provide a dedicated function that sets these amplifier coefficients.
Replace the mystic register writes with the function call so one can see
at a glance what's happening. Also replace the magic TX values with the
coefficients organized into a separate struct. This might be extended
further and is also applicable for RTL930x.
Signed-off-by: Jonas Jelonek <jelonek.jonas@gmail.com>
Link: https://github.com/openwrt/openwrt/pull/22814
Signed-off-by: Robert Marko <robimarko@gmail.com>
Within RTL931x set_media, two writes are applied in general for all modes
but later again changed depending on the mode. This is a confusing
pattern. To fix this, move those generic writes into the switch-block as
a default case. To maintain behavior, pull the 10G guard into the fiber
media case.
Signed-off-by: Jonas Jelonek <jelonek.jonas@gmail.com>
Link: https://github.com/openwrt/openwrt/pull/22814
Signed-off-by: Robert Marko <robimarko@gmail.com>
Relocate the analog reset code within set_media for RTL931X to have it
in one place at the very top of the function, running all reset actions
before further real configuration is done. Also drop a separate call to
rx_reset because a subsequent sequence already includes this
functionality.
Signed-off-by: Jonas Jelonek <jelonek.jonas@gmail.com>
Link: https://github.com/openwrt/openwrt/pull/22814
Signed-off-by: Robert Marko <robimarko@gmail.com>
The MCU (GD32E230G8) which controls the RTL8239 POE++ PSE chips can
sometimes hang. In this case, it is necessary to to reset the chip using
the nRESET pin which is connected to the GPIO1 of the RTL8231 GPIO
expander.
For a reset, the `/sys/class/gpio/poe_mcu_reset/value` file must be set to
1 for a short period and then back to 0. After that, the poemgr must be
"restarted" to the MCU back in the expected state.
Signed-off-by: Sven Eckelmann <sven@narfation.org>
Link: https://github.com/openwrt/openwrt/pull/22916
Signed-off-by: Robert Marko <robimarko@gmail.com>
Since f1f0572d1 ("remove redundant integrated phy attribute") the
phy-is-integrated attribute of an phy in the dts is obsolete.
This was important for the INTERNAL_PHY() macro. Now it is
useless. Convert the macro to its successor PHY_C22().
Signed-off-by: Markus Stockhausen <markus.stockhausen@gmx.de>
Link: https://github.com/openwrt/openwrt/pull/22892
Signed-off-by: Robert Marko <robimarko@gmail.com>
The initial bringup missed two GPIO-related settings:
- TX Disable GPIO for the SFP modules
- LED Sync GPIO selection for the port LEDs
This adds the missing TX Disable GPIOs and muxes GPIO18 to LED sync
(there are HC595 shift registers on the board that require the sync).
Signed-off-by: Andreas Böhler <dev@aboehler.at>
Link: https://github.com/openwrt/openwrt/pull/22551
Signed-off-by: Robert Marko <robimarko@gmail.com>
Add the affected mdio device to the warning output.
Signed-off-by: Markus Stockhausen <markus.stockhausen@gmx.de>
Link: https://github.com/openwrt/openwrt/pull/22866
Signed-off-by: Hauke Mehrtens <hauke@hauke-m.de>
Align the max defines to upstream. For this
- rename PHY to PORT (that is what it is really about=
- use plural name (e.g. BUSSES instead of BUS)
Signed-off-by: Markus Stockhausen <markus.stockhausen@gmx.de>
Link: https://github.com/openwrt/openwrt/pull/22866
Signed-off-by: Hauke Mehrtens <hauke@hauke-m.de>
Whenever a variable is needed to denote a smi_bus it is named
accordingly. Fix the last wrong definition.
Signed-off-by: Markus Stockhausen <markus.stockhausen@gmx.de>
Link: https://github.com/openwrt/openwrt/pull/22866
Signed-off-by: Hauke Mehrtens <hauke@hauke-m.de>
