Backport additional patch required for NPU support of Airoha AN7583.
These are specific for the NPU module with some minor fixes and to adds
upport for loading the specific Airoha AN7583 NPU firmware.
Signed-off-by: Christian Marangi <ansuelsmth@gmail.com>
Add relevant nodes for NPU support for Airoha AN7583 and enable the
kernel config to enable support in the Airoha Ethernet driver.
NPU firmware is scheduled to be upstreamed to linux-firmware and will be
added once present upstream.
Signed-off-by: Christian Marangi <ansuelsmth@gmail.com>
Fix the current image Makefile for Airoha AN7583 by dropping the
artifacts entry for bootloader and add default PKG for the PHY mounted
on the RFB boards.
The artifacts for the bootloader will be readded later once ATF-A
support will be pushed mainline.
Signed-off-by: Christian Marangi <ansuelsmth@gmail.com>
While adding support for Airoha AN7583, it was forget to push the EMMC
DTS while defining the variant in the image Makefile.
Add the missing DTS to fix image creation error.
Signed-off-by: Christian Marangi <ansuelsmth@gmail.com>
On the Airoha AN7583 EVB there are 2 Aeonsemi AS21xxx PHY but only the
one connected to Serdes Ethernet is usable as the other connected to
Serdes PON is not actually HW connected (as the serdes is connected to
the BOSA port)
Add comments and disable the relevant PHY.
Signed-off-by: Christian Marangi <ansuelsmth@gmail.com>
This commit changes the Meraki MR33 and MR74 device trees to use nvmem
for ART calibration.
The WiFi BDF was moved from insect-common.dtsi to the respective
device files in preparation for additional insect-family devices being added.
Signed-off-by: Hal Martin <hal.martin@gmail.com>
Link: https://github.com/openwrt/openwrt/pull/20474
Signed-off-by: Robert Marko <robimarko@gmail.com>
Userspace handling is deprecated.
Use ath9k LED instead of specifying a generic one.
Signed-off-by: Rosen Penev <rosenp@gmail.com>
Link: https://github.com/openwrt/openwrt/pull/16286
Signed-off-by: Hauke Mehrtens <hauke@hauke-m.de>
Userspace handling is deprecated.
Use ath9k LED binding to avoid generic LED usage.
Signed-off-by: Rosen Penev <rosenp@gmail.com>
Link: https://github.com/openwrt/openwrt/pull/16286
Signed-off-by: Hauke Mehrtens <hauke@hauke-m.de>
This board is also as known as E-Life ETR631-T/ETR635-U.
Hardware specification:
SoC: MediaTek MT7981B 2x A53
Flash: 128 MB SPI-NAND
RAM: 256MB DDR3
Ethernet: 4x 10/100/1000 Mbps
Switch: MediaTek MT7531AE
WiFi: MediaTek MT7976C
Button: Reset, Mesh
Power: DC 12V 1A
Gain telnet access:
1. Login into web interface, and download the configuration.
2. Uncompress the configuration:
* Enter fakeroot if you are not login as root.
tar -zxf <filename>.tar.gz
3. Edit 'etc/passwd', remove root password: 'root::1:0:99999:7:::'.
4. Edit 'etc/rc.local', insert telnetd command before 'exit 0':
( sleep 3s; telnetd; ) &
5. Repack the configuration:
tar -zcf backup.tar.gz etc/
6. Upload new configuration via web interface, now you can connect to
KOMI A31 via telnet.
Flash instructions:
1. Connect to KOMI A31, backup everything, especially 'Factory' part.
2. Write new BL2:
mtd write openwrt-mediatek-filogic-konka_komi-a31-preloader.bin BL2
3. Write new FIP:
mtd write openwrt-mediatek-filogic-konka_komi-a31-bl31-uboot.fip FIP
4. Set static IP on your PC:
IP 192.168.1.254/24, GW 192.168.1.1
5. Serve OpenWrt initramfs image using TFTP server.
6. Cut off the power and re-engage, wait for TFTP recovery to complete.
7. After OpenWrt has booted, perform sysupgrade.
Signed-off-by: Tianling Shen <cnsztl@immortalwrt.org>
Link: https://github.com/openwrt/openwrt/pull/20357
Signed-off-by: Hauke Mehrtens <hauke@hauke-m.de>
Allows us a bit more headroom flash wise and access to more recent
compression algorithms.
Signed-off-by: Stijn Segers <foss@volatilesystems.org>
Link: https://github.com/openwrt/openwrt/pull/20445
Signed-off-by: Hauke Mehrtens <hauke@hauke-m.de>
Drop config and patches for Linux 6.6.
Signed-off-by: Thomas Richard <thomas.richard@bootlin.com>
Link: https://github.com/openwrt/openwrt/pull/20468
Signed-off-by: Nick Hainke <vincent@systemli.org>
Switch to Linux kernel 6.12.
Signed-off-by: Thomas Richard <thomas.richard@bootlin.com>
Link: https://github.com/openwrt/openwrt/pull/20468
Signed-off-by: Nick Hainke <vincent@systemli.org>
Backport upstream patch for AN7583 Ethernet support. While at it also
backport some additional fixes required to apply the AN7583 patches
cleanly.
Refresh all affected patch automatically (aside from the XSI patch that
changed the implementation)
Link: https://github.com/openwrt/openwrt/pull/20489
Signed-off-by: Christian Marangi <ansuelsmth@gmail.com>
Backport phylink patches for PCS/PHY caps OPs. This makes it easier to
align future generic PCS patch and permit supporting special PHY that
needs specific tune if "in-band" mode is enabled (for example Aeonsemi
PHYs)
This is also mainly using the upstream version of the Mediatek patch
739-net-add-negotiation-of-in-band-capabilities.
All affected patch automatically refreshed.
Link: https://github.com/openwrt/openwrt/pull/20461
Signed-off-by: Christian Marangi <ansuelsmth@gmail.com>
Now that we have a board file, add calibration variant for TP-Link
Archer C60 v2 and add ipq-wifi package for it.
Tested-by: Semih Baskan <strstgs@gmail.com>
Signed-off-by: Christoph Krapp <achterin@gmail.com>
Link: https://github.com/openwrt/openwrt/pull/20496
Signed-off-by: Robert Marko <robimarko@gmail.com>
L3 Offloading caused DHCP packets to be dropped at hardware level
And potentially buggy route implementation can cause a crash
Signed-off-by: Harshal Gohel <hg@simonwunderlich.de>
Co-developed-by: Sven Eckelmann <se@simonwunderlich.de>
Signed-off-by: Sven Eckelmann <se@simonwunderlich.de>
Link: https://github.com/openwrt/openwrt/pull/20208
Signed-off-by: Robert Marko <robimarko@gmail.com>
The RTL931x is not supporting L3 offloading at the moment. To avoid crashes
when using this switch, simply disable L3 offloading completely.
Signed-off-by: Harshal Gohel <hg@simonwunderlich.de>
Co-developed-by: Sven Eckelmann <se@simonwunderlich.de>
Signed-off-by: Sven Eckelmann <se@simonwunderlich.de>
Link: https://github.com/openwrt/openwrt/pull/20208
Signed-off-by: Robert Marko <robimarko@gmail.com>
a33d59f7af (2025-10-14) restored dts files for kernel 6.6 to files-6.6
after the preceding 15fa59c41f moved files-6.6 to files-6.12 to be
used by the new testing kernel, 6.12. This restoration omitted
1a3f05eb2b (2025-10-08), which fixed important aspects of the wifi
device definitions in qcom-ipq8064-eax500.dtsi and
qcom-ipq8064-unifi-ac-hd.dts.
The 1a3f05eb2b fix persisted into the 6.12 dts files. This change now
restores it for 6.6. Note that ipq806x is currently using kernel 6.6 for
most purposes, as 6.12 is only in testing status for this target.
This change was prepared with `git diff
a33d59f7af8f:target/linux/ipq806x/files-6.6
15fa59c41f0d^:target/linux/ipq806x/files-6.6`. This identified
c186d17fa5 (2025-10-08) as another change that was not present in the
restored files-6.6, but it has since been superseded by 2a709d108e
(2025-10-20), so no action is necessary to restore it. There were no
diffs present between these revisions in config-6.6 or patches-6.6,
which were also moved and restored in the 6.12 bring-up.
Signed-off-by: Mark Mentovai <mark@mentovai.com>
Cc: Shiji Yang <yangshiji66@outlook.com>
Cc: Rosen Penev <rosenp@gmail.com>
Link: https://github.com/openwrt/openwrt/pull/20464
Signed-off-by: Robert Marko <robimarko@gmail.com>
SQUASHFS_DECOMP_MULTI_PERCPU is selected by
SQUASHFS_COMPILE_DECOMP_MULTI_PERCPU, so add it.
Signed-off-by: Chukun Pan <amadeus@jmu.edu.cn>
Link: https://github.com/openwrt/openwrt/pull/20140
Signed-off-by: Hauke Mehrtens <hauke@hauke-m.de>
The pinctrl driver should be enabled based on the SoC supported
by the subtarget, rather than enabling all by default.
Signed-off-by: Chukun Pan <amadeus@jmu.edu.cn>
Link: https://github.com/openwrt/openwrt/pull/20140
Signed-off-by: Hauke Mehrtens <hauke@hauke-m.de>
Add the common kernel config found when 'make kernel_oldconfig'.
Signed-off-by: Chukun Pan <amadeus@jmu.edu.cn>
Link: https://github.com/openwrt/openwrt/pull/20140
Signed-off-by: Hauke Mehrtens <hauke@hauke-m.de>
The cortexa53 target currently uses cpu erratums for Cortex-A510,
Cortex-A710, and Neoverse-N2. Remove them and enable cpu erratums
for Cortex-A53.
Fixes: f01982e ("sunxi: add testing kernel 6.1")
Signed-off-by: Chukun Pan <amadeus@jmu.edu.cn>
Link: https://github.com/openwrt/openwrt/pull/20140
Signed-off-by: Hauke Mehrtens <hauke@hauke-m.de>
The SPI chip select GPIO polarity is active low by default. We must
use "spi-cs-high" dts property to toggle the polarity. The polarity
on "cs-gpios" won't take effect at all[1]. Fix these incorrect GPIO
polarities to silence the kernel warnings.
[1] Refer to Linux/Documentation/devicetree/bindings/spi/spi-controller.yaml
```
device node | cs-gpio | CS pin state active | Note
================+===============+=====================+=====
spi-cs-high | - | H |
- | - | L |
spi-cs-high | ACTIVE_HIGH | H |
- | ACTIVE_HIGH | L | 1
spi-cs-high | ACTIVE_LOW | H | 2
- | ACTIVE_LOW | L |
Notes:
1) Should print a warning about polarity inversion.
Here it would be wise to avoid and define the gpio as
ACTIVE_LOW.
2) Should print a warning about polarity inversion
because ACTIVE_LOW is overridden by spi-cs-high.
Should be generally avoided and be replaced by
spi-cs-high + ACTIVE_HIGH.
```
Signed-off-by: Shiji Yang <yangshiji66@outlook.com>
Link: https://github.com/openwrt/openwrt/pull/19845
Signed-off-by: Hauke Mehrtens <hauke@hauke-m.de>
There is no need to add a "cs-gpios" property if chip select pin is
directly controlled by the SPI host hardware.
Signed-off-by: Shiji Yang <yangshiji66@outlook.com>
Link: https://github.com/openwrt/openwrt/pull/19845
Signed-off-by: Hauke Mehrtens <hauke@hauke-m.de>
These devices only have one SPI peripheral. And the chip select pin is
directly controlled by the SPI host hardware. Hence we don't need to
assign empty GPIO phandle for them. This patch also adjust the reg
address of the SPI peripheral node to follow the cs-gpios changes.
Signed-off-by: Shiji Yang <yangshiji66@outlook.com>
Link: https://github.com/openwrt/openwrt/pull/19845
Signed-off-by: Hauke Mehrtens <hauke@hauke-m.de>
The SPI chip select GPIO polarity is active low by default. We must
use "spi-cs-high" dts property to toggle the polarity. The polarity
on "cs-gpios" won't take effect at all[1]. Fix these incorrect GPIO
polarities to silence the kernel warnings.
[1] Refer to Linux/Documentation/devicetree/bindings/spi/spi-controller.yaml
```
device node | cs-gpio | CS pin state active | Note
================+===============+=====================+=====
spi-cs-high | - | H |
- | - | L |
spi-cs-high | ACTIVE_HIGH | H |
- | ACTIVE_HIGH | L | 1
spi-cs-high | ACTIVE_LOW | H | 2
- | ACTIVE_LOW | L |
Notes:
1) Should print a warning about polarity inversion.
Here it would be wise to avoid and define the gpio as
ACTIVE_LOW.
2) Should print a warning about polarity inversion
because ACTIVE_LOW is overridden by spi-cs-high.
Should be generally avoided and be replaced by
spi-cs-high + ACTIVE_HIGH.
```
Signed-off-by: Shiji Yang <yangshiji66@outlook.com>
Link: https://github.com/openwrt/openwrt/pull/19845
Signed-off-by: Hauke Mehrtens <hauke@hauke-m.de>
The SPI chip select GPIO polarity is active low by default. We must
use "spi-cs-high" dts property to toggle the polarity. The polarity
on "cs-gpios" won't take effect at all[1]. Fix these incorrect GPIO
polarities to silence the kernel warnings.
[1] Refer to Linux/Documentation/devicetree/bindings/spi/spi-controller.yaml
```
device node | cs-gpio | CS pin state active | Note
================+===============+=====================+=====
spi-cs-high | - | H |
- | - | L |
spi-cs-high | ACTIVE_HIGH | H |
- | ACTIVE_HIGH | L | 1
spi-cs-high | ACTIVE_LOW | H | 2
- | ACTIVE_LOW | L |
Notes:
1) Should print a warning about polarity inversion.
Here it would be wise to avoid and define the gpio as
ACTIVE_LOW.
2) Should print a warning about polarity inversion
because ACTIVE_LOW is overridden by spi-cs-high.
Should be generally avoided and be replaced by
spi-cs-high + ACTIVE_HIGH.
```
Signed-off-by: Shiji Yang <yangshiji66@outlook.com>
Link: https://github.com/openwrt/openwrt/pull/19845
Signed-off-by: Hauke Mehrtens <hauke@hauke-m.de>
This is a useless property on ath79 target. Both spi-ar934x and
spi-ath79 drivers don't check num-cs property. They always set
chip select number to 3.
Signed-off-by: Shiji Yang <yangshiji66@outlook.com>
Link: https://github.com/openwrt/openwrt/pull/19845
Signed-off-by: Hauke Mehrtens <hauke@hauke-m.de>
Both devices seem to be completely identical and D-Link doesnt even
mention the DIR-X1550 A1 in the GPL source. Furthermore the supported
devices header also just contains DIR-X1860 B1. The cherry on top is the
FCC filing, which features the manual for DIR-X1550 A1 but the label
info for DIR-X1860 B1. I guess someone at D-Link was just as confused as
me.
Hardware
--------
SOC: MediaTek MT7621AT
FLASH: 128MB (Spansion S34ML01G200TF100)
RAM: 256MB (Winbond W632GU6NB-12)
WIFI: MediaTek MT7915DAN + MT7975DN DBDC 2x2 802.11ax
ETH: 1x WAN, 3x LAN
LED: 6 (4 GPIO controllable, 2 WIFI hardwired)
BTN: WPS, Reset
UART: 115200 8N1 (Pinout silkscreened) - ignore VCC
MAC addresses
-------------
LAN Label MAC (stored in config2 partition as ASCII (entry
factory_mac=xx:xx:xx:xx:xx:xx))
WAN LAN + 3
2.4G LAN + 1
5G LAN + 2
Installation
------------
Vendor UI
---------
1. Browse to http://192.168.0.1 and login.
2. Navigate to "Management" -> "Upgrade".
3. Press the "Select File" button and upload
openwrt-ramips-mt7621-dlink_dir-x1860-b1-squashfs-factory.bin
4. Confirm the security questions, wait for a reboot and enjoy OpenWrt.
Recovery UI
-----------
1. Set your IP address to 192.168.0.101, subnet 255.255.255.0.
2. Power on the device while holding reset.
3. Release reset once the status led starts to blink orange.
4. Open a chrome- or firefox based browser and browse to
https://192.168.0.1
5. Upload openwrt-ramips-mt7621-dlink_dir-x1860-b1-squashfs-recovery.bin
wait for a reboot and enjoy OpenWrt.
Back to stock
-------------
1. Set your IP address to 192.168.0.101, subnet 255.255.255.0.
2. Power on the device while holding reset.
3. Release reset once the status led starts to blink orange.
4. Open a chrome- or firefox based browser and browse to
https://192.168.0.1
5. Upload a decrypted vendor image, wait for a reboot and regret your
decision.
Decrypt vendor image
--------------------
1. Download dlink-sge-image.c and dlink-sge-image.h from the
firmware-utils openwrt repository.
2. Compile a binary from the downloaded file
e.g. gcc dlink-sge-image.c -lcrypto -o dlink-sge-image
3. Run
./dlink-sge-image DIR-X1860-B1 <vendor_image> <decrypted_image> -d
Signed-off-by: Christoph Krapp <achterin@gmail.com>
Link: https://github.com/openwrt/openwrt/pull/20410
Signed-off-by: Hauke Mehrtens <hauke@hauke-m.de>
Originally, phylink_mac_config first disabled the MAC, then triggered
the SerDes setup and then re-enabled MAC. SerDes setup has been moved to
the PCS driver now but pcs_config is called AFTER phylink_mac_config by
phylink subsystem.
Thus, just disable the MAC in phylink_mac_config. After PCS has setup
the SerDes, the MAC should be properly brought up in a mac_link_up call
coming from the phylink subsystem.
Signed-off-by: Jonas Jelonek <jelonek.jonas@gmail.com>
Link: https://github.com/openwrt/openwrt/pull/20369
Signed-off-by: Hauke Mehrtens <hauke@hauke-m.de>
Remove SerDes initialization/configuration calls from the DSA driver in
'rtl931x_phylink_mac_config' and let our PCS driver setup the SerDes now
that the driver is able to do that.
pcs_config of the PCS driver is automatically called by phylink, thus
there's no need to call it on our own.
Note that in rtl931x_phylink_mac_config the MAC is enabled before
pcs_config is called. While this seems to work, it isn't good and needs
to be fixed.
Signed-off-by: Jonas Jelonek <jelonek.jonas@gmail.com>
Link: https://github.com/openwrt/openwrt/pull/20369
Signed-off-by: Hauke Mehrtens <hauke@hauke-m.de>
In rtpcs_931x_setup_serdes, quit early on USXGMII mode. This restores
the behaviour introduced in c18476d0c5 to prevent the current buggy
procedure to destroy a working configuration established by U-Boot
before.
Also include the valuable comment from the code to keep the information.
Signed-off-by: Jonas Jelonek <jelonek.jonas@gmail.com>
Link: https://github.com/openwrt/openwrt/pull/20369
Signed-off-by: Hauke Mehrtens <hauke@hauke-m.de>
Adjust the SerDes page numbers to account for the different mapping used
by 'mdio-realtek-otto' and 'mdio-realtek-otto-serdes' drivers.
While importing the SerDes configuration code from PHY driver to PCS
driver, all helper calls to access the SerDes registers had to be
adjusted to use the proper helpers within the PCS driver. However, there
is one important implication of this: 'mdio-realtek-otto' and
'mdio-realtek-otto-serdes' use a slightly different page mapping.
While the old helpers in 'mdio-realtek-otto' used a page mapping of
0x00/0x100/0x200, 'mdio-realtek-otto-serdes' uses a mapping of
0x00/0x40/0x80 to provide consumers with the ability to only operate on
frontend SerDes. Thus, all page numbers > 63/0x3f have to be adjusted
like the following:
before: rtsds_931x_write_field(sds, 0x101, ... // old helper calls
after: rtpcs_sds_write(ctrl, sds, 0x41, ...
Signed-off-by: Jonas Jelonek <jelonek.jonas@gmail.com>
Link: https://github.com/openwrt/openwrt/pull/20369
Signed-off-by: Hauke Mehrtens <hauke@hauke-m.de>
Replaces the "old" way of accessing registers using the macros
sw_r32/sw_w32 from mach-rtl83xx.h. The "new" way to access register is
through the regmap API.
Signed-off-by: Jonas Jelonek <jelonek.jonas@gmail.com>
Link: https://github.com/openwrt/openwrt/pull/20369
Signed-off-by: Hauke Mehrtens <hauke@hauke-m.de>
Let's start this transition with RTL931X.
Import all functions starting with 'rtl931x_' or 'rtsds_931x' from PHY
driver into the PCS driver, rename all functions to match a common
naming scheme and adjust signature, helper calls and function calls
accordingly to make it work within the PCS driver.
This is just copy&paste and tries to do only mandatory adjustments. The
code will be refactored in succeeding commits.
Also remove 'unused' attribute from helpers as they are used now.
Signed-off-by: Jonas Jelonek <jelonek.jonas@gmail.com>
Link: https://github.com/openwrt/openwrt/pull/20369
Signed-off-by: Hauke Mehrtens <hauke@hauke-m.de>
RTL8261N is not used by any device in this target. If necessary, newly added
devices should add the kmod-phy-rtl8261n package.
Signed-off-by: Aleksander Jan Bajkowski <olek2@wp.pl>
Link: https://github.com/openwrt/openwrt/pull/20444
Signed-off-by: Hauke Mehrtens <hauke@hauke-m.de>
This option will only take effect when the "separate_ramdisk"
feature was enabled. However, this target does not support
this feature. It is an obvious copy and paste issue.
Signed-off-by: Shiji Yang <yangshiji66@outlook.com>
Link: https://github.com/openwrt/openwrt/pull/17832
Signed-off-by: Hauke Mehrtens <hauke@hauke-m.de>
This option will only take effect when the "separate_ramdisk"
feature was enabled. However, this target does not support
this feature. It is an obvious copy and paste issue.
Signed-off-by: Shiji Yang <yangshiji66@outlook.com>
Link: https://github.com/openwrt/openwrt/pull/17832
Signed-off-by: Hauke Mehrtens <hauke@hauke-m.de>
The Nokia G-240G-E is an xPON device with an EN7526G, 256M of
memory and 128M of flash. It has 1 USB2 port as well as phone and
ethernet but no wifi. Flashing instructions are per the typical
process using xmodem in the bootloader. This and other things
are described here: https://openwrt.org/inbox/toh/bt/g-240g-e_1
In addition, a generic image is offered, this image can be loaded
into memory from within the bootloader and launched directly. It
is recommended on the wiki of G-240G-E and other EcoNet devices
to be used for backing up the flash before flashing OpenWRT.
Signed-off-by: Caleb James DeLisle <cjd@cjdns.fr>
Link: https://github.com/openwrt/openwrt/pull/20338
Signed-off-by: Hauke Mehrtens <hauke@hauke-m.de>
The #address-cells should be 1 according to the dt-binding document.
This patch fixes the following dtc warnings:
../dts/mt7621_gemtek_wvrtm-130acn.dts:46.4-14: Warning (reg_format): /pcie@1e140000/pcie@0,0/wifi@0,0/band@0:reg: property has invalid length (4 bytes) (#address-cells == 2, #size-cells == 0)
../dts/mt7621_gemtek_wvrtm-130acn.dts:54.4-14: Warning (reg_format): /pcie@1e140000/pcie@0,0/wifi@0,0/band@1:reg: property has invalid length (4 bytes) (#address-cells == 2, #size-cells == 0)
Signed-off-by: Shiji Yang <yangshiji66@outlook.com>
Link: https://github.com/openwrt/openwrt/pull/18242
Signed-off-by: Hauke Mehrtens <hauke@hauke-m.de>
Set the reg property value based on node name "pca9547@77". This
patch fixes the following dtc warning:
watchguard-firebox-m300.dts:364.14-366.5: Warning (i2c_bus_reg): /soc@ffe000000/i2c@118000/pca9547@77: missing or empty reg property
Signed-off-by: Shiji Yang <yangshiji66@outlook.com>
Link: https://github.com/openwrt/openwrt/pull/18242
Signed-off-by: Hauke Mehrtens <hauke@hauke-m.de>
Trim unnecessary 0s from the node name to fix the dtc warnings:
cn9131-puzzle-m901.dts:43.18-46.4: Warning (unit_address_format): /memory@00000000: unit name should not have leading 0s
cn9130-clearfog-pro.dts:33.18-36.4: Warning (unit_address_format): /memory@00000000: unit name should not have leading 0s
cn9132-puzzle-m902.dts:50.18-53.4: Warning (unit_address_format): /memory@00000000: unit name should not have leading 0s
armada-385-wd_cloud-mirror-gen2.dts:148.26-152.9: Warning (unit_address_format): /soc/internal-regs/nand-controller@d0000/nand@0/partitions/partition@00000000: unit name should not have leading 0s
armada-385-wd_cloud-mirror-gen2.dts:154.26-157.9: Warning (unit_address_format): /soc/internal-regs/nand-controller@d0000/nand@0/partitions/partition@00500000: unit name should not have leading 0s
armada-385-wd_cloud-mirror-gen2.dts:159.26-163.9: Warning (unit_address_format): /soc/internal-regs/nand-controller@d0000/nand@0/partitions/partition@00a00000: unit name should not have leading 0s
armada-385-wd_cloud-mirror-gen2.dts:165.26-168.9: Warning (unit_address_format): /soc/internal-regs/nand-controller@d0000/nand@0/partitions/partition@00f00000: unit name should not have leading 0s
Signed-off-by: Shiji Yang <yangshiji66@outlook.com>
Link: https://github.com/openwrt/openwrt/pull/18242
Signed-off-by: Hauke Mehrtens <hauke@hauke-m.de>
- Add the missing ranges property for PCIe bridge node.
- Correct the PCIe device node name.
This patch fix the following dtc warning:
../dts/bcm6328-dlink-dsl-2750b-b1.dts:203.9-220.4: Warning (pci_bridge): /ubus/pcie@10e40000/pcie@0: missing ranges for PCI bridge (or not a bridge)
Signed-off-by: Shiji Yang <yangshiji66@outlook.com>
Link: https://github.com/openwrt/openwrt/pull/18242
Signed-off-by: Hauke Mehrtens <hauke@hauke-m.de>
The DTC recommends using wifi@0,0 as the node name to match the reg
property structure. Fix warning:
../dts/qca9557_fortinet_fap-221-c.dts:208.13-213.4: Warning (pci_device_reg): /ahb/pcie@180c0000/wifi@0,0,0: PCI unit address format error, expected "0,0"
Signed-off-by: Shiji Yang <yangshiji66@outlook.com>
Link: https://github.com/openwrt/openwrt/pull/18242
Signed-off-by: Hauke Mehrtens <hauke@hauke-m.de>
rev B1 is identical to rev A1 except for different PHYs on the 2.5gbps ports (lan9 and lan10)
Both revisions of xgs1210-12 are also switched to use rt-loader to avoid
problems due to overwriting the compressed image in memory when flashing
with the oem firmware (and also to save flash space with respect to gzip
compression)
Signed-off-by: Josh Bendavid <joshbendavid@gmail.com>
Link: https://github.com/openwrt/openwrt/pull/20161
Signed-off-by: Hauke Mehrtens <hauke@hauke-m.de>
Both devices, the Linksys WHW01 and the VLP01, are essentially the same
device. Even Linksys provides only one image for both devices which uses
the WHW01 identifier in the image header.
Signed-off-by: Christoph Krapp <achterin@gmail.com>
Link: https://github.com/openwrt/openwrt/pull/20455
Signed-off-by: Robert Marko <robimarko@gmail.com>
This commit adds support for the Cisco Meraki MR30H. The MR30H is a POE
powered 802.11ac access point with an integrated 5 port Gigabit switch.
MR30H hardware info:
* CPU: Qualcomm IPQ4029
* RAM: 256MB DDR3
* Storage: 128 MB (S34ML01G200TFV00)
* Networking: QCA8075 internal switch (5x 1GbE ports)
* WiFi: QCA4019 802.11b/g/n/ac, QCA9889 802.11/b/g/n/ac scanning radio
* Serial: Internal header (J8, 2.54mm, populated)
LAN5 (rear) is for POE input. LAN4 has POE output (802.3af) when powered
by an 802.3at source.
The LAN4 port is used for tftp booting in U-Boot.
This device does not have secure boot, but cannot be flashed without
external programmers (TSOP48 NAND) as Meraki disabled interrupting U-Boot
for any device that updated after ~2017.
Disassembly:
* Remove the two T10 screws on the rear of the AP.
* Using a guitar pick or similar plastic tool, insert it on the side between
the grey metal plate and the white plastic body and pry up gently.
* The rubberised border on the metal plate does not need to be removed.
* The metal back plate has several latches around the perimeter (but none on
the bottom by the Ethernet ports).
* Once you have removed the metal back plate, push up gently on the bottom
Ethernet ports while pulling gently on the rear-mounted Ethernet port to remove
the PCB.
* The PCB should come free from the plastic housing, pull the bottom
(4 Ethernet ports) up as if you are opening a book.
* If done carefully, there is no need to remove the WiFi antenna connectors
to access the NAND flash.
* The TSOP48 NAND flash (U30, Spansion S34ML01G200TFV00) is located on the
opposite side of the PCB.
* To flash, you need to desolder the TSOP48 or use a 360 clip.
Installation:
The dumps to flash can be found in this repository:
https://github.com/halmartin/meraki-openwrt-docs/tree/main/mr30h
The device has the following flash layout (offsets with OOB data):
```
0x000000000000-0x000000100000 : "sbl1"
0x000000100000-0x000000200000 : "mibib"
0x000000200000-0x000000300000 : "bootconfig"
0x000000300000-0x000000400000 : "qsee"
0x000000400000-0x000000500000 : "qsee_alt"
0x000000500000-0x000000580000 : "cdt"
0x000000580000-0x000000600000 : "cdt_alt"
0x000000600000-0x000000680000 : "ddrparams"
0x000000700000-0x000000900000 : "u-boot"
0x000000900000-0x000000b00000 : "u-boot-backup"
0x000000b00000-0x000000b80000 : "ART"
0x000000c00000-0x000007c00000 : "ubi"
```
* Dump your original NAND (if using nanddump, include OOB data).
* Decompress `u-boot.bin.gz` dump from the GitHub repository above (dump
contains OOB data) and overwrite the `u-boot` portion of NAND from
`0x738000`-`0x948000` (length `0x210000`). Offsets here include OOB data.
* Resolder the NAND after overwriting the `u-boot` regions.
OpenWrt Installation:
* After flashing NAND with the external programmer. Plug an Ethernet
cable into port 4. Power up the device.
* The new U-Boot build uses the space character `" "` (without quotes) to
interrupt boot.
* Interrupt U-Boot and `tftpboot` the OpenWrt initramfs image from your
tftp server
```
dhcp
setenv serverip <your_tftp>
tftpboot openwrt-ipq40xx-generic-meraki_mr30h-initramfs-uImage.itb
```
* Once booted into the OpenWrt initramfs, `scp` the `sysupgrade` image to
the device and run the normal `sysupgrade` procedure:
```
scp -O openwrt-ipq40xx-generic-meraki_mr30h-squashfs-sysupgrade.bin root@192.168.1.1:/tmp/
ssh root@192.168.1.1 "sysupgrade -n /tmp/openwrt-ipq40xx-generic-meraki_mr30h-squashfs-sysupgrade.bin"
```
* OpenWrt should now be installed on the device.
Alternative installation steps if your device has U-Boot older than:
`U-Boot 2017.07-RELEASE-g78ed34f31579 (Sep 29 2017 - 07:43:44 -0700)`
**BIG FAT WARNING BEGIN**
Attmping to interrupt boot on a newer U-Boot release may permanently
brick your device! See: riptidewave93/LEDE-MR33#13
**BIG FAT WARNING END**
* Use `ubootwrite.py` from the above GitHub repository to transfer the
`u-boot.itb`
image to the router.
```
./ubootwrite.py --serial=/dev/ttyUSB0 --write u-boot.itb
```
* To avoid bricking your router, it is highly recommended at this point that
you flash the unlocked U-Boot to the `part.safe` ubi volume.
```
run set_ubi && ubi write $loadaddr part.safe 0x2fd48
```
* Power cycle the router. The stock Meraki U-Boot will boot `part.safe` which
is now the unlocked U-Boot.
* Use the new U-Boot build (`" "` to interrupt boot) to
`tftpboot` the OpenWrt initramfs image:
```
dhcp
setenv serverip <tftp_server_addr>
tftpboot openwrt-ipq40xx-generic-meraki_mr30h-initramfs-uImage.itb
bootm
```
* It is only recommended to flash U-Boot to the `u-boot` NAND region from
Linux:
```
insmod mtd-rw i_want_a_brick=1
```
* Copy `u-boot.elf` to the router:
```
scp -O u-boot.elf root@192.168.1.1:/tmp/
```
Note: If any of the below commands fails, YOU WILL HAVE A BRICK IF YOU
REBOOT OR LOSE POWER. Only a hardware programmer can recover the device.
```
flash_erase /dev/mtd8 0 0
nandwrite -p /dev/mtd8 /tmp/u-boot.elf
```
Note: ONLY use `u-boot.elf` when flashing the `u-boot` region (`/dev/mtd8`);
`u-boot.bin` or `u-boot.itb` will BRICK YOUR DEVICE
* `scp` the `sysupgrade` image to the device and run the normal `sysupgrade`
procedure:
```
scp -O openwrt-ipq40xx-generic-meraki_mr30h-squashfs-sysupgrade.bin root@192.168.1.1:/tmp/
ssh root@192.168.1.1 "sysupgrade -n /tmp/openwrt-ipq40xx-generic-meraki_mr30h-squashfs-sysupgrade.bin"
```
* OpenWrt should now be installed on the device.
Signed-off-by: Hal Martin <hal.martin@gmail.com>
Link: https://github.com/openwrt/openwrt/pull/17026
Signed-off-by: Robert Marko <robimarko@gmail.com>
This commit adds support for the Cisco Meraki Go GX20. The Go GX20 is a wired
router with 5 port Gigabit switch. It shares the same PCB as the Meraki Z3,
but without the WiFi radios.
GX20 hardware info:
* CPU: Qualcomm IPQ4029
* RAM: 512MB DDR3
* Storage: 128 MB (S34ML01G200TFV00)
* Networking: QCA8075 internal switch (5x 1GbE ports)
* USB: 1x USB3.0
* Serial: Internal header (J8, 2.54mm, populated)
Port 5 has POE output (802.3af). The Internet/WAN port is used for tftp booting
in U-Boot.
This device ships with secure boot, and cannot be flashed without
external programmers (TSOP48 NAND and I2C EEEPROM)!
Disassembly:
* Remove the four T8 screws on the bottom of the device under the rubber feet.
* Using a guitar pick or similar plastic tool, insert it on the side between
the bottom case and the side, pry up gently. The plastic bottom has several
latches around the perimeter (but none on the rear by the Ethernet ports).
* The TSOP48 NAND flash (U30, Spansion S34ML01G200TFV00) is located on the
bottom side of the PCB (facing you as you remove the bottom plastic).
To flash, you will need to desolder the TSOP48. Attempts to flash in-circuit
using a 360 clip were unsuccessful.
* The SOIC8 I2C EEPROM (U32, Atmel 24C64) is located on the bottom side of
the PCB (facing you as you remove the bottom plastic). It can be flashed in
circuit using a SOIC8 chip clip.
Installation:
The dumps to flash can be found in this repository:
https://github.com/halmartin/meraki-openwrt-docs/tree/main/z3_gx20
The device has the following flash layout (offsets with OOB data):
```
0x000000000000-0x000000100000 : "sbl1"
0x000000100000-0x000000200000 : "mibib"
0x000000200000-0x000000300000 : "bootconfig"
0x000000300000-0x000000400000 : "qsee"
0x000000400000-0x000000500000 : "qsee_alt"
0x000000500000-0x000000580000 : "cdt"
0x000000580000-0x000000600000 : "cdt_alt"
0x000000600000-0x000000680000 : "ddrparams"
0x000000700000-0x000000900000 : "u-boot"
0x000000900000-0x000000b00000 : "u-boot-backup"
0x000000b00000-0x000000b80000 : "ART"
0x000000c00000-0x000007c00000 : "ubi"
```
* Dump your original NAND (if using nanddump, include OOB data).
* Decompress `u-boot.bin.gz` dump from the GitHub repository above (dump
contains OOB data) and overwrite the `u-boot` portion of NAND from
`0x738000`-`0x948000` (length `0x210000`). Offsets here include OOB data.
* Decompress `ubi.bin.gz` dump from the GitHub repository above (dump
contains OOB data) and overwrite the `ubi` portion of NAND from
`0xc60000`-`0x8400000` (length `0x77a0000`). Offsets here include OOB data.
* Dump your original EEPROM. Change the byte at offset `0x49` to `0x1e`
(originally `0x2b`). Remember to re-write the EEPROM with the modified data.
* This can be done on Linux via the following command:
`printf "\x1e" | dd of=/tmp/eeprom.bin bs=1 seek=$((0x49)) conv=notrunc`
**Note**: the device will not boot if you modify the board major number and
have not yet overwritten the `ubi` and `u-boot` regions of NAND.
* Resolder the NAND after overwriting the `u-boot` and `ubi` regions.
OpenWrt Installation:
* After flashing NAND and EEPROM with external programmers. Plug an Ethernet
cable into the Internet/WAN port. Power up the device.
* The new U-Boot build uses the space character `" "` (without quotes) to
interrupt boot.
* Interrupt U-Boot and `tftpboot` the OpenWrt initramfs image from your
tftp server
```
dhcp
setenv serverip <your_tftp>
tftpboot openwrt-ipq40xx-generic-meraki_gx20-initramfs-uImage.itb
```
* Once booted into the OpenWrt initramfs, `scp` the `sysupgrade` image to
the device and run the normal `sysupgrade` procedure:
```
scp -O openwrt-ipq40xx-generic-meraki_gx20-squashfs-sysupgrade.bin root@192.168.1.1:/tmp/
ssh root@192.168.1.1 "sysupgrade -n /tmp/openwrt-ipq40xx-generic-meraki_gx20-squashfs-sysupgrade.bin"
```
* OpenWrt should now be installed on the device.
Signed-off-by: Hal Martin <hal.martin@gmail.com>
Link: https://github.com/openwrt/openwrt/pull/17026
Signed-off-by: Robert Marko <robimarko@gmail.com>
This commit adds support for the Cisco Meraki Z3. The Z3 is a "teleworker"
device with 802.11ac and an integrated 5 port Gigabit switch.
Z3 hardware info:
* CPU: Qualcomm IPQ4029
* RAM: 512MB DDR3
* Storage: 128 MB (S34ML01G200TFV00)
* Networking: QCA8075 internal switch (5x 1GbE ports)
* WiFi: QCA4019 802.11b/g/n/ac
* USB: 1x USB3.0
* Serial: Internal header (J8, 2.54mm, populated)
Port 5 has POE output (802.3af). The Internet/WAN port is used for tftp booting
in U-Boot.
This device ships with secure boot, and cannot be flashed without
external programmers (TSOP48 NAND and I2C EEEPROM)!
Disassembly:
* Remove the four T8 screws on the bottom of the device under the rubber feet.
* Using a guitar pick or similar plastic tool, insert it on the side between
the bottom case and the side, pry up gently. The plastic bottom has several
latches around the perimeter (but none on the rear by the Ethernet ports).
* The TSOP48 NAND flash (U30, Spansion S34ML01G200TFV00) is located on the
bottom side of the PCB (facing you as you remove the bottom plastic).
To flash, you will need to desolder the TSOP48. Attempts to flash in-circuit
using a 360 clip were unsuccessful.
* The SOIC8 I2C EEPROM (U32, Atmel 24C64) is located on the bottom side of
the PCB (facing you as you remove the bottom plastic). It can be flashed in
circuit using a SOIC8 chip clip.
Installation:
The dumps to flash can be found in this repository:
https://github.com/halmartin/meraki-openwrt-docs/tree/main/z3_gx20
The device has the following flash layout (offsets with OOB data):
```
0x000000000000-0x000000100000 : "sbl1"
0x000000100000-0x000000200000 : "mibib"
0x000000200000-0x000000300000 : "bootconfig"
0x000000300000-0x000000400000 : "qsee"
0x000000400000-0x000000500000 : "qsee_alt"
0x000000500000-0x000000580000 : "cdt"
0x000000580000-0x000000600000 : "cdt_alt"
0x000000600000-0x000000680000 : "ddrparams"
0x000000700000-0x000000900000 : "u-boot"
0x000000900000-0x000000b00000 : "u-boot-backup"
0x000000b00000-0x000000b80000 : "ART"
0x000000c00000-0x000007c00000 : "ubi"
```
* Dump your original NAND (if using nanddump, include OOB data).
* Decompress `u-boot.bin.gz` dump from the GitHub repository above (dump
contains OOB data) and overwrite the `u-boot` portion of NAND from
`0x738000`-`0x948000` (length `0x210000`). Offsets here include OOB data.
* Decompress `ubi.bin.gz` dump from the GitHub repository above (dump
contains OOB data) and overwrite the `ubi` portion of NAND from
`0xc60000`-`0x8400000` (length `0x77a0000`). Offsets here include OOB data.
* Dump your original EEPROM. Change the byte at offset `0x49` to `0x1e`
(originally `0x24`). Remember to re-write the EEPROM with the modified data.
* This can be done on Linux via the following command:
`printf "\x1e" | dd of=/tmp/eeprom.bin bs=1 seek=$((0x49)) conv=notrunc`
**Note**: the device will not boot if you modify the board major number and
have not yet overwritten the `ubi` and `u-boot` regions of NAND.
* Resolder the NAND after overwriting the `u-boot` and `ubi` regions.
OpenWrt Installation:
* After flashing NAND and EEPROM with external programmers. Plug an Ethernet
cable into the Internet/WAN port. Power up the device.
* The new U-Boot build uses the space character `" "` (without quotes) to
interrupt boot.
* Interrupt U-Boot and `tftpboot` the OpenWrt initramfs image from your
tftp server
```
dhcp
setenv serverip <your_tftp>
tftpboot openwrt-ipq40xx-generic-meraki_z3-initramfs-uImage.itb
```
* Once booted into the OpenWrt initramfs, created the `ART` ubivol with
the WiFi radio calibration from the mtd partition:
```
cat /dev/mtd10 > /tmp/ART.bin
ubimkvol /dev/ubi0 -N ART -s 524288
ubiupdatevol /dev/ubi0_1 /tmp/ART.bin
```
* `scp` the `sysupgrade` image to
the device and run the normal `sysupgrade` procedure:
```
scp -O openwrt-ipq40xx-generic-meraki_z3-squashfs-sysupgrade.bin root@192.168.1.1:/tmp/
ssh root@192.168.1.1 "sysupgrade -n /tmp/openwrt-ipq40xx-generic-meraki_z3-squashfs-sysupgrade.bin"
```
* OpenWrt should now be installed on the device.
Signed-off-by: Hal Martin <hal.martin@gmail.com>
Link: https://github.com/openwrt/openwrt/pull/17026
Signed-off-by: Robert Marko <robimarko@gmail.com>
whw01 was incorrectly placed below whw03 definitions.
Signed-off-by: Christoph Krapp <achterin@gmail.com>
Link: https://github.com/openwrt/openwrt/pull/20441
Signed-off-by: Robert Marko <robimarko@gmail.com>
This adds led aliases for failsafe and upgrade. Before this change the
leds stayed dark in both situations.
Signed-off-by: Christoph Krapp <achterin@gmail.com>
Link: https://github.com/openwrt/openwrt/pull/20441
Signed-off-by: Robert Marko <robimarko@gmail.com>
Set the label-mac-device to be able to easily fetch the mac-address of
the device, which is printed on the bottom of the case.
While at it, remove the TODO - the ethernet0 alias is needed to get the
mac from bootloader.
Signed-off-by: Christoph Krapp <achterin@gmail.com>
Link: https://github.com/openwrt/openwrt/pull/20441
Signed-off-by: Robert Marko <robimarko@gmail.com>
kernel 6.9 removed the KConfig entry our RouterBOOT watchdog pet hack was relying on:
Linux df59427a1122 ("ARM: qcom: merge remaining subplatforms into sensible Kconfig entry")
Introduce a new specific KConfig entry for this hack,
and enable it for Mikrotik ipq40xx kernel.
CONFIG_ARCH_QCOM_IPQ40XX_BOOT_COMPRESSED_PET_WATCHDOG_EARLY
With appropriate DEBUG_LL and DEBUG_UNCOMPRESS, this watchdog reset
can be typically seen on console as a reset before "Uncompressing Linux..."
reaches " done, booting the kernel."
RouterBOOT
loading kernel... OK
setting up elf image... OK
jumping to kernel code
Jumping to kernel
DTB:0x80381A60 (0x000048C4)
C:0x800000E0-0x80386420->0x80FAB500-0x81331840
DTB:0x8132CE80 (0x000049B8)
Uncompressing Linux...
Format: Log Type - Time(microsec) - Message - Optional Info
Log Type: B - Since Boot(Power On Reset), D - Delta, S - Statistic
S - QC_IMAGE_VERSION_STRING=BOOT.BF.3.1.1-00096
versus:
Uncompressing Linux... done, booting the kernel.
[ 0.000000] Booting Linux on physical CPU 0x0
On Mikrotik RouterBOOT devices, this is complicated by some RouterBOOT
versions successfully loading the same kernel that other RouterBOOT versions fail. Example:
RouterBOOT backup booter 6.45.9 fine, RouterBOOT booter 7.16 fail
Fixes: openwrt#19841
Signed-off-by: John Thomson <git@johnthomson.fastmail.com.au>
Link: https://github.com/openwrt/openwrt/pull/20305
Signed-off-by: Robert Marko <robimarko@gmail.com>
The imagebuilder is not intended to build initramfs images. Some
profiles attempt to do this and succeed, due to buildroot leaking
the initramfs-kernel into staging_dir; others attempt it, but fail
due to not having initramfs binaries present in the imagebuilder.
Fix this by adding an explict guard around the unsupported generation
of the initramfs images. This saves space and time during imagebuilder
runs, fixes those that are currently broken and protects against future
breakage for profiles that inadvertently work now.
Fixes: https://github.com/openwrt/openwrt/issues/20151
Signed-off-by: Eric Fahlgren <ericfahlgren@gmail.com>
Link: https://github.com/openwrt/openwrt/pull/20347
Signed-off-by: Robert Marko <robimarko@gmail.com>
CONFIG_MTD_CFI was disabled in p1010 subtarget.
It causes problem with Aerohive BR200-WP router.
This patch enables CONFIG_MTD_CFI in p1010 config-default file.
Fixes: e9dd6da916 ("mpc85xx: p1010: add missing symbols")
Signed-off-by: Pawel Dembicki <paweldembicki@gmail.com>
Link: https://github.com/openwrt/openwrt/pull/20419
Signed-off-by: Nick Hainke <vincent@systemli.org>
The DSA driver must flush the HW FDB when a port changes from
learning/forwarding to disabled/blocking/listening.
But the implementation for RTL931x was writing the port information
starting at bit 11 (bit 11 of the second 32-bit L2_TBL_FLUSH_CTRL
register). But this offset is the AGG_VID and not the port. The actual
position is 43 (bit 11 of the first register).
As result, the FDB was always only flushed for the port 0 and not for the
selected port.
Fixes: 9ed6097054 ("realtek: Add HW support for RTL931X for PIE, L2 and STP aging")
Signed-off-by: Sven Eckelmann <se@simonwunderlich.de>
Link: https://github.com/openwrt/openwrt/pull/20422
Signed-off-by: Robert Marko <robimarko@gmail.com>
the eth1 interface was renamed to wan so also reflect that change in
the leds setup script
Fixes: f26260c7e7 ("mediatek: filogic: Add label wan and cpu for Zyxel EX5601-T0")
Signed-off-by: Andrew Sim <andrewsimz@gmail.com>
Link: https://github.com/openwrt/openwrt/pull/20120
Signed-off-by: Nick Hainke <vincent@systemli.org>
BPDU frames like STP must be processed by each switch (bridge) which
supports STP. It must not be forwarded to avoid confusing the STP state of
other STP participants. It is essential to be an active participant of STP.
The software bridge automatically takes care of forwarding the BPDUs to
other ports when STP is disabled and the hardware switch should not
interfere.
Signed-off-by: Harshal Gohel <hg@simonwunderlich.de>
Signed-off-by: Sven Eckelmann <se@simonwunderlich.de>
Link: https://github.com/openwrt/openwrt/pull/20414
Signed-off-by: Robert Marko <robimarko@gmail.com>
With this patch is set the maximum number of connections per ip address instead of no control.
The default is 8.
Signed-off-by: Andrea Pesaresi <andreapesaresi82@gmail.com>
Link: https://github.com/openwrt/openwrt/pull/20377
Signed-off-by: Hauke Mehrtens <hauke@hauke-m.de>
backport from kernel 6.12
ksmbd.mount will give each interfaces list and bind_interfaces_only flags
to ksmbd server. Previously, the interfaces list was sent only
when bind_interfaces_only was enabled.
ksmbd server browse only interfaces list given from ksmbd.conf on
FSCTL_QUERY_INTERFACE_INFO IOCTL.
Signed-off-by: Andrea Pesaresi <andreapesaresi82@gmail.com>
Link: https://github.com/openwrt/openwrt/pull/20377
Signed-off-by: Hauke Mehrtens <hauke@hauke-m.de>
This patch resolves the LAN port not initializing on the
FriendlyElec NanoPI R4S, especially during warm reboots.
Upstream commit patch is based on:
c3fe7071e1
I've experienced the LAN port failing to initialize from a cold boot and
after a reboot. Other users have reported this issue on
https://forum.openwrt.org/t/nanopi-r4s-rk3399-is-a-great-new-openwrt-device/79143.
The NanoPI R4S has its LAN port connected to the RK3399 via PCIE. Since the
PCIE lanes don't initialize correctly after reboot, the LAN port
doesn't initialize.
Signed-off-by: Timothy Feierabend <tim.feierabend@gmail.com>
Link: https://github.com/openwrt/openwrt/pull/20406
Signed-off-by: Nick Hainke <vincent@systemli.org>
Now that we have a board file, add calibration variant for TP-Link
Archer C59 v1 and add ipq-wifi package for it.
Tested-by: Mateusz Jończyk <matjon@users.noreply.github.com>
Signed-off-by: Christoph Krapp <achterin@gmail.com>
Link: https://github.com/openwrt/openwrt/pull/20401
Signed-off-by: Robert Marko <robimarko@gmail.com>
Commit 468975a985 changed the XO board clock definition from a fixed
clock to a fixed rate clock in the dtsi.
As such, boards must use clock dividers and multipliers to calculate
the clock rate based on the referenced parent clock.
Fixes: 5d2994a73e ("qualcommax: ipq50xx: Add support for Yuncore AX850")
Signed-off-by: George Moussalem <george.moussalem@outlook.com>
Link: https://github.com/openwrt/openwrt/pull/20405
Signed-off-by: Robert Marko <robimarko@gmail.com>
Fix a regression introduced by a recent commit.
It looks like a copy/paste error.
Add the missing line which defines the 'board' val
as it does not exist otherwise in the case check.
This fixes sysupgrade on ath79 MikroTik non-NOR boards.
Fixes: 318f07c231 ("ath79: mikrotik: check RouterBOOT version matching sysupgrade image")
Signed-off-by: Koen Vandeputte <koen.vandeputte@citymesh.com>
Add pending patch to address PCI sysfs creation entry race observed on
ipq806x. This is to handle a kernel warning on creating the same sysfs
entry multiple times.
All affected patch automatically refreshed.
Link: https://github.com/openwrt/openwrt/pull/18989
Signed-off-by: Christian Marangi <ansuelsmth@gmail.com>
Adapt OPP patch with upstream changes to cpufreq driver. Use the krait
compatible and the new opp-supported-hw way instead of deleting nodes.
Link: https://github.com/openwrt/openwrt/pull/18989
Signed-off-by: Christian Marangi <ansuelsmth@gmail.com>
The 6.12 testing kernel for ipq806x target is ready now.
Signed-off-by: Shiji Yang <yangshiji66@outlook.com>
Link: https://github.com/openwrt/openwrt/pull/18989
Signed-off-by: Christian Marangi <ansuelsmth@gmail.com>
- Reuse the bridges node defined on "qcom-ipq8064.dtsi".
- Rename PCIe device nodes to unified "wifi@0,0".
- Add the missing "qcom,ath10k" compatibles.
- Remove unseless property "interrupt-controller". There are no
consumers use these PCIe devices as interrupt controllers.
- Change bus number from 0 to 1, just like other ipq806x devices.
The valid PCIe bus range on this platform is 1 - 255.
Signed-off-by: Shiji Yang <yangshiji66@outlook.com>
Link: https://github.com/openwrt/openwrt/pull/18989
Signed-off-by: Christian Marangi <ansuelsmth@gmail.com>
Add bridge node labels so that we can insert PCIe peripheral nodes.
Signed-off-by: Shiji Yang <yangshiji66@outlook.com>
Link: https://github.com/openwrt/openwrt/pull/18989
Signed-off-by: Christian Marangi <ansuelsmth@gmail.com>
Copy patches and kernel configs from 6.12 kernel to restore the
default 6.6 kernel support files.
Signed-off-by: Shiji Yang <yangshiji66@outlook.com>
Link: https://github.com/openwrt/openwrt/pull/18989
Signed-off-by: Christian Marangi <ansuelsmth@gmail.com>
This is a preparation for 6.12 kernel support. It can help us
track the patches and Kconfig history by using the Git tool.
Signed-off-by: Shiji Yang <yangshiji66@outlook.com>
Link: https://github.com/openwrt/openwrt/pull/18989
Signed-off-by: Christian Marangi <ansuelsmth@gmail.com>
This is a preparation for introducing the 6.12 kernel support.
All configs are automatically refreshed. In theory, they will
generate the same .config files in the kernel build directory
as before.
Signed-off-by: Shiji Yang <yangshiji66@outlook.com>
Link: https://github.com/openwrt/openwrt/pull/18989
Signed-off-by: Christian Marangi <ansuelsmth@gmail.com>
Right now the phylink capability function enables 2.5G and 10G modes on
Maple and Cypress, which they mostly (other than two SERDES on Cypress)
don't support. This causes these modes to be selected and break the link
as they are not supported by hardware.
I looked into doing this properly, but it cannot just be done based on
SoC, but needs to take the whole topology into account as a given MAC
might have very different capabilities depending on what SERDES are
assigned to it. So for now just use 1G and QSGMII for RTL83xx and 10G
for RTL93xx. This mostly works, except it will downgrade some 10G links
on RTL839x, but since there are also 1G SFPs on these this cannot be
solved without fully accounting for the global MAC and SERDES
configuration.
So this makes all of the 1G SFP slots work again, while keeping most of
the 10G SFP+ slots working at 10G with minimal changes.
Signed-off-by: Lorenz Brun <lorenz@brun.one>
Link: https://github.com/openwrt/openwrt/pull/20374
Signed-off-by: Hauke Mehrtens <hauke@hauke-m.de>
If the devicetree contains the appropriate nodes to configure the MAC
addresses for each physical DSA port, then these MAC addresses must be used
in OpenWrt and not some automatically generated ones. Otherwise the device
often ends up with addresses which are locally administered and not
matching any expected port-to-MAC scheme.
Devices which only get the MAC address for eth0 must still auto-generate
these MAC addresses until the devicetree was updated to also include the
correct ones.
Signed-off-by: Sven Eckelmann <se@simonwunderlich.de>
Link: https://github.com/openwrt/openwrt/pull/20241
Signed-off-by: Hauke Mehrtens <hauke@hauke-m.de>
If the lan_mac cannot be found, it is still used (as empty string) in
various operations. This is not valid and other 02_network scripts checking
for a non-empty string before using it. This should also be adopted for the
realtek 02_network.
Signed-off-by: Sven Eckelmann <se@simonwunderlich.de>
Link: https://github.com/openwrt/openwrt/pull/20241
Signed-off-by: Hauke Mehrtens <hauke@hauke-m.de>
Having everything in a big script without any structure makes it
unnecessary hard to get an overview or modify it without triggering
unexpected side effects.
Signed-off-by: Sven Eckelmann <se@simonwunderlich.de>
Link: https://github.com/openwrt/openwrt/pull/20241
Signed-off-by: Hauke Mehrtens <hauke@hauke-m.de>
The preferred prefix for the Realtek DSA driver code is "rtldsa" and no
longer "rtl83xx". This makes sure that the different drivers have
non-conflicting prefixes and because of this non-conflicting function
names.
Suggested-by: Felix Baumann <felix.bau@gmx.de>
Signed-off-by: Sven Eckelmann <se@simonwunderlich.de>
Link: https://github.com/openwrt/openwrt/pull/20360
Signed-off-by: Robert Marko <robimarko@gmail.com>
The RTL930x and the RTL931x SoC families share the same struct
dsa_switch_ops. This should be represented in the name of the object.
Suggested-by: Felix Baumann <felix.bau@gmx.de>
Signed-off-by: Sven Eckelmann <se@simonwunderlich.de>
Link: https://github.com/openwrt/openwrt/pull/20360
Signed-off-by: Robert Marko <robimarko@gmail.com>
If two ports are in isolation mode then these ports are not supposed to be
able to communicate between each other. This can be achieved in the realtek
switch by removing the other isolated port(s) from the port list of an
isolated port.
Signed-off-by: Sven Eckelmann <se@simonwunderlich.de>
Link: https://github.com/openwrt/openwrt/pull/20360
Signed-off-by: Robert Marko <robimarko@gmail.com>
The realtek driver is now in full control of the port matrix. It doesn't
need to rely on the current state of the HW to adjust it. The new port
matrix is calculated automatically using rtldsa_update_port_member() and
then written to the registers/tables.
Signed-off-by: Sven Eckelmann <se@simonwunderlich.de>
Link: https://github.com/openwrt/openwrt/pull/20360
Signed-off-by: Robert Marko <robimarko@gmail.com>
It is not necessary to read the back the current port members for a
specific port for enabling/disabling a port. All these members which are
expected to be in the HW port matrix of an active port are already stored
in the port specific member "pm".
And when a port is disabled, the port must no longer forwarding traffic to
any other port. Just writing 0 to the members is therefore good enough and
no read-back of the old HW state is necessary.
Signed-off-by: Sven Eckelmann <se@simonwunderlich.de>
Link: https://github.com/openwrt/openwrt/pull/20360
Signed-off-by: Robert Marko <robimarko@gmail.com>
The leave and join callbacks for DSA were using their own implementation of
the port member handling code. This makes the implementation of additional
functionality based on the port member matrix complicated because it needs
to be implemented in both places and also in the new code path for the
introduced feature.
By sharing this code, it is much easier to guarantee that all code paths
behave the same. This approach is already implemented by other DSA drivers
like qca8k, mt7530 or ksz.
Signed-off-by: Sven Eckelmann <se@simonwunderlich.de>
Link: https://github.com/openwrt/openwrt/pull/20360
Signed-off-by: Robert Marko <robimarko@gmail.com>
Add a callback for a serdes setup function to rtpcs_cfg to allow each
SoC variant to define its own SerDes setup routine.
Call the setup_serdes operation in pcs_config if it is defined.
Signed-off-by: Jonas Jelonek <jelonek.jonas@gmail.com>
Link: https://github.com/openwrt/openwrt/pull/20352
Signed-off-by: Robert Marko <robimarko@gmail.com>
Add more SerDes access helpers for the upcoming code import from PHY
driver. There, similar helpers are used to read and write full SerDes
registers or only parts of them (aka bitfields).
The helpers are expected to replace the following used in PHY SerDes
code:
- rtl9300_sds_field_r
- rtl9300_sds_field_w
- rtsds_931x_read
- rtsds_931x_read_field
- rtsds_931x_write
- rtsds_931x_write_field
Mark the helpers as unused for now to make the compiler happy. This will
be removed as soon as they are used.
Signed-off-by: Jonas Jelonek <jelonek.jonas@gmail.com>
Link: https://github.com/openwrt/openwrt/pull/20352
Signed-off-by: Robert Marko <robimarko@gmail.com>
This driver is required for the serial port on headless embedded AMD Ryzen
Embedded V3000 devices such as the SolidRun BEDROCK V3000.
Signed-off-by: Patrick Oppenlander <patrick.oppenlander@gmail.com>
Link: https://github.com/openwrt/openwrt/pull/20353
Signed-off-by: Robert Marko <robimarko@gmail.com>
There are two spi drivers for en7523/an7581/an7583:
* en7581-snand (spi-airoha-snfi.c)
* en7523-spi (spi-en7523.c)
The first one supports DMA, but until recently it has several nasty
issues. The second do things properly but does not support DMA.
Recently the first driver was greatly improved, so there is no sence
keep both drivers anymore.
This patch removes en7523-spi driver and use DMA capable driver instead.
Unfortunately there is a nasty en7523 specific issue.
We found that some serial console may pull TX line to GROUND during board
boot time. Airoha uses TX line as one of it's BOOT pins. This will lead
to booting in RESERVED boot mode. It was found that some flashes operates
incorrectly in RESERVED mode if DMA used.
This patch also adds a hack that turns off DMA and prints big fat warning
if booting in reserved mode was detected. This slow down flash operations
but does not kill your data.
Signed-off-by: Mikhail Kshevetskiy <mikhail.kshevetskiy@iopsys.eu>
Link: https://github.com/openwrt/openwrt/pull/20365
Signed-off-by: Robert Marko <robimarko@gmail.com>
This allows us use more easily port en7581 drivers to en7523.
Signed-off-by: Mikhail Kshevetskiy <mikhail.kshevetskiy@iopsys.eu>
Link: https://github.com/openwrt/openwrt/pull/20365
Signed-off-by: Robert Marko <robimarko@gmail.com>
This patch series removes dirty hack that reads flash page settings from
SNFI registers during driver startup.
Before these patches the airoha spi snfi driver needs to know spinand
flash page size. The driver can't get it from spinand subsystem, so the
following approach was implemented:
* bootloader know the flash page size (and some other parameters)
* to operate properly the bootloader writes flash page size (and some
other parameters) to SNFI registers
* bootloader starts linux
* after linux start SNFI registers keeps the values stored by bootloader
* linux snfi driver reads flash parameters from SNFI registers.
This works, but we can do better. It has been proven that flash page size
is actually unnecessary. We can get all required data from dirmap requests.
This patch series drops the hack and do things properly.
Signed-off-by: Mikhail Kshevetskiy <mikhail.kshevetskiy@iopsys.eu>
Link: https://github.com/openwrt/openwrt/pull/20295
Signed-off-by: Robert Marko <robimarko@gmail.com>
This patch series greatly improve airoha snfi driver and fix a
number of serious bugs.
Fixed bugs:
* Fix reading/writing of flashes with more than one plane per lun
* Fill the buffer with 0xff before writing
* Fix reading of flashes supporting continuous reading mode
* Fix error paths
Improvements:
* Add support of dual/quad wires spi modes in exec_op(). This also
fix flash reading/writing if dirmap can't be created.
* Support of dualio/quadio flash reading commands
Signed-off-by: Mikhail Kshevetskiy <mikhail.kshevetskiy@iopsys.eu>
Link: https://github.com/openwrt/openwrt/pull/20295
Signed-off-by: Robert Marko <robimarko@gmail.com>
Continuous reading mode is broken for some spi controllers. There are two
possible bug scenarios:
1) "continuous mode" flash and spi controller without dirmap support,
but with restriction on transfer length in adjust_op_size()
2) "continuous mode" flash and spi controller with dirmap support for a
single flash page
In the first case, any read that exceeds the limit specified in adjust_op_size()
will result in an EIO error. The limit may even be less than a size of a single
flash page. In this case, any read will result in an error.
In the second case, any read larger than flash page size will result in an EIO
error or spinand driver spoofing (because the spi controller driver returns
more bytes than were actually read).
This patch series tries to fix continuous reading (spinand driver side).
Unfortunately these fixes can't resolve "spinand driver spoofing" case.
Spi controller drivers might need fixes as well.
Signed-off-by: Mikhail Kshevetskiy <mikhail.kshevetskiy@iopsys.eu>
Link: https://github.com/openwrt/openwrt/pull/20295
Signed-off-by: Robert Marko <robimarko@gmail.com>
Should be reset-gpio. Also added GPIO_ACTIVE_HIGH for clarity.
Signed-off-by: Rosen Penev <rosenp@gmail.com>
Link: https://github.com/openwrt/openwrt/pull/20116
Signed-off-by: Robert Marko <robimarko@gmail.com>
The former is deprecated. Fixes dtc warning.
Signed-off-by: Rosen Penev <rosenp@gmail.com>
Link: https://github.com/openwrt/openwrt/pull/20116
Signed-off-by: Robert Marko <robimarko@gmail.com>
The former is deprecated. Fixes dtc warning.
Signed-off-by: Rosen Penev <rosenp@gmail.com>
Link: https://github.com/openwrt/openwrt/pull/20116
Signed-off-by: Robert Marko <robimarko@gmail.com>
The former is deprecated. Fixes dtc warning.
Signed-off-by: Rosen Penev <rosenp@gmail.com>
Link: https://github.com/openwrt/openwrt/pull/20116
Signed-off-by: Robert Marko <robimarko@gmail.com>
The former is deprecated. Fixes dtc warning.
Signed-off-by: Rosen Penev <rosenp@gmail.com>
Link: https://github.com/openwrt/openwrt/pull/20116
Signed-off-by: Robert Marko <robimarko@gmail.com>
The latter is more descriptive in terms of what's going on.
Mostly found with
git grep gpios\ | grep 0\>
git grep gpios\ | grep 1\>
Signed-off-by: Rosen Penev <rosenp@gmail.com>
Link: https://github.com/openwrt/openwrt/pull/20116
Signed-off-by: Robert Marko <robimarko@gmail.com>
The former is deprecated. Fixes dtc warning.
Signed-off-by: Rosen Penev <rosenp@gmail.com>
Link: https://github.com/openwrt/openwrt/pull/20116
Signed-off-by: Robert Marko <robimarko@gmail.com>
In the conversion to nvmem of eax500 and unifi-ac-hd, the address was
set to 0 as is the case with most platforms, but not this one.
The wifi node also needs to be wrapped in a bridge node.
Matches every other device in ipq806x.
Fixes: 148f82ad45 ("ipq806x: use nvmem for wifi mac")
Signed-off-by: Rosen Penev <rosenp@gmail.com>
Link: https://github.com/openwrt/openwrt/pull/20325
Signed-off-by: Robert Marko <robimarko@gmail.com>
This patch adds support for Cudy C200P.
Specifications:
SoC: MediaTek MT7621AT
RAM: 256 MB (DDR3)
Flash: 16 MB (NOR)
POE Chip: IP804AR
Interfaces:
Switch: 1 WAN, 4 LAN (Gigabit)
Gigabit RJ45 PoE Ports on 2~5
Max Power on a Single PoE Ports 30W
PoE Ports : The PoE ports comply with IEEE 802.3at/af standards.
Ports: 1 USB-A 3.0 Ports
LED:
System
PoE Max Status
Link/ACT/PoE Status of Each PoE Port
Physical Buttons:
Reset Button
Power Input:
DC Jack
Power Methods:
DC: 54V 1.11A
802.3at/af PoE
Passive PoE: 24/48V
Max Power Consumption (W):
Total: 60W
PoE: 55W
PoE (when USB Device is plugged in): 50W
No PoE: 5W
Installation:
To install OpenWRT, you need the intermediate firmware from Cudy. (U-boot is locked). After installing the intermediate firmware, you can install OpenWRT via sysupgrade.
Recovery:
TFTP available.
1. Place the recovery.bin in the serving directory of your TFTP server.
2. Set your IP to 192.168.1.88/24.
3. Press the “Reset” button of Cudy router and hold it. Before the Cudy router is powered on and before TFTP start to download the firmware, don't release the “Reset” button.
4. Power on the Cudy router.
5. You can release the reset button only when TFTP starts downloading firmware.
6. When the SYSTEM LED turns solid green, the upgrade is complete.
Serial:
1. Serial connection parameters: 115200 / 8N1
2. Serial connection voltage: 3.3V
PoE is not supported at the time of PR. The IP804R chip is not yet supported by OpenWRT.
Signed-off-by: Marcin Leksmark <lexmark3200@wp.pl>
Link: https://github.com/openwrt/openwrt/pull/20165
Signed-off-by: Hauke Mehrtens <hauke@hauke-m.de>
The A1 and B1 devices are largely the same. The differences
seem to be:
- RTL8218D (A1) vs RTL8218E (B1) PHY for the eight 1 Gbps TP ports
- Aquantia (A1) vs RTL8261N (B1) PHY for the three 10 Gbps TP ports
RTL8218D/E share the same driver and support was added already by
commit c8c187f0f0 ("realtek: add support for RTL8218E").
The RTL8261N is also already supported but it's located at
different addresses compared to the A1 device. This requires
the device tree to be split. As a result, the devices are require
different images.
I found the smi addresses on the forum:
https://forum.openwrt.org/t/support-for-rtl838x-based-managed-switches/57875/3622
And I can conform on my B1 device that this is working.
Co-developed-by: Mathias Kresin <dev@kresin.me>
Signed-off-by: Thomas Martitz <thomas.martitz@mailbox.org>
Link: https://github.com/openwrt/openwrt/pull/20150
Signed-off-by: Hauke Mehrtens <hauke@hauke-m.de>
There are switches which share the same overall hardware design but remove
just a couple of components for the low cost variant. For example, a 8+2
(ethernet+SFP) switch might have a low cost variant which only has 8
ethernet ports. In this case, the PCB will be shared but components for SFP
will just be dropped.
The LED shift registers will be the same between the two switches but the
ports are different. But since the rtl930x_led_init code is trying to
calculate the number of LEDs using the LED ports, the ethernet status ports
will then suddenly be shifted by two ports.
It is therefore necessary to have a mechanism to overwrite the detection of
the ethernet ports in the LED initialization and force some ports to
"virtually there" for the LED controller.
This functionality was already implemented for Plasma Cloud PSX8 (RTL930x)
but some devices using RTL931x might also benefit from a similar feature.
Signed-off-by: Harshal Gohel <hg@simonwunderlich.de>
Co-developed-by: Sven Eckelmann <se@simonwunderlich.de>
Signed-off-by: Sven Eckelmann <se@simonwunderlich.de>
Link: https://github.com/openwrt/openwrt/pull/20300
Signed-off-by: Hauke Mehrtens <hauke@hauke-m.de>
The LED sets must be configured before per-port LEDs are actually assigned.
At the same time, the LED set configuration was basically unreadable and
the RTL930x from commit 2cfb1ecf10 ("rtl930x: Rework per port LED
configuration") does a better job. Instead of moving the old implementation
around, just adopt the one from RTL930x.
Signed-off-by: Harshal Gohel <hg@simonwunderlich.de>
Signed-off-by: Sven Eckelmann <se@simonwunderlich.de>
Link: https://github.com/openwrt/openwrt/pull/20300
Signed-off-by: Hauke Mehrtens <hauke@hauke-m.de>
RTL930x received support for specifying active low/high LEDs in commit
bec9e79a99 ("realtek: dsa: support active-high LEDs"). But this was
completely forgotten on RTL931x.
Signed-off-by: Sven Eckelmann <se@simonwunderlich.de>
Link: https://github.com/openwrt/openwrt/pull/20300
Signed-off-by: Hauke Mehrtens <hauke@hauke-m.de>
The usage of pr_* helper inside a device driver should be avoided. The
dev_* helper provide more context about which device the message actually
is.
Signed-off-by: Sven Eckelmann <se@simonwunderlich.de>
Link: https://github.com/openwrt/openwrt/pull/20300
Signed-off-by: Hauke Mehrtens <hauke@hauke-m.de>
The integration of the LED set initialization for RTL931x added also minor
improvements in the coding style. Just adopt them also for RTL9301x.
Signed-off-by: Sven Eckelmann <se@simonwunderlich.de>
Link: https://github.com/openwrt/openwrt/pull/20300
Signed-off-by: Hauke Mehrtens <hauke@hauke-m.de>
of_property_count_u32_elems returns the number of u32 and not the number of
bytes. It must therefore be checked against the number of u32 in set_config
and not the bytes in set_config.
Fixes: 2cfb1ecf10 ("rtl930x: Rework per port LED configuration")
Signed-off-by: Sven Eckelmann <se@simonwunderlich.de>
Link: https://github.com/openwrt/openwrt/pull/20300
Signed-off-by: Hauke Mehrtens <hauke@hauke-m.de>
There are switches which share the same overall hardware design but remove
just a couple of components for the low cost variant. For example, a 8+2
(ethernet+SFP) switch might have a low cost variant which only has 8
ethernet ports. In this case, the PCB will be shared but components for SFP
will just be dropped.
The LED shift registers will be the same between the two switches but the
ports are different. But since the rtl930x_led_init code is trying to
calculate the number of LEDs using the LED ports, the ethernet status ports
will then suddenly be shifted by two ports.
It is therefore necessary to have a mechanism to overwrite the detection of
the ethernet ports in the LED initialization and force some ports to
"virtually there" for the LED controller.
Signed-off-by: Harshal Gohel <hg@simonwunderlich.de>
Co-developed-by: Sven Eckelmann <se@simonwunderlich.de>
Signed-off-by: Sven Eckelmann <se@simonwunderlich.de>
Link: https://github.com/openwrt/openwrt/pull/20300
Signed-off-by: Hauke Mehrtens <hauke@hauke-m.de>
This commit renames all management network ports of the
SN2100, SN2700, SN3420, and SN3700 switches based
on their PCI address during boot.
For the default network config, the management and
QSFP port(s) are put into the br-lan bridge.
Signed-off-by: Til Kaiser <mail@tk154.de>
Link: https://github.com/openwrt/openwrt/pull/17251
Signed-off-by: Robert Marko <robimarko@gmail.com>
This is Allwinner's ARM926EJ-S core, which is one of its early
products, reappearing in recent compact designs. The SoC includes
32/64Mb memory in the same physical package, and has display and USB
interfaces, allowing for very small footprint boards.
The target consists of basic 6.12 support, with u-boot. Instead of creating
a separate suniv target, as both the kernel and u-boot supports enough of
this SoC by now with minimal patching, add it into sunxi as a subtarget.
Link: https://github.com/openwrt/openwrt/pull/15022
Signed-off-by: Zoltan HERPAI <wigyori@uid0.hu>
The first RTL931x devices make their way into OpenWrt. Their copper
ports are driven by different interfaces modes like 10G_QXGMII or
Realtek proprietary XSGMII. The DSA driver has no proper handling
for theses modes implemented yet. So a lot is auto-mapped to USXGMII
internally. As soon as the SerDes setup activates this (wrong) mode
the PHY connectivity breaks.
Disable this mode for now and rely on the proper U-Boot setup.
Signed-off-by: Markus Stockhausen <markus.stockhausen@gmx.de>
Link: https://github.com/openwrt/openwrt/pull/20292
Signed-off-by: Robert Marko <robimarko@gmail.com>
Now the NAND targets have real devices that need to be built.
Remove the source-only flag to make the images available.
Signed-off-by: Markus Stockhausen <markus.stockhausen@gmx.de>
Link: https://github.com/openwrt/openwrt/pull/20255
Signed-off-by: Robert Marko <robimarko@gmail.com>
The Realtek NAND kernel configuration has some shortcomings.
Fix this as follows:
- MTD_NAND_ECC_REALTEK selects MTD_NAND_ECC and this selects
MTD_NAND_CORE. For consistency add both config options.
- The partition layout of the Linksys switches requires some tricky
concatenation to keep dual boot active. Add CONFIG_MTD_VIRT_CONCAT
Signed-off-by: Markus Stockhausen <markus.stockhausen@gmx.de>
Link: https://github.com/openwrt/openwrt/pull/20255
Signed-off-by: Robert Marko <robimarko@gmail.com>
Userspace handling is deprecated.
Also handle 2.4ghz LED in ath9k instead of generic.
Signed-off-by: Rosen Penev <rosenp@gmail.com>
Link: https://github.com/openwrt/openwrt/pull/20269
Signed-off-by: Hauke Mehrtens <hauke@hauke-m.de>
Plasma Cloud PAX1800-Lite is a dual-band Wi-Fi 6 router, based on MediaTek
MT7621A + MT79x5D platform.
Specifications:
- SOC: MT7621AT (880 MHz)
- DRAM: DDR3 448 MiB (Nanya NT5CC256M16DP-DI)
- Flash: 2 MiB SPI NOR (S25FL016K) + 128 MB SPI NAND (W25N02KVZEIR)
- Ethernet: 1x 10/100/1000 Mbps (SOC's built-in switch, with PoE+)
- Wi-Fi: 2x2:2 2.4/5 GHz (MT7905DAN + MT7975DN)
(MT7905DAN doesn't support background DFS scan/BT)
- LED: tri-color LED for status (red, blue, green)
- Buttons: 1x (reset)
- Antenna: 4x internal, non-detachable omnidirectional
- UART: 1x 4-pin (2.54 mm pitch, marked as "3V3 G/RX GND W/TX")
- Power: 12 V DC/2 A (DC jack)
MAC addresses:
WAN: 54:9C:27:xx:xx:00 (factory 0x3fff4, device label)
2.4 GHz: 54:9C:27:xx:xx:02 (factory 0x4, device label +2)
5 GHz: 54:9C:27:xx:xx:08 (factory 0xa, device label +8)
Flashing instructions:
======================
Various methods can be used to install the actual image on the flash.
Two easy ones are:
ap51-flash
----------
The tool ap51-flash (https://github.com/ap51-flash/ap51-flash) should be
used to transfer the image to the u-boot when the device boots up.
initramfs from TFTP
-------------------
The serial console (115200 8N1) must be used to access the u-boot shell
during bootup. It can then be used to first boot up the initramfs image
from a TFTP server (here with the IP 192.168.1.21):
setenv serverip 192.168.1.21
setenv ipaddr 192.168.1.1
tftpboot 0x83001000 <filename-of-initramfs-kernel>.bin && bootm $fileaddr
The actual sysupgrade image can then be transferred (on the LAN port) to the
device via
scp <filename-of-squashfs-sysupgrade>.bin root@192.168.1.1:/tmp/
On the device, the sysupgrade must then be started using
sysupgrade -n /tmp/<filename-of-squashfs-sysupgrade>.bin
Signed-off-by: Sven Eckelmann (Plasma Cloud) <se@simonwunderlich.de>
Link: https://github.com/openwrt/openwrt/pull/20152
Signed-off-by: Hauke Mehrtens <hauke@hauke-m.de>
After extracting the EEPROMs of different devices, only the 0x4 address is unique.
Use the 0x4 address as the LAN address, and the LAN+1 address as the WAN address.
Signed-off-by: Coia Prant <coiaprant@gmail.com>
Link: https://github.com/openwrt/openwrt/pull/20256
Signed-off-by: Hauke Mehrtens <hauke@hauke-m.de>
According to the MT7628 hardware datasheet:
- GPIO/4 was originally used for I2C, but is now used as the Modem Power.
- GPIO/5 was originally used for I2C, but is now used as the SIM card select. (n/a for this device)
- GPIO/6 was originally used for SPI CS1, but is now used as the Serial mode switch.
- GPIO/36 was originally used for PERST, but is now used as the GPS OE. (n/a for this device)
- GPIO/38 was originally used for WDT, but is now used as the Modem2 Power. (n/a for this device)
- GPIO/44 was used for WLED_AN, but is now controlled by `gpio-leds`.
Corrected pinctrl to ensure it works properly in the future.
Signed-off-by: Coia Prant <coiaprant@gmail.com>
Link: https://github.com/openwrt/openwrt/pull/20256
Signed-off-by: Hauke Mehrtens <hauke@hauke-m.de>
Now the rtl931x target has real devices that need to be built. Remove the
source-only flag to make the images available.
Signed-off-by: Sven Eckelmann <se@simonwunderlich.de>
Link: https://github.com/openwrt/openwrt/pull/20172
Signed-off-by: Hauke Mehrtens <hauke@hauke-m.de>
The Plasma Cloud ESX28 Switch is a 24 + 4 port multi-GBit switch with
24x 10/100/1000/2500BaseT Ethernet ports and 4x SFP+ module slot.
Hardware:
- RTL9312C SoC
- Macronix MX25L25645G (32MB flash)
- 512MB DDR3 SDRAM
- RTL8231 GPIO extender to control the port LEDs
- 6x RTL8224 4x 10m/100m/1/2.5 Gigabit PHY
- SFP+ 4x 10GBit slot
The switch is powered directly via AC.
The external RS232 serial connector (RJ45, Cisco pinout) can be used to
access the terminal. Serial connection is via 115200 baud, 8N1.
A reset button is accessible through a hole in the front panel.
Installation
------------
* The device can be flashed by using sysupgrade command. Either from the
original vendor firmware or using an initramfs (see "Debug")
* Connect serial on front panel. Connection parameters: 115200 8N1
* The image must be copied using scp to /tmp of the device
scp openwrt-realtek-rtl931x-plasmacloud_esx28-squashfs-sysupgrade.bin root@[IP address of the device]:/tmp/
* start sysupgrade without saving the original vendor configuration
sysupgrade -n /tmp/openwrt-realtek-rtl931x-plasmacloud_esx28-squashfs-sysupgrade.bin
Installation via u-boot
-----------------------
If you have an TFTP server connected to the switch, it is possible to
directly install the device using the factory image from u-boot
# setup networking and IP of TFP server
rtk network on
setenv ipaddr 10.100.100.99
setenv serverip 10.100.100.20
# get factory image
tftp 0x84000000 factory.bin
# erase firmware partitions
sf probe 0
sf erase 0x5e0000 0x1a20000
# write firmware to both partitions
sf write ${fileaddr} 0x5e0000 ${filesize}
sf write ${fileaddr} 0x12f0000 ${filesize}
# adjust the boot commands
setenv bootargs "mtdparts=spi0.0:768k(u-boot),64k(u-boot-env),64k(u-boot-env2),5120k(reserved),13376k(inactive),13376k(firmware2)"
setenv bootcmd "rtk init; bootm 0xb52f0000"
# restart
reset
Debug
-----
* Connect serial on front panel. Connection parameters: 115200 8N1.
* A tftp server is required, tftpd-hpa works well.
* Power the device, at U-Boot start rapidly hit Esc key to stop autoboot
* Enter passwords: "1234" or "plasmapsx"
* Enable network:
rtk network on
* Change ip address of device:
setenv ipaddr 192.168.1.6
* Download initramfs from TFTP server:
tftpboot 0x84000000 192.168.1.111:openwrt-realtek-rtl931x-plasmacloud_esx28-initramfs-kernel.bin
* Boot loaded file:
bootm 0x84000000
Signed-off-by: Harshal Gohel <hg@simonwunderlich.de>
Co-developed-by: Sven Eckelmann <se@simonwunderlich.de>
Signed-off-by: Sven Eckelmann <se@simonwunderlich.de>
Link: https://github.com/openwrt/openwrt/pull/20172
Signed-off-by: Hauke Mehrtens <hauke@hauke-m.de>
The Plasma Cloud PSX28 Switch is a 24 + 4 port multi-GBit switch with
24x 10/100/1000/2500BaseT Ethernet ports and 4x SFP+ module slot.
Hardware:
- RTL9312C SoC
- Macronix MX25L25645G (32MB flash)
- 512MB DDR3 SDRAM
- RTL8231 GPIO extender to control the port LEDs
- 6x RTL8224 4x 10m/100m/1/2.5 Gigabit PHY
- SFP+ 4x 10GBit slot
- RTL8239 POE++ PSE controller with frontend MCU
The switch is powered directly via AC.
The external RS232 serial connector (RJ45, Cisco pinout) can be used to
access the terminal. Serial connection is via 115200 baud, 8N1.
A reset button is accessible through a hole in the front panel.
Installation
------------
* The device can be flashed by using sysupgrade command. Either from the
original vendor firmware or using an initramfs (see "Debug")
* Connect serial on front panel. Connection parameters: 115200 8N1
* The image must be copied using scp to /tmp of the device
scp openwrt-realtek-rtl931x-plasmacloud_psx28-squashfs-sysupgrade.bin root@[IP address of the device]:/tmp/
* start sysupgrade without saving the original vendor configuration
sysupgrade -n /tmp/openwrt-realtek-rtl931x-plasmacloud_psx28-squashfs-sysupgrade.bin
Installation via u-boot
-----------------------
If you have an TFTP server connected to the switch, it is possible to
directly install the device using the factory image from u-boot
# setup networking and IP of TFP server
rtk network on
setenv ipaddr 10.100.100.99
setenv serverip 10.100.100.20
# get factory image
tftp 0x84000000 factory.bin
# erase firmware partitions
sf probe 0
sf erase 0x5e0000 0x1a20000
# write firmware to both partitions
sf write ${fileaddr} 0x5e0000 ${filesize}
sf write ${fileaddr} 0x12f0000 ${filesize}
# adjust the boot commands
setenv bootargs "mtdparts=spi0.0:768k(u-boot),64k(u-boot-env),64k(u-boot-env2),5120k(reserved),13376k(inactive),13376k(firmware2)"
setenv bootcmd "rtk init; bootm 0xb52f0000"
# restart
reset
Debug
-----
* Connect serial on front panel. Connection parameters: 115200 8N1.
* A tftp server is required, tftpd-hpa works well.
* Power the device, at U-Boot start rapidly hit Esc key to stop autoboot
* Enter passwords: "1234" or "plasmapsx"
* Enable network:
rtk network on
* Change ip address of device:
setenv ipaddr 192.168.1.6
* Download initramfs from TFTP server:
tftpboot 0x84000000 192.168.1.111:openwrt-realtek-rtl931x-plasmacloud_psx28-initramfs-kernel.bin
* Boot loaded file:
bootm 0x84000000
Signed-off-by: Harshal Gohel <hg@simonwunderlich.de>
Co-developed-by: Sven Eckelmann <se@simonwunderlich.de>
Signed-off-by: Sven Eckelmann <se@simonwunderlich.de>
Link: https://github.com/openwrt/openwrt/pull/20172
Signed-off-by: Hauke Mehrtens <hauke@hauke-m.de>
To be able to read out the ethaddr from the u-boot environment for MAC
address configuration, it is required to also enable the NVMEM layout
parsing code for the U-Boot env layout.
Signed-off-by: Sven Eckelmann <se@simonwunderlich.de>
Link: https://github.com/openwrt/openwrt/pull/20172
Signed-off-by: Hauke Mehrtens <hauke@hauke-m.de>
OpenWrt buildroot will compile all dtbs defined in target to
$(KDIR)/image-$(DEVICE_DTS).dtb, so make use of it to allow us
debug and use external dtbs easier without patching kernel Makefile.
This also fixes commit 5c724939c3 which forgot to update DTS_DIR
in KERNEL variable.
Fixes: 5c724939c3 ("rockchip: add DEVICE_DTS_DIR definition")
Signed-off-by: Tianling Shen <cnsztl@immortalwrt.org>
Link: https://github.com/openwrt/openwrt/pull/20286
Signed-off-by: Hauke Mehrtens <hauke@hauke-m.de>
If transmissions are done outside of the DSA switch (directly from the CPU
port), the STP state must not block the transmission. Otherwise, STP frames
are not correctly submitted and the STP frames cannot correctly detect
loops before switching a port in the forwarding state.
The same applies for the LLDP frames. These must be submitted independent
of the STP state to identify neighbors or configure POE limits.
It is not necessary to filter specific destination mac addresses because
the transmission was done outside the bridge/switch in the first place. The
transmission is therefore forced.
Signed-off-by: Issam Hamdi <ih@simonwunderlich.de>
Co-developed-by: Sven Eckelmann <sven@narfation.org>
Signed-off-by: Sven Eckelmann <sven@narfation.org>
Link: https://github.com/openwrt/openwrt/pull/20184
Signed-off-by: Robert Marko <robimarko@gmail.com>
The RTL930X and RTL931X SoCs support port-based, flow-based, and
RSPAN-based mirroring. Like for other SoCs from the realtek target, only
the port based port mirroring can be exposed using Linux's tc subsystem.
The port_mirror_add() implementation was updated with the following
considerations for RTL93xx SoCs:
* mirrored packets must pass through the TX pipeline of the mirroring
port, so they are subject to configuration such as VLAN tagging,
remarking, and EVC
* when a packet hits both source ports (SPM) and destination port (DPM) of
a mirror group, the egress port traffic will be mirrored
The port_mirror_del() function doesn't require any modifications.
Signed-off-by: Sharadanand Karanjkar <sk@simonwunderlich.de>
Co-developed-by: Sven Eckelmann <se@simonwunderlich.de>
Signed-off-by: Sven Eckelmann <se@simonwunderlich.de>
Link: https://github.com/openwrt/openwrt/pull/20264
Signed-off-by: Robert Marko <robimarko@gmail.com>
Instead of using a lot of if-else blocks in the port mirror code, provide
SoC specific function which calculates the SoC specific portions. The
generic part of the port mirroring code can then simply operate on the
calculated register addresses and values.
Suggested-by: Markus Stockhausen <markus.stockhausen@gmx.de>
Signed-off-by: Sven Eckelmann <se@simonwunderlich.de>
Link: https://github.com/openwrt/openwrt/pull/20264
Signed-off-by: Robert Marko <robimarko@gmail.com>
The FIT loadaddr on RK3308/RK3566/RK3568/RK358x is 0x02000000
instead of 0x02080000, while on RK3576 it's 0x42000000, which is
quite different from the former SoCs and incompatible with current
kernel loadaddr value.
Signed-off-by: Tianling Shen <cnsztl@immortalwrt.org>
Link: https://github.com/openwrt/openwrt/pull/20041
Signed-off-by: Hauke Mehrtens <hauke@hauke-m.de>
Replace the pending I2C backport patches for RTL93XX added in
44655c97bb with the upstreamed variants. The patches have been accepted
upstream in the meantime and are included in v6.17 or v6.18.
Signed-off-by: Jonas Jelonek <jelonek.jonas@gmail.com>
Link: https://github.com/openwrt/openwrt/pull/20273
Signed-off-by: Robert Marko <robimarko@gmail.com>
The RTL931x has next to its SPI flash controller a SPI master interface. It
is connected to
* SPI_CS#[1,0]: AH22 , AK22 (aka: GPIO 12, 11)
* SPI_CLK: AL23 (aka: GPIO 8)
* SPI_MISO: AM23 (aka: GPIO 9)
* SPI_MOSI: AL22 (aka: GPIO 10)
It is not the same as the SPI flash controller which uses pins:
* SPI_CS#[1,0]: B24, A24
* SPI_SCLK: A23
* SPI_SDI/SIO0: B21
* SPO_SDO_SIO1: B21
* SPI_SIO2: A22
* SPI_SIO3: B22
* SPI_RSTN: B23
As shown above, the SPI master controller shares its pin with GPIO 8, 9,
10, 11, 12. In some upcoming devices (like the Plasma Cloud PSX28/ESX28),
they will be used for SFP cage signaling. These pins must therefore be
switched manually to the GPIO mode.
The SPI_CTRL0 register provides all necessary configuration to enforce the
GPIO mode of the pins. And until more requirements (and a correct driver)
for the SPI master controller arise, it is therefore possible to use
pinctrl-single to configure it using the devicetree.
Previously the ethernet driver did configure the SPI master controller for
31.25 MHz. It is unknown for which kind of device this was originally made
and what was actually connected there. But this manual write to the
register conflicts potentially with the write of the pinctrl driver to the
same register. Luckily, we don't need this SPI speed configuration in the
ethernet driver. Still, to allow this device an easy migration, the
`spi0-31mhz` configuration was already prepared.
Signed-off-by: Sven Eckelmann <se@simonwunderlich.de>
Link: https://github.com/openwrt/openwrt/pull/20263
Signed-off-by: Robert Marko <robimarko@gmail.com>
The RTL8224 used by Plasma Cloud PSX8/PSX10 is not using USXGMII but
USXGMII 10G-QXGMII mode. The correct phy-mode string for this is
"10g-qxgmii".
Signed-off-by: Sven Eckelmann <se@simonwunderlich.de>
Link: https://github.com/openwrt/openwrt/pull/20239
Signed-off-by: Robert Marko <robimarko@gmail.com>
The current SerDes implementation for RTL931x handles 10G-QXGMII via the
"usxgmii" PHY mode. This is not 100% correct because it is not a single
port with 10G (max) but 4 ports with 2.5G each.
To allow setting of the "10g-qxgmii" phy mode, just change the code for now
to use the same codepaths as USXGMII. This has to be cleaned up further
during the SerDes driver rewrites.
Suggested-by: Markus Stockhausen <markus.stockhausen@gmx.de>
Signed-off-by: Sven Eckelmann <se@simonwunderlich.de>
Link: https://github.com/openwrt/openwrt/pull/20239
Signed-off-by: Robert Marko <robimarko@gmail.com>
The Plasma Cloud PSX28 and ESX28 are using RTL8224 as ethernet PHY. This
phy works perfectly fine on PSX8/PSX10 (RTL930x) but failed to establish a link
on rtl931x because the upstream realtek phy driver was not enabled.
Signed-off-by: Sven Eckelmann <se@simonwunderlich.de>
Link: https://github.com/openwrt/openwrt/pull/20239
Signed-off-by: Robert Marko <robimarko@gmail.com>
Deprecated. Replaced with nvmem.
Signed-off-by: Rosen Penev <rosenp@gmail.com>
Link: https://github.com/openwrt/openwrt/pull/20176
Signed-off-by: Robert Marko <robimarko@gmail.com>
Userspace handling is deprecated.
Signed-off-by: Rosen Penev <rosenp@gmail.com>
Link: https://github.com/openwrt/openwrt/pull/20176
Signed-off-by: Robert Marko <robimarko@gmail.com>
Userspace handling is deprecated.
Signed-off-by: Rosen Penev <rosenp@gmail.com>
Link: https://github.com/openwrt/openwrt/pull/20176
Signed-off-by: Robert Marko <robimarko@gmail.com>
Userspace handling is deprecated.
Signed-off-by: Rosen Penev <rosenp@gmail.com>
Link: https://github.com/openwrt/openwrt/pull/20176
Signed-off-by: Robert Marko <robimarko@gmail.com>
Upstream will get support for the Realtek ECC engine with 6.18.
To make use of this in Openwrt
- backport upstream patches
- change config so that ECC will be built for nand subtargets
- define ECC engine in RTL93xx DTS.
Signed-off-by: Markus Stockhausen <markus.stockhausen@gmx.de>
Link: https://github.com/openwrt/openwrt/pull/19746
Signed-off-by: Robert Marko <robimarko@gmail.com>
During testing, we discovered that when adding a new offload FDB rule
on certain VLANs and then delete it, does not work as expected.
Steps to Reproduce:
* Create VLAN 4094 on the port lan1:
bridge vlan add vid 4094 dev lan1 pvid
* Add a new FDB entry on port lan1 for VLAN 4094:
bridge fdb add 00:01:02:22:33:44 dev lan1 vlan 4094 master permanent
* Delete the new FDB entry on port lan1 for VLAN4094
bridge fdb del 00:01:02:22:33:44 dev lan1 vlan 4094 master permanent
Root Cause:
The failure occurs because the hash_msb flag is not set correctly
based on the VLAN ID when adding a new L2 entry.
Signed-off-by: Issam Hamdi <ih@simonwunderlich.de>
Signed-off-by: Sven Eckelmann <se@simonwunderlich.de>
Link: https://github.com/openwrt/openwrt/pull/20183
Signed-off-by: Robert Marko <robimarko@gmail.com>
Align GS1900-10HP dts with other realtek devices to reduce the risk of device
specific regressions with the upcoming driver cleanup/rewrite.
Signed-off-by: Bjørn Mork <bjorn@mork.no>
Link: https://github.com/openwrt/openwrt/pull/20228
Signed-off-by: Robert Marko <robimarko@gmail.com>
Parse the pcs-handle property regardless of phy-handle
Signed-off-by: Bjørn Mork <bjorn@mork.no>
Link: https://github.com/openwrt/openwrt/pull/20228
Signed-off-by: Robert Marko <robimarko@gmail.com>
Check if the uploaded image matches the version of RouterBOOT before
proceeding with sysupgrade on MikroTik devices with NOR flash.
Signed-off-by: Daniel Golle <daniel@makrotopia.org>
RouterBOOT v7 for NOR devices does not support the historic yaffs
"kernel" ELF boot method.
Generate a compatible kernel
Signed-off-by: John Thomson <git@johnthomson.fastmail.com.au>
RouterBOOT v7 for NOR devices does not support the historic yaffs
"kernel" ELF boot method.
Generate a compatible kernel
Signed-off-by: John Thomson <git@johnthomson.fastmail.com.au>
RouterBOOT v7 for NOR devices does not support the historic yaffs
"kernel" ELF boot method.
Generate a compatible kernel
Signed-off-by: John Thomson <git@johnthomson.fastmail.com.au>
Add missing syscon compatible for scuclk node.
Fix the unit-address of the scuclk node.
This fixes the pcs driver error:
airoha-pcs 1fa08000.pcs: probe with driver airoha-pcs failed with error -22
airoha-pcs 1fa09000.pcs: probe with driver airoha-pcs failed with error -22
Fixes: c3d70b1 ("airoha: en7581: Add support for external PHY")
Signed-off-by: Aleksander Jan Bajkowski <olek2@wp.pl>
Signed-off-by: Chukun Pan <amadeus@jmu.edu.cn>
Link: https://github.com/openwrt/openwrt/pull/20190
Signed-off-by: Christian Marangi <ansuelsmth@gmail.com>
The pinctrl driver for airoha was expecting a function name that was
not a string, but was passed one. Removing #string fixed this issue.
Fixes: c5b12fc ("airoha: Introduce support for Airoha AN7583 SoC")
Signed-off-by: Chukun Pan <amadeus@jmu.edu.cn>
Link: https://github.com/openwrt/openwrt/pull/20190
Signed-off-by: Christian Marangi <ansuelsmth@gmail.com>
This patch already exists in generic/backport-6.12.
Fixes: 122135b ("airoha: an7581: add support for kernel 6.12")
Signed-off-by: Chukun Pan <amadeus@jmu.edu.cn>
Link: https://github.com/openwrt/openwrt/pull/20190
Signed-off-by: Christian Marangi <ansuelsmth@gmail.com>
All devices under airoha use dts directory under the target,
so update the default DEVICE_DTS_DIR. Also set the default
DEVICE_DTS based on the SoC name for non-dev boards.
Signed-off-by: Chukun Pan <amadeus@jmu.edu.cn>
Link: https://github.com/openwrt/openwrt/pull/20190
Signed-off-by: Christian Marangi <ansuelsmth@gmail.com>
Add support for swapping the Serdes TX line on RTL8261N PHYs.
This is used on an Arcadyan Mozart board where the Serdes TX is swapped
on the PHY (instead of on the Soc) to permit support of SFP module by
using toggling the integrated MUX.
Link: https://github.com/openwrt/openwrt/pull/20227
Signed-off-by: Christian Marangi <ansuelsmth@gmail.com>
Update with make kernel_oldconfig CONFIG_TARGET=target. Also disable
CONFIG_POSIX_MQUEUE, as it's available in the OpenWrt configuration.
Signed-off-by: Rui Salvaterra <rsalvaterra@gmail.com>
This is an automatically generated commit which aids following Kernel patch
history, as git will see the move and copy as a rename thus defeating the
purpose.
For the original discussion see:
https://lists.openwrt.org/pipermail/openwrt-devel/2023-October/041673.html
Signed-off-by: Rui Salvaterra <rsalvaterra@gmail.com>
This is an automatically generated commit.
When doing `git bisect`, consider `git bisect --skip`.
Signed-off-by: Rui Salvaterra <rsalvaterra@gmail.com>
Userspace handling is deprecated.
Also convert custom LED to one handled by ath9k.
Signed-off-by: Rosen Penev <rosenp@gmail.com>
Link: https://github.com/openwrt/openwrt/pull/20112
Signed-off-by: Hauke Mehrtens <hauke@hauke-m.de>
Upstream DTS in 6.12 contains many changes from our copy.
Move the remaining diff, which is LED aliases, USB ports and partition
labels into a patch and drop the full copy.
Signed-off-by: Stefan Kalscheuer <stefan@stklcode.de>
Link: https://github.com/openwrt/openwrt/pull/19786
Signed-off-by: Hauke Mehrtens <hauke@hauke-m.de>
Upstream DTS in 6.12 is almost identical to our copy.
Move the partition label change into a patch and drop the full copy.
Signed-off-by: Stefan Kalscheuer <stefan@stklcode.de>
Link: https://github.com/openwrt/openwrt/pull/19786
Signed-off-by: Hauke Mehrtens <hauke@hauke-m.de>
Upstream DTS in 6.12 is almost identical to our copy.
Move LED and partition tweaks into a patch and drop the full copy.
Signed-off-by: Stefan Kalscheuer <stefan@stklcode.de>
Link: https://github.com/openwrt/openwrt/pull/19786
Signed-off-by: Hauke Mehrtens <hauke@hauke-m.de>
Upstream DTS is almost identical to our copy. Move network aliases and
phy-mode into a patch and drop the full copy.
Signed-off-by: Stefan Kalscheuer <stefan@stklcode.de>
Link: https://github.com/openwrt/openwrt/pull/19786
Signed-off-by: Hauke Mehrtens <hauke@hauke-m.de>
Upstream DTS in 6.12 is almost identical to our copy.
The only non-trivial difference is ethernet aliases. Move this change
into a patch and drop the full copy.
Signed-off-by: Stefan Kalscheuer <stefan@stklcode.de>
Link: https://github.com/openwrt/openwrt/pull/19786
Signed-off-by: Hauke Mehrtens <hauke@hauke-m.de>
All changes to the DTS have been applied upstream, remove our DTS copy.
This change effectively drops the workaround for the 2500Base-x
interface which was broken until kernel 5.15 and removes redundant
address-/size-cells.
Signed-off-by: Stefan Kalscheuer <stefan@stklcode.de>
Link: https://github.com/openwrt/openwrt/pull/19786
Signed-off-by: Hauke Mehrtens <hauke@hauke-m.de>
Point the driver to the precal section of the emmc "factory" partition.
Signed-off-by: Bjørn Mork <bjorn@mork.no>
Link: https://github.com/openwrt/openwrt/pull/20154
Signed-off-by: Hauke Mehrtens <hauke@hauke-m.de>
Replace the hotplug script with nvmem now that loading data from emmc
partitions is supported.
Signed-off-by: Bjørn Mork <bjorn@mork.no>
Link: https://github.com/openwrt/openwrt/pull/20154
Signed-off-by: Hauke Mehrtens <hauke@hauke-m.de>
Avoids the occacial lost race, where VAPs are created before the hotplug
script has updated the phy mac address.
Signed-off-by: Bjørn Mork <bjorn@mork.no>
Link: https://github.com/openwrt/openwrt/pull/20154
Signed-off-by: Hauke Mehrtens <hauke@hauke-m.de>
Prior to the deletion of the old IXP4xx codebase we supported
Actiontec MI424WR A, C and D.
This brings back the support using the upstream device trees
from Linux.
Link: https://github.com/openwrt/openwrt/pull/20066
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
This corrects the WRV54G device tree and adds patches for
MI424WR alongh with GPIO MMIO support for the same.
Link: https://github.com/openwrt/openwrt/pull/20066
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
Add missing bluetooth support btif in dts.
Signed-off-by: Elwin Huang <s09289728096@gmail.com>
Link: https://github.com/openwrt/openwrt/pull/20181
Signed-off-by: Robert Marko <robimarko@gmail.com>
Introduce initial support for Airoha AN7583 SoC and add all the required
patch for basic functionality of the SoC.
Airoha AN7583 is based on Airoha EN7581 SoC with some major changes on
the PHY handling and Serdes. It can be see as a lower spec of EN7581
with modern and simplified implementations.
All the patch are sent upstream and are pending revision. Support for
PCIe and USB will come later as soon as DT structure is accepted
upstream.
Signed-off-by: Christian Marangi <ansuelsmth@gmail.com>
To correctly init the CPUFreq driver, CPUFREQ_DT is needed. While at it
also enable CPU HOTPLUG kconfig to support hotplug of secondary CPU.
Signed-off-by: Christian Marangi <ansuelsmth@gmail.com>
This add a pending version of the Airoha PCS driver to add support for
External PHY. The Airoha PCS driver will receive some minor modification
once we the PCS subsystem will be defined upstream.
Add all the required node for GDM2 and GDM4 and enable the PCS config.
Signed-off-by: Christian Marangi <ansuelsmth@gmail.com>
There are SFP modules which only work if auto-negotiation is disabled,
like some "OEM SFP-2.5G-T" modules. This also seems to be necessary for
RTL8226/RTL8221B PHYs when using 2500Base-X.
However, currently, it is always enabled, so add support for configuring
it to make these SFP modules and PHYs work.
This also adds locking which should be useful for future extension of
the PCS driver.
Signed-off-by: Jan Hoffmann <jan@3e8.eu>
Link: https://github.com/openwrt/openwrt/pull/19518
Signed-off-by: Robert Marko <robimarko@gmail.com>
Now that MDIO and DSA driver only look for pcs-handle drop all
usages of the sds property.
Signed-off-by: Markus Stockhausen <markus.stockhausen@gmx.de>
Link: https://github.com/openwrt/openwrt/pull/20148
Signed-off-by: Robert Marko <robimarko@gmail.com>
In the Realtek dts the pcs-handle property at the switch port is the
successor of the sds property at the phy. Rearrange the MDIO and DSA
driver so they always look at the new attribute.
Remark! This code can be dropped completely if the new PCS driver
is fully featured. But this will take some time.
Signed-off-by: Markus Stockhausen <markus.stockhausen@gmx.de>
Link: https://github.com/openwrt/openwrt/pull/20148
Signed-off-by: Robert Marko <robimarko@gmail.com>
Switch Airoha targets to 6.12 and drop 6.6 support.
Signed-off-by: Andrew LaMarche <andrewjlamarche@gmail.com>
Link: https://github.com/openwrt/openwrt/pull/20137
Signed-off-by: Robert Marko <robimarko@gmail.com>
en7523 compilation on 6.12 fails with a no prototype warning. Fix this
by declaring max_transfer_size and transfer_one_message static.
Signed-off-by: Andrew LaMarche <andrewjlamarche@gmail.com>
Link: https://github.com/openwrt/openwrt/pull/20138
Signed-off-by: Hauke Mehrtens <hauke@hauke-m.de>
Zyxel labels their switch revisions A1, B1, ... and not v1, v2, ...
Rename the supported device to A1 to make it clear this is the only
known compatible hardware revision.
Also add a compatible for seamless upgrade.
Signed-off-by: Stijn Segers <foss@volatilesystems.org>
Link: https://github.com/openwrt/openwrt/pull/20118
Signed-off-by: Robert Marko <robimarko@gmail.com>
Zyxel labels their switch revisions A1, B1, ... and not v1, v2, ...
Rename the devices as such in OpenWrt to match the labels. Of note:
the first (A1) revision is never labeled as such on the label, just
in the web UI. Provide compatibles for seamless sysupgrade.
For a recent overview of Zyxel GS1900 series revisions, see the
table linked in https://forum.openwrt.org/t//57875/3874.
Signed-off-by: Stijn Segers <foss@volatilesystems.org>
Link: https://github.com/openwrt/openwrt/pull/20118
Signed-off-by: Robert Marko <robimarko@gmail.com>
Zyxel labels their switch revisions A1, B1, ... and not v1, v2, ...
Rename the devices as such in OpenWrt to match the labels. Of note:
the first (A1) revision is never labeled as such on the label, just
in the web UI. Provide compatibles for seamless sysupgrade.
For a recent overview of Zyxel GS1900 series revisions, see the
table linked in https://forum.openwrt.org/t//57875/3874.
Signed-off-by: Stijn Segers <foss@volatilesystems.org>
Link: https://github.com/openwrt/openwrt/pull/20118
Signed-off-by: Robert Marko <robimarko@gmail.com>
Userspace handling is deprecated.
Signed-off-by: Rosen Penev <rosenp@gmail.com>
Link: https://github.com/openwrt/openwrt/pull/17344
Signed-off-by: Robert Marko <robimarko@gmail.com>
Userspace handling is deprecated.
Move the mac address patch to 10_fix_wifi_mac.
This uses an AR9287, which uses a smaller size for its calibration.
The PCI ID is also wrong.
Signed-off-by: Rosen Penev <rosenp@gmail.com>
Link: https://github.com/openwrt/openwrt/pull/19864
Signed-off-by: Robert Marko <robimarko@gmail.com>
This commit fixes stability issues on certain RAX3000Me devices. Some
devices has DDR3 RAM which don't able to work reliably at 2133 MHz
and require special BL2 (1866 MHz RAM freq).
Fixes: https://github.com/openwrt/openwrt/issues/20046
Signed-off-by: Mikhail Zhilkin <csharper2005@gmail.com>
Link: https://github.com/openwrt/openwrt/pull/20059
Signed-off-by: Hauke Mehrtens <hauke@hauke-m.de>
This patch has already been accepted and landed in 6.17.
Signed-off-by: Aleksander Jan Bajkowski <olek2@wp.pl>
Link: https://github.com/openwrt/openwrt/pull/20132
Signed-off-by: Hauke Mehrtens <hauke@hauke-m.de>
No functional changes intended.
Signed-off-by: Aleksander Jan Bajkowski <olek2@wp.pl>
Link: https://github.com/openwrt/openwrt/pull/20131
Signed-off-by: Robert Marko <robimarko@gmail.com>
No functional changes intended.
Fixes warning:
/linux/arch/arm64/boot/dts/airoha/en7581-gemtek-w1700k.dtb: i2c1@1fbf8100 (mediatek,mt7621-i2c): status: 'oneOf' conditional failed, one must be fixed:
['disable'] is not of type 'object'
'disable' is not one of ['okay', 'disabled', 'reserved', 'fail', 'fail-needs-probe']
from schema $id: http://devicetree.org/schemas/dt-core.yaml#
Signed-off-by: Aleksander Jan Bajkowski <olek2@wp.pl>
Link: https://github.com/openwrt/openwrt/pull/20131
Signed-off-by: Robert Marko <robimarko@gmail.com>
Now that there is a dedicated PCS driver remove the old functions
from the DSA driver and make use of the new ones.
Signed-off-by: Markus Stockhausen <markus.stockhausen@gmx.de>
Link: https://github.com/openwrt/openwrt/pull/20129
Signed-off-by: Hauke Mehrtens <hauke@hauke-m.de>
For all switch ports where the assigned SerDes is known, add the new
pcs-handle to the dts. Leave the existing <sds> assignments to the
PHYs as is because the driver has not yet been updated.
Signed-off-by: Markus Stockhausen <markus.stockhausen@gmx.de>
Link: https://github.com/openwrt/openwrt/pull/20111
Signed-off-by: Robert Marko <robimarko@gmail.com>
This commit adds support for Buffalo WSR-6000AX8 and AX8P models.
Hardware
--------
SOC: MediaTek MT7986B
RAM: 512MB
FLASH: 128MB SPI-NAND (Winbond)
WIFI 2.4G: (Embedded in SOC) b/g/n/ax, MIMO 4x4
WIFI 5G: (Embedded in SOC) a/n/ac/ax, MIMO 4x4
ETHERNET: 2.5GbE MaxLinear GPY211C (eth1: WAN)
ETHERNET: MediaTek MT7531AE 3xGbE (eth0: LAN1, LAN2, LAN3)
UART: 3.3V 115200 8N1
Serial(UART) Pin Layout
-----------------------
+-------+-------+-------+-------+
J4 | RX | TX | GND |(3.3V) |
+-------+-------+-------+-------+
(Bottom Side)
MAC Address Table
-----------------
lan1-3: board_data 0x4(text)
eth1/WAN: board_data 0x4(text)
WIFI 2.4G: lan1 + 2
WIFI 5G: lan1 + 9
Installation
------------
1. Set up a TFTP server with the IP address "192.168.11.2".
2. Rename the OpenWrt initramfs image to "linux.ubi-recovery" and place it
in the TFTP server's root directory.
3. While holding down the AOSS button, power on the WSR-6000AX8 (or AX8P).
4. The device will automatically download the initramfs image
from the TFTP server and boot into it.
5. Once booted, run "sysupgrade -n" using the OpenWrt sysupgrade image
to complete the installation.
Recovery
--------
1. Decrypt the official firmware image using "buffalo-enc".
example:
$ buffalo-enc -d -i wsr_6000ax8_jp_100 -o wsr_6000ax8_jp_100.dec \
-l -O 0xc8
2. Run "sysupgrade -F -n" with the decrypted image.
Signed-off-by: Shin Sato <shin.sugar.ssyysy2021@gmail.com>
Link: https://github.com/openwrt/openwrt/pull/13107
Signed-off-by: Hauke Mehrtens <hauke@hauke-m.de>
Specification :
- SOC : Mediatek MT7981B (1.3GHz)
- RAM : 256MB
- Flash : 16MB SPI NOR
- Ports : 4 LAN (1G) & 1 WAN (1G)
- WIFI : MediaTek dual-band WiFi 6
- 2.4 GHz : b/g/n/ax, MIMO 2x2
- 5 GHz : a/n/ac/ax, MIMO 2x2
- Buttons : Reset & WPS/Mesh
- LEDS : WAN (Green), Status (Red & Blue)
- Power : 12V1A
Install via OEM web ui:
Upload the sysupgrade image to firmware upgrade page on OEM web ui
Install via recovery / revert to stock firmware:
1. Unplug from power
2. Download the Sysupgrade (for openwrt installation) or OEM Factory image (for revert to stock firmware)
3. Set your computer ethernet IP to 192.168.1.X, subnet 255.255.255.0 (X=your chosen ip number ranging from 2-254)
4. Press and hold reset button while turn on / plug power adapter to the router. Wait untill ALL LAN green LED turn on, then release the reset button.
5. Plug the LAN cable from your computer into LAN 1 port then open web browser, and type in the address column : 192.168.1.1
6. Upload the sysupgrade / oem factory image
7. Wait until the router finished flashing (the router will reboot)
8. Set ethernet ip to dhcp
9. Open 192.168.1.1 (for openwrt install) / 192.168.0.1 (for OEM firmware)
Signed-off-by: Ari Kurniawan <noobhek@gmail.com>
Link: https://github.com/openwrt/openwrt/pull/20035
Signed-off-by: Hauke Mehrtens <hauke@hauke-m.de>
Now that we have a board file, add calibration variant for TP-Link
Archer C60 v1 and add ipq-wifi package for it.
Signed-off-by: Christoph Krapp <achterin@gmail.com>
Link: https://github.com/openwrt/openwrt/pull/19993
Signed-off-by: Hauke Mehrtens <hauke@hauke-m.de>
This fixes a previous commit breaking setting the MAC address for the
wifi devices.
Fixes: 9ed4d27fbf ("mediatek: filogic: fix 5G MAC address for Zyxel EX5601")
Link: https://github.com/openwrt/openwrt/pull/20100
Signed-off-by: Hauke Mehrtens <hauke@hauke-m.de>
Until now the the SerDes configuration is realized with helper functions
scattered around the DSA and PHY driver. Give them a new home as a PCS
driver.
The target design is as follows:
- dsa driver manages switch
- pcs driver manages SerDes on high level (this commit)
- mdio driver manages SerDes on low level
This driver adds the high level SerDes access via PCS. It makes use of
the low level mdio SerDes driver to access the registers.
Remark: This initial version provides exactly all phylink_pcs_ops that
are currently part of the DSA driver. So this can be swapped in one of
the next commits as a drop in replacement. To make use of it something
like this is needed:
...
ports = of_get_child_by_name(node, "ethernet-ports");
if (!ports)
return -EINVAL;
for_each_available_child_of_node(ports, port) {
pcs_node = of_parse_phandle(port, "pcs-handle", 0);
of_property_read_u32(port, "reg", &port_nr)) {
priv->pcs[port_nr] = rtpcs_create(dev, pcs_node, port_nr);
}
...
Signed-off-by: Markus Stockhausen <markus.stockhausen@gmx.de>
Link: https://github.com/openwrt/openwrt/pull/20075
Signed-off-by: Robert Marko <robimarko@gmail.com>
In the future the PCS & DSA drivers will lookup the SerDes of a
switch port via pcs-handle (like upstream does). Provide a macro
that allows to expand the existing port definitions. To link a
SerDes to port simply do
Either in short form:
replace SWITCH_PORT(0, 1, qsgmii)
with SWITCH_PORT_SDS(0, 1, 3, qsgmii) (Link to SerDes 3)
Or in long form:
port@24 {
reg = <24>;
label = "lan25";
pcs-handle = <&serdes4>; (Link to SerDes 4)
phy-handle = <&phy24>;
phy-mode = "1000base-x";
managed = "in-band-status";
sfp = <&sfp0>;
};
Signed-off-by: Markus Stockhausen <markus.stockhausen@gmx.de>
Link: https://github.com/openwrt/openwrt/pull/20075
Signed-off-by: Robert Marko <robimarko@gmail.com>
The fixes for the dying timers were finally accepted upstream.
Signed-off-by: Markus Stockhausen <markus.stockhausen@gmx.de>
Link: https://github.com/openwrt/openwrt/pull/20097
Signed-off-by: Robert Marko <robimarko@gmail.com>
Instead of having two LED entries that supposedly control the same
thing, set the pin properly.
Signed-off-by: Rosen Penev <rosenp@gmail.com>
Link: https://github.com/openwrt/openwrt/pull/18905
Signed-off-by: Robert Marko <robimarko@gmail.com>
of_gpio.h is deprecated in upstream Linux and may be removed soon. Get
ahead of things and remove it. Most of these drivers already use the
gpiod API.
Signed-off-by: Rosen Penev <rosenp@gmail.com>
Link: https://github.com/openwrt/openwrt/pull/20076
Signed-off-by: Robert Marko <robimarko@gmail.com>
This is a smart door lock device equipped with OpenWrt 14.07 OEM
modified version Qdwrt
The OEM has closed down, This commit is intended to maximize the
remaining value of these devices. It can flash OpenWrt to become
an AP
Specification:
- SoC: MediaTek MT7628NN
- Flash: 8 MB
- RAM: 64 MB
- Power: DC 5V - 25V
- Ethernet: 1 x RJ45 (10/100 Mbps)
- Wireless radio: 802.11n 2.4g-only
- On-Board LED:
Status 1: GPIO/43 active-low
Status 2: GPIO/44 active-low
Power: AlwaysOn
- Button:
WPS / RESET: GPIO/14 active-low
- Bluetooth: CC2541 via UART1 (ttyS1) and GPIO/26-29
- RFID: MF RC522 on I2C@28
- RTC: DS1339 on I2C@68
- Shell (via CON1 cable)
- LED (Swipe card area):
- Green GPIO/3 active-high
- Red GPIO/11 active-high
- Matrix keypad: (active-low)
GPIO/20 GPIO/21 GPIO/19 (Rows)
GPIO/24 1 2 3
GPIO/25 4 5 6
GPIO/22 7 8 9
GPIO/23 BACK 0 ENTER
(Cols)
- UART: 1 x UART on PCB - 57600 8N1
- GPIO Relay: GPIO/42 active-high
- GPIO Buzzer: GPIO/15 active-high
Warning:
The original firmware does not use the device tree.
This device tree is written based on the content of /sys/devices/platform
and has been tested
Note:
- On the device, matrix keypad rows actually are columns, and the columns actually are rows
- The key code of the CLEAR key of the matrix keypad is BACK in the original firmware.
Issue:
- No drivers in mainline kernel for RFID and Bluetooth.
Flash Instruction:
Using SSH/Telnet:
1. Connect the board to the computer via RJ45 Ethernet
2. Login 10.10.10.1 with root password "szqdingnet123" (SSH Port 22, Telnet Port 9900)
3. Download openwrt firmware on the computer.
4. Setup a http server on computer. And use wget download openwrt firmware from computer
5. Use command "mtd -r write openwrt-ramips-mt76x8-qding_qc202-squashfs-sysupgrade.bin firmware"
to flash
Using U-Boot WebUI:
1. Configure PC with a static IP address 10.10.10.2/24.
2. Open http://10.10.10.1
3. Use "mkqdimg -B qc202 -f openwrt-ramips-mt76x8-qding_qc202-squashfs-sysupgrade.bin" to
make image.
4. Upload factory.bin via U-Boot WebUI.
Original Firmware Dump / More details:
https://blog.gov.cooking/archives/research-qianding-smart-locker-and-flash.html
Original U-Boot firmware image tools:
https://gitlab.com/CoiaPrant/mkqdimg
Signed-off-by: Coia Prant <coiaprant@gmail.com>
Tested-by: Coia Prant <coiaprant@gmail.com>
Link: https://github.com/openwrt/openwrt/pull/17471
Signed-off-by: Hauke Mehrtens <hauke@hauke-m.de>
Currently following warnings are given
dts/rtl930x.dtsi:166.4-23: Warning (reg_format):
/switchcore@1b000000/i2c@36c:reg: property has invalid length
(8 bytes) (#address-cells == 2, #size-cells == 1)
Obviously default address-cells size is fixed to 64 bit. Align
with upstream and override address size to 32 bit.
Suggested-by: Jonas Jelonek <jelonek.jonas@gmail.com>
Signed-off-by: Markus Stockhausen <markus.stockhausen@gmx.de>
Link: https://github.com/openwrt/openwrt/pull/20091
Signed-off-by: Robert Marko <robimarko@gmail.com>
Add node to support the second UART node controller in IPQ5018.
Signed-off-by: George Moussalem <george.moussalem@outlook.com>
Link: https://github.com/openwrt/openwrt/pull/20090
Signed-off-by: Robert Marko <robimarko@gmail.com>
Specification:
SoC: Mediatek MT7981BA
RAM: 512 MB DDR4 RAM
Flash: Winbond W25N01GV 128 MB SPI-NAND (dual boot on OEM)
WiFi: MT7976CN DBDC AX
Switch: MediaTek MT7531AE (3x LAN Gigabit ports) + Internal Gbe Phy (1x WAN Gigabit port)
GPIO: 4x LED (power, internet, fn, wifi), 2x buttons (wps, reset), 1x switch (mesh)
UART Interface:
Pins: VCC, TX, RX, NC, GND
Settings: 115200, 8N1
Flashing via TFTP:
1. Connect your PC and router to the first LAN port, configure PC interface using IP 192.168.1.2, mask 255.255.255.0
2. Save the factory image of the OpenWRT firmware, renamed to KN-3711_recovery.bin, on the TFTP server
3. Hold the reset button and power up the device
4. Keep the button pressed until the status LED starts blinking
Signed-off-by: Vladimir Epifantsev <volatilefield@outlook.com>
Link: https://github.com/openwrt/openwrt/pull/19633
Signed-off-by: Hauke Mehrtens <hauke@hauke-m.de>
The EN751221 has an XHCI that is compatible with MT7621.
While there is setup logic in the vendor code for both
EN751221 and MT7621, but MT7621 does not use it in mainline
or OpenWRT, and it appears to work correctly with EN751221.
Include SCSI / Mass Storage because many EcoNet devices
contain a builtin USB SD-Card reader.
Signed-off-by: Caleb James DeLisle <cjd@cjdns.fr>
Link: https://github.com/openwrt/openwrt/pull/20050
[Remove usb storage kmod from smartfiber_xp8421-b]
Signed-off-by: Hauke Mehrtens <hauke@hauke-m.de>
The baud rate control on Airoha does not function properly. This
patch enables the inactive code responsible for this. The UART2
baud rate is correct. HSUART3 operates at twice the requested
baud rate. The same problem exists in the current code, so this
doesn't introduce any regression. Support for baud rates higher
than 460800 is still required. This will be added in the future.
Tested on Gemtek W1700k. UART2 and HSUART3 are working fine.
Signed-off-by: Aleksander Jan Bajkowski <olek2@wp.pl>
Link: https://github.com/openwrt/openwrt/pull/20049
Signed-off-by: Robert Marko <robimarko@gmail.com>
Changelog: https://cdn.kernel.org/pub/linux/kernel/v6.x/ChangeLog-6.12.47
No patches needed to be rebased.
Build system: x86/64
Build-tested: Build-tested: flogic/xiaomi_redmi-router-ax6000-ubootmod, x86/64-glibc
Run-tested: flogic/xiaomi_redmi-router-ax6000-ubootmod, x86/64-glibc
Signed-off-by: John Audia <therealgraysky@proton.me>
Link: https://github.com/openwrt/openwrt/pull/20003
Signed-off-by: Robert Marko <robimarko@gmail.com>
The driver makes its own ath9k LED which handles everything.
Simplifies DTS slightly.
Signed-off-by: Rosen Penev <rosenp@gmail.com>
Link: https://github.com/openwrt/openwrt/pull/20023
Signed-off-by: Robert Marko <robimarko@gmail.com>
Userspace handling for this is deprecated.
Signed-off-by: Rosen Penev <rosenp@gmail.com>
Link: https://github.com/openwrt/openwrt/pull/20023
Signed-off-by: Robert Marko <robimarko@gmail.com>
The upcoming PCS driver will lookup the SerDes mdio bus via
of_mdio_find_bus() and the devicetree. This is only possible
with proper registration via devm_of_mdiobus_register().
Signed-off-by: Markus Stockhausen <markus.stockhausen@gmx.de>
Link: https://github.com/openwrt/openwrt/pull/20078
Signed-off-by: Robert Marko <robimarko@gmail.com>
No need two write a dedicated 1:1 mapping function and link that
for all the targets except RTL931x. Combine everything into a generic
helper and reduce the configuration structure.
Signed-off-by: Markus Stockhausen <markus.stockhausen@gmx.de>
Link: https://github.com/openwrt/openwrt/pull/20078
Signed-off-by: Robert Marko <robimarko@gmail.com>
The new SerDes mdio driver produces the following compilation
error in non-debug builds.
drivers/net/mdio/mdio-realtek-otto-serdes.c:72:12:
error: 'rtsds_sds_to_mmd' defined but not used [-Werror=unused-function]
72 | static int rtsds_sds_to_mmd(int sds_page, int sds_regnum)
| ^~~~~~~~~~~~~~~~
cc1: all warnings being treated as errors
Move the function into the debug section.
Fixes: 7a7ee72c4d ("realtek: mdio: add SerDes driver")
Signed-off-by: Markus Stockhausen <markus.stockhausen@gmx.de>
Link: https://github.com/openwrt/openwrt/pull/20078
Signed-off-by: Robert Marko <robimarko@gmail.com>
In first commit I successfully bring WAN port into ethernet switch,
without realizing that I was using custom bootloader. But if using
original bootloader it do not works. WAN port in original bootloader
is tied to using its own GMAC.
This fix is made so this firmware will be compatible with orignal
bootloader, so the user can directly flash from stock firmware without
changing anything.
Signed-off-by: Roy H <roy@altbytes.com>
Link: https://github.com/openwrt/openwrt/pull/20039
Signed-off-by: Hauke Mehrtens <hauke@hauke-m.de>
Despite having the same tplink.dtsi file, there are differences in wifi
Move wifi nodes out of dtsi to make it clear what the chipset is and
what calibration size should be used.
While at it, change to use led-sources to simplify LED setup.
Signed-off-by: Rosen Penev <rosenp@gmail.com>
Link: https://github.com/openwrt/openwrt/pull/20024
Signed-off-by: Robert Marko <robimarko@gmail.com>
Until now the SerDes access is realized with some helper functions
in the mdio bus. These were moved around a lot and had no real home.
End that temporary solution to move them where they belong.
The target design for the different Realtek drivers is as follows:
- dsa driver manages switch
- pcs driver manages SerDes on high level (to be developed)
- mdio driver manages SerDes on low level (this commit)
This driver adds the low level SerDes access via mdio. For debugging
purposes the user can interact with the SerDes in different ways.
First, there is a debug interface in
/sys/kernel/debug/realtek_otto_serdes/serdes.X/registers.
With that a dump of all registers can be shown.
> cat /sys/kernel/debug/realtek_otto_serdes/serdes.4/registers
Back SDS 4: 00 01 02 03 04 05 06 07 08
SDS : 0C03 0F00 7060 7106 074D 0EBF 0F0F 0359 5248
SDS_EXT : 0000 0000 85FA 8C6D 5CCC 0000 20D8 0003 79AA
...
Second, one can read/write registers via the mmd functions of the
mdio command line tool. Important to know: The registers are accessed
on the vendor specific MDIO_MMD_VEND1 device address (=30). Additionally
the SerDes page and register are concatenated into the the mmd register.
Top 8 bits are SerDes page and bottom 8 bits are SerDEs register.
E.g.
- mmd 0x0206 : SerDes page 0x02, SerDes register 0x06
- mmd 0x041f : SerDes page 0x04, SerDes register 0x1f
Read register 0x02 on page 0x03 of SerDes 0
> mdio realtek-serdes-mdio mmd 0:30 raw 0x0302
Write register 0x12 on page 0x02 of SerDes 1
> mdio realtek-serdes-mdio mmd 1:30 raw 0x0212 0x2222
For now this driver is only defined in the devicetree and activated
in the kernel build. There is no current consumer but at least
the debugging interface is available. Cleanup of the currently used
SerDes functions will come later.
Signed-off-by: Markus Stockhausen <markus.stockhausen@gmx.de>
Link: https://github.com/openwrt/openwrt/pull/20062
Signed-off-by: Robert Marko <robimarko@gmail.com>
There is some open coding in the ethernet driver. Drop
that and use kernel helpers instead.
- Use napi_gro_receive() instead of local skb list
- Use skb_put_data() instead of skb_put() plus memcpy()
- Use netdev_alloc_skb_ip_align() instead of manual alignment
Signed-off-by: Markus Stockhausen <markus.stockhausen@gmx.de>
Link: https://github.com/openwrt/openwrt/pull/20030
Signed-off-by: Robert Marko <robimarko@gmail.com>
Refresh patches 6.12 for airoha and econet
Fixes: 122135b964 ("airoha: an7581: add support for kernel 6.12")
Fixes: 73d0f92460 ("kernel: Add new platform EcoNet MIPS")
Signed-off-by: Leo Barsky <leobrsky@proton.me>
Link: https://github.com/openwrt/openwrt/pull/20073
Signed-off-by: Robert Marko <robimarko@gmail.com>
Use upstreamed patch for adding the QUP3 I2C node.
Signed-off-by: George Moussalem <george.moussalem@outlook.com>
Link: https://github.com/openwrt/openwrt/pull/20070
Signed-off-by: Robert Marko <robimarko@gmail.com>
Enable kernel 6.12 as the testing kernel for airoha.
This first commit will largely maintain feature-parity with kernel 6.6.
DTS changes are backwards-compatible with kernel 6.6.
Tested to flash and boot on Gemtek W1700K (#17869).
Signed-off-by: Kenneth Kasilag <kenneth@kasilag.me>
Link: https://github.com/openwrt/openwrt/pull/19038
Signed-off-by: Robert Marko <robimarko@gmail.com>
This is an automatically generated commit.
When doing `git bisect`, consider `git bisect --skip`.
Signed-off-by: Kenneth Kasilag <kenneth@kasilag.me>
Link: https://github.com/openwrt/openwrt/pull/19038
Signed-off-by: Robert Marko <robimarko@gmail.com>
Use label MAC to set addresses for wireless interfaces
for Linksys MX4200v2 and MX4300.
Signed-off-by: Paweł Owoc <frut3k7@gmail.com>
Link: https://github.com/openwrt/openwrt/pull/18759
Signed-off-by: Robert Marko <robimarko@gmail.com>
ascii-env driver allows reading mac addresses directly from devinfo partition from dts level.
Additionally label mac address have been set.
Signed-off-by: Paweł Owoc <frut3k7@gmail.com>
Link: https://github.com/openwrt/openwrt/pull/18759
Signed-off-by: Robert Marko <robimarko@gmail.com>
This adds the Vitesse VSC73xx DSA switch modules to the two
Gemini devices that have them.
Link: https://github.com/openwrt/openwrt/pull/20057
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
Refresh patch which was accidentally without non-confrming style and
not matching line numbers.
Also add patch description by copying the description of the commit
in OpenWrt, so the patch can be applied using `git am` and is ready
for upstream submission.
Fixes: afcec128c5 ("mediatek: add support for trng on mt7988a")
Signed-off-by: Daniel Golle <daniel@makrotopia.org>
Use upstreamed patches for adding IPQ CMN PLL driver support and its
node and clocks to the DTS accordingly.
In addition, set clock-div and clock-mult properties instead of the
frequency itself for the XO board clock in all board files as it's
converted to a fixed factor clock.
Signed-off-by: George Moussalem <george.moussalem@outlook.com>
Link: https://github.com/openwrt/openwrt/pull/19890
Signed-off-by: Robert Marko <robimarko@gmail.com>
Use upstreamed patch for adding the crypto nodes.
Signed-off-by: George Moussalem <george.moussalem@outlook.com>
Link: https://github.com/openwrt/openwrt/pull/19890
Signed-off-by: Robert Marko <robimarko@gmail.com>
Use upstreamed patch for adding the PRNG node.
Signed-off-by: George Moussalem <george.moussalem@outlook.com>
Link: https://github.com/openwrt/openwrt/pull/19890
Signed-off-by: Robert Marko <robimarko@gmail.com>
Use upstreamed patch for adding the SPI nand node.
Signed-off-by: George Moussalem <george.moussalem@outlook.com>
Link: https://github.com/openwrt/openwrt/pull/19890
Signed-off-by: Robert Marko <robimarko@gmail.com>
