This is a preparation for 6.12 kernel support. It can help us
track the patches and Kconfig history by using the Git tool.
Signed-off-by: Shiji Yang <yangshiji66@outlook.com>
Link: https://github.com/openwrt/openwrt/pull/18989
Signed-off-by: Christian Marangi <ansuelsmth@gmail.com>
This is a preparation for introducing the 6.12 kernel support.
All configs are automatically refreshed. In theory, they will
generate the same .config files in the kernel build directory
as before.
Signed-off-by: Shiji Yang <yangshiji66@outlook.com>
Link: https://github.com/openwrt/openwrt/pull/18989
Signed-off-by: Christian Marangi <ansuelsmth@gmail.com>
Right now the phylink capability function enables 2.5G and 10G modes on
Maple and Cypress, which they mostly (other than two SERDES on Cypress)
don't support. This causes these modes to be selected and break the link
as they are not supported by hardware.
I looked into doing this properly, but it cannot just be done based on
SoC, but needs to take the whole topology into account as a given MAC
might have very different capabilities depending on what SERDES are
assigned to it. So for now just use 1G and QSGMII for RTL83xx and 10G
for RTL93xx. This mostly works, except it will downgrade some 10G links
on RTL839x, but since there are also 1G SFPs on these this cannot be
solved without fully accounting for the global MAC and SERDES
configuration.
So this makes all of the 1G SFP slots work again, while keeping most of
the 10G SFP+ slots working at 10G with minimal changes.
Signed-off-by: Lorenz Brun <lorenz@brun.one>
Link: https://github.com/openwrt/openwrt/pull/20374
Signed-off-by: Hauke Mehrtens <hauke@hauke-m.de>
If the devicetree contains the appropriate nodes to configure the MAC
addresses for each physical DSA port, then these MAC addresses must be used
in OpenWrt and not some automatically generated ones. Otherwise the device
often ends up with addresses which are locally administered and not
matching any expected port-to-MAC scheme.
Devices which only get the MAC address for eth0 must still auto-generate
these MAC addresses until the devicetree was updated to also include the
correct ones.
Signed-off-by: Sven Eckelmann <se@simonwunderlich.de>
Link: https://github.com/openwrt/openwrt/pull/20241
Signed-off-by: Hauke Mehrtens <hauke@hauke-m.de>
If the lan_mac cannot be found, it is still used (as empty string) in
various operations. This is not valid and other 02_network scripts checking
for a non-empty string before using it. This should also be adopted for the
realtek 02_network.
Signed-off-by: Sven Eckelmann <se@simonwunderlich.de>
Link: https://github.com/openwrt/openwrt/pull/20241
Signed-off-by: Hauke Mehrtens <hauke@hauke-m.de>
Having everything in a big script without any structure makes it
unnecessary hard to get an overview or modify it without triggering
unexpected side effects.
Signed-off-by: Sven Eckelmann <se@simonwunderlich.de>
Link: https://github.com/openwrt/openwrt/pull/20241
Signed-off-by: Hauke Mehrtens <hauke@hauke-m.de>
The preferred prefix for the Realtek DSA driver code is "rtldsa" and no
longer "rtl83xx". This makes sure that the different drivers have
non-conflicting prefixes and because of this non-conflicting function
names.
Suggested-by: Felix Baumann <felix.bau@gmx.de>
Signed-off-by: Sven Eckelmann <se@simonwunderlich.de>
Link: https://github.com/openwrt/openwrt/pull/20360
Signed-off-by: Robert Marko <robimarko@gmail.com>
The RTL930x and the RTL931x SoC families share the same struct
dsa_switch_ops. This should be represented in the name of the object.
Suggested-by: Felix Baumann <felix.bau@gmx.de>
Signed-off-by: Sven Eckelmann <se@simonwunderlich.de>
Link: https://github.com/openwrt/openwrt/pull/20360
Signed-off-by: Robert Marko <robimarko@gmail.com>
If two ports are in isolation mode then these ports are not supposed to be
able to communicate between each other. This can be achieved in the realtek
switch by removing the other isolated port(s) from the port list of an
isolated port.
Signed-off-by: Sven Eckelmann <se@simonwunderlich.de>
Link: https://github.com/openwrt/openwrt/pull/20360
Signed-off-by: Robert Marko <robimarko@gmail.com>
The realtek driver is now in full control of the port matrix. It doesn't
need to rely on the current state of the HW to adjust it. The new port
matrix is calculated automatically using rtldsa_update_port_member() and
then written to the registers/tables.
Signed-off-by: Sven Eckelmann <se@simonwunderlich.de>
Link: https://github.com/openwrt/openwrt/pull/20360
Signed-off-by: Robert Marko <robimarko@gmail.com>
It is not necessary to read the back the current port members for a
specific port for enabling/disabling a port. All these members which are
expected to be in the HW port matrix of an active port are already stored
in the port specific member "pm".
And when a port is disabled, the port must no longer forwarding traffic to
any other port. Just writing 0 to the members is therefore good enough and
no read-back of the old HW state is necessary.
Signed-off-by: Sven Eckelmann <se@simonwunderlich.de>
Link: https://github.com/openwrt/openwrt/pull/20360
Signed-off-by: Robert Marko <robimarko@gmail.com>
The leave and join callbacks for DSA were using their own implementation of
the port member handling code. This makes the implementation of additional
functionality based on the port member matrix complicated because it needs
to be implemented in both places and also in the new code path for the
introduced feature.
By sharing this code, it is much easier to guarantee that all code paths
behave the same. This approach is already implemented by other DSA drivers
like qca8k, mt7530 or ksz.
Signed-off-by: Sven Eckelmann <se@simonwunderlich.de>
Link: https://github.com/openwrt/openwrt/pull/20360
Signed-off-by: Robert Marko <robimarko@gmail.com>
Add a callback for a serdes setup function to rtpcs_cfg to allow each
SoC variant to define its own SerDes setup routine.
Call the setup_serdes operation in pcs_config if it is defined.
Signed-off-by: Jonas Jelonek <jelonek.jonas@gmail.com>
Link: https://github.com/openwrt/openwrt/pull/20352
Signed-off-by: Robert Marko <robimarko@gmail.com>
Add more SerDes access helpers for the upcoming code import from PHY
driver. There, similar helpers are used to read and write full SerDes
registers or only parts of them (aka bitfields).
The helpers are expected to replace the following used in PHY SerDes
code:
- rtl9300_sds_field_r
- rtl9300_sds_field_w
- rtsds_931x_read
- rtsds_931x_read_field
- rtsds_931x_write
- rtsds_931x_write_field
Mark the helpers as unused for now to make the compiler happy. This will
be removed as soon as they are used.
Signed-off-by: Jonas Jelonek <jelonek.jonas@gmail.com>
Link: https://github.com/openwrt/openwrt/pull/20352
Signed-off-by: Robert Marko <robimarko@gmail.com>
This driver is required for the serial port on headless embedded AMD Ryzen
Embedded V3000 devices such as the SolidRun BEDROCK V3000.
Signed-off-by: Patrick Oppenlander <patrick.oppenlander@gmail.com>
Link: https://github.com/openwrt/openwrt/pull/20353
Signed-off-by: Robert Marko <robimarko@gmail.com>
There are two spi drivers for en7523/an7581/an7583:
* en7581-snand (spi-airoha-snfi.c)
* en7523-spi (spi-en7523.c)
The first one supports DMA, but until recently it has several nasty
issues. The second do things properly but does not support DMA.
Recently the first driver was greatly improved, so there is no sence
keep both drivers anymore.
This patch removes en7523-spi driver and use DMA capable driver instead.
Unfortunately there is a nasty en7523 specific issue.
We found that some serial console may pull TX line to GROUND during board
boot time. Airoha uses TX line as one of it's BOOT pins. This will lead
to booting in RESERVED boot mode. It was found that some flashes operates
incorrectly in RESERVED mode if DMA used.
This patch also adds a hack that turns off DMA and prints big fat warning
if booting in reserved mode was detected. This slow down flash operations
but does not kill your data.
Signed-off-by: Mikhail Kshevetskiy <mikhail.kshevetskiy@iopsys.eu>
Link: https://github.com/openwrt/openwrt/pull/20365
Signed-off-by: Robert Marko <robimarko@gmail.com>
This allows us use more easily port en7581 drivers to en7523.
Signed-off-by: Mikhail Kshevetskiy <mikhail.kshevetskiy@iopsys.eu>
Link: https://github.com/openwrt/openwrt/pull/20365
Signed-off-by: Robert Marko <robimarko@gmail.com>
This patch series removes dirty hack that reads flash page settings from
SNFI registers during driver startup.
Before these patches the airoha spi snfi driver needs to know spinand
flash page size. The driver can't get it from spinand subsystem, so the
following approach was implemented:
* bootloader know the flash page size (and some other parameters)
* to operate properly the bootloader writes flash page size (and some
other parameters) to SNFI registers
* bootloader starts linux
* after linux start SNFI registers keeps the values stored by bootloader
* linux snfi driver reads flash parameters from SNFI registers.
This works, but we can do better. It has been proven that flash page size
is actually unnecessary. We can get all required data from dirmap requests.
This patch series drops the hack and do things properly.
Signed-off-by: Mikhail Kshevetskiy <mikhail.kshevetskiy@iopsys.eu>
Link: https://github.com/openwrt/openwrt/pull/20295
Signed-off-by: Robert Marko <robimarko@gmail.com>
This patch series greatly improve airoha snfi driver and fix a
number of serious bugs.
Fixed bugs:
* Fix reading/writing of flashes with more than one plane per lun
* Fill the buffer with 0xff before writing
* Fix reading of flashes supporting continuous reading mode
* Fix error paths
Improvements:
* Add support of dual/quad wires spi modes in exec_op(). This also
fix flash reading/writing if dirmap can't be created.
* Support of dualio/quadio flash reading commands
Signed-off-by: Mikhail Kshevetskiy <mikhail.kshevetskiy@iopsys.eu>
Link: https://github.com/openwrt/openwrt/pull/20295
Signed-off-by: Robert Marko <robimarko@gmail.com>
Continuous reading mode is broken for some spi controllers. There are two
possible bug scenarios:
1) "continuous mode" flash and spi controller without dirmap support,
but with restriction on transfer length in adjust_op_size()
2) "continuous mode" flash and spi controller with dirmap support for a
single flash page
In the first case, any read that exceeds the limit specified in adjust_op_size()
will result in an EIO error. The limit may even be less than a size of a single
flash page. In this case, any read will result in an error.
In the second case, any read larger than flash page size will result in an EIO
error or spinand driver spoofing (because the spi controller driver returns
more bytes than were actually read).
This patch series tries to fix continuous reading (spinand driver side).
Unfortunately these fixes can't resolve "spinand driver spoofing" case.
Spi controller drivers might need fixes as well.
Signed-off-by: Mikhail Kshevetskiy <mikhail.kshevetskiy@iopsys.eu>
Link: https://github.com/openwrt/openwrt/pull/20295
Signed-off-by: Robert Marko <robimarko@gmail.com>
Should be reset-gpio. Also added GPIO_ACTIVE_HIGH for clarity.
Signed-off-by: Rosen Penev <rosenp@gmail.com>
Link: https://github.com/openwrt/openwrt/pull/20116
Signed-off-by: Robert Marko <robimarko@gmail.com>
The former is deprecated. Fixes dtc warning.
Signed-off-by: Rosen Penev <rosenp@gmail.com>
Link: https://github.com/openwrt/openwrt/pull/20116
Signed-off-by: Robert Marko <robimarko@gmail.com>
The former is deprecated. Fixes dtc warning.
Signed-off-by: Rosen Penev <rosenp@gmail.com>
Link: https://github.com/openwrt/openwrt/pull/20116
Signed-off-by: Robert Marko <robimarko@gmail.com>
The former is deprecated. Fixes dtc warning.
Signed-off-by: Rosen Penev <rosenp@gmail.com>
Link: https://github.com/openwrt/openwrt/pull/20116
Signed-off-by: Robert Marko <robimarko@gmail.com>
The former is deprecated. Fixes dtc warning.
Signed-off-by: Rosen Penev <rosenp@gmail.com>
Link: https://github.com/openwrt/openwrt/pull/20116
Signed-off-by: Robert Marko <robimarko@gmail.com>
The latter is more descriptive in terms of what's going on.
Mostly found with
git grep gpios\ | grep 0\>
git grep gpios\ | grep 1\>
Signed-off-by: Rosen Penev <rosenp@gmail.com>
Link: https://github.com/openwrt/openwrt/pull/20116
Signed-off-by: Robert Marko <robimarko@gmail.com>
The former is deprecated. Fixes dtc warning.
Signed-off-by: Rosen Penev <rosenp@gmail.com>
Link: https://github.com/openwrt/openwrt/pull/20116
Signed-off-by: Robert Marko <robimarko@gmail.com>
In the conversion to nvmem of eax500 and unifi-ac-hd, the address was
set to 0 as is the case with most platforms, but not this one.
The wifi node also needs to be wrapped in a bridge node.
Matches every other device in ipq806x.
Fixes: 148f82ad45 ("ipq806x: use nvmem for wifi mac")
Signed-off-by: Rosen Penev <rosenp@gmail.com>
Link: https://github.com/openwrt/openwrt/pull/20325
Signed-off-by: Robert Marko <robimarko@gmail.com>
This patch adds support for Cudy C200P.
Specifications:
SoC: MediaTek MT7621AT
RAM: 256 MB (DDR3)
Flash: 16 MB (NOR)
POE Chip: IP804AR
Interfaces:
Switch: 1 WAN, 4 LAN (Gigabit)
Gigabit RJ45 PoE Ports on 2~5
Max Power on a Single PoE Ports 30W
PoE Ports : The PoE ports comply with IEEE 802.3at/af standards.
Ports: 1 USB-A 3.0 Ports
LED:
System
PoE Max Status
Link/ACT/PoE Status of Each PoE Port
Physical Buttons:
Reset Button
Power Input:
DC Jack
Power Methods:
DC: 54V 1.11A
802.3at/af PoE
Passive PoE: 24/48V
Max Power Consumption (W):
Total: 60W
PoE: 55W
PoE (when USB Device is plugged in): 50W
No PoE: 5W
Installation:
To install OpenWRT, you need the intermediate firmware from Cudy. (U-boot is locked). After installing the intermediate firmware, you can install OpenWRT via sysupgrade.
Recovery:
TFTP available.
1. Place the recovery.bin in the serving directory of your TFTP server.
2. Set your IP to 192.168.1.88/24.
3. Press the “Reset” button of Cudy router and hold it. Before the Cudy router is powered on and before TFTP start to download the firmware, don't release the “Reset” button.
4. Power on the Cudy router.
5. You can release the reset button only when TFTP starts downloading firmware.
6. When the SYSTEM LED turns solid green, the upgrade is complete.
Serial:
1. Serial connection parameters: 115200 / 8N1
2. Serial connection voltage: 3.3V
PoE is not supported at the time of PR. The IP804R chip is not yet supported by OpenWRT.
Signed-off-by: Marcin Leksmark <lexmark3200@wp.pl>
Link: https://github.com/openwrt/openwrt/pull/20165
Signed-off-by: Hauke Mehrtens <hauke@hauke-m.de>
The A1 and B1 devices are largely the same. The differences
seem to be:
- RTL8218D (A1) vs RTL8218E (B1) PHY for the eight 1 Gbps TP ports
- Aquantia (A1) vs RTL8261N (B1) PHY for the three 10 Gbps TP ports
RTL8218D/E share the same driver and support was added already by
commit c8c187f0f0 ("realtek: add support for RTL8218E").
The RTL8261N is also already supported but it's located at
different addresses compared to the A1 device. This requires
the device tree to be split. As a result, the devices are require
different images.
I found the smi addresses on the forum:
https://forum.openwrt.org/t/support-for-rtl838x-based-managed-switches/57875/3622
And I can conform on my B1 device that this is working.
Co-developed-by: Mathias Kresin <dev@kresin.me>
Signed-off-by: Thomas Martitz <thomas.martitz@mailbox.org>
Link: https://github.com/openwrt/openwrt/pull/20150
Signed-off-by: Hauke Mehrtens <hauke@hauke-m.de>
There are switches which share the same overall hardware design but remove
just a couple of components for the low cost variant. For example, a 8+2
(ethernet+SFP) switch might have a low cost variant which only has 8
ethernet ports. In this case, the PCB will be shared but components for SFP
will just be dropped.
The LED shift registers will be the same between the two switches but the
ports are different. But since the rtl930x_led_init code is trying to
calculate the number of LEDs using the LED ports, the ethernet status ports
will then suddenly be shifted by two ports.
It is therefore necessary to have a mechanism to overwrite the detection of
the ethernet ports in the LED initialization and force some ports to
"virtually there" for the LED controller.
This functionality was already implemented for Plasma Cloud PSX8 (RTL930x)
but some devices using RTL931x might also benefit from a similar feature.
Signed-off-by: Harshal Gohel <hg@simonwunderlich.de>
Co-developed-by: Sven Eckelmann <se@simonwunderlich.de>
Signed-off-by: Sven Eckelmann <se@simonwunderlich.de>
Link: https://github.com/openwrt/openwrt/pull/20300
Signed-off-by: Hauke Mehrtens <hauke@hauke-m.de>
The LED sets must be configured before per-port LEDs are actually assigned.
At the same time, the LED set configuration was basically unreadable and
the RTL930x from commit 2cfb1ecf10 ("rtl930x: Rework per port LED
configuration") does a better job. Instead of moving the old implementation
around, just adopt the one from RTL930x.
Signed-off-by: Harshal Gohel <hg@simonwunderlich.de>
Signed-off-by: Sven Eckelmann <se@simonwunderlich.de>
Link: https://github.com/openwrt/openwrt/pull/20300
Signed-off-by: Hauke Mehrtens <hauke@hauke-m.de>
RTL930x received support for specifying active low/high LEDs in commit
bec9e79a99 ("realtek: dsa: support active-high LEDs"). But this was
completely forgotten on RTL931x.
Signed-off-by: Sven Eckelmann <se@simonwunderlich.de>
Link: https://github.com/openwrt/openwrt/pull/20300
Signed-off-by: Hauke Mehrtens <hauke@hauke-m.de>
The usage of pr_* helper inside a device driver should be avoided. The
dev_* helper provide more context about which device the message actually
is.
Signed-off-by: Sven Eckelmann <se@simonwunderlich.de>
Link: https://github.com/openwrt/openwrt/pull/20300
Signed-off-by: Hauke Mehrtens <hauke@hauke-m.de>
The integration of the LED set initialization for RTL931x added also minor
improvements in the coding style. Just adopt them also for RTL9301x.
Signed-off-by: Sven Eckelmann <se@simonwunderlich.de>
Link: https://github.com/openwrt/openwrt/pull/20300
Signed-off-by: Hauke Mehrtens <hauke@hauke-m.de>
of_property_count_u32_elems returns the number of u32 and not the number of
bytes. It must therefore be checked against the number of u32 in set_config
and not the bytes in set_config.
Fixes: 2cfb1ecf10 ("rtl930x: Rework per port LED configuration")
Signed-off-by: Sven Eckelmann <se@simonwunderlich.de>
Link: https://github.com/openwrt/openwrt/pull/20300
Signed-off-by: Hauke Mehrtens <hauke@hauke-m.de>
There are switches which share the same overall hardware design but remove
just a couple of components for the low cost variant. For example, a 8+2
(ethernet+SFP) switch might have a low cost variant which only has 8
ethernet ports. In this case, the PCB will be shared but components for SFP
will just be dropped.
The LED shift registers will be the same between the two switches but the
ports are different. But since the rtl930x_led_init code is trying to
calculate the number of LEDs using the LED ports, the ethernet status ports
will then suddenly be shifted by two ports.
It is therefore necessary to have a mechanism to overwrite the detection of
the ethernet ports in the LED initialization and force some ports to
"virtually there" for the LED controller.
Signed-off-by: Harshal Gohel <hg@simonwunderlich.de>
Co-developed-by: Sven Eckelmann <se@simonwunderlich.de>
Signed-off-by: Sven Eckelmann <se@simonwunderlich.de>
Link: https://github.com/openwrt/openwrt/pull/20300
Signed-off-by: Hauke Mehrtens <hauke@hauke-m.de>
This commit renames all management network ports of the
SN2100, SN2700, SN3420, and SN3700 switches based
on their PCI address during boot.
For the default network config, the management and
QSFP port(s) are put into the br-lan bridge.
Signed-off-by: Til Kaiser <mail@tk154.de>
Link: https://github.com/openwrt/openwrt/pull/17251
Signed-off-by: Robert Marko <robimarko@gmail.com>
This is Allwinner's ARM926EJ-S core, which is one of its early
products, reappearing in recent compact designs. The SoC includes
32/64Mb memory in the same physical package, and has display and USB
interfaces, allowing for very small footprint boards.
The target consists of basic 6.12 support, with u-boot. Instead of creating
a separate suniv target, as both the kernel and u-boot supports enough of
this SoC by now with minimal patching, add it into sunxi as a subtarget.
Link: https://github.com/openwrt/openwrt/pull/15022
Signed-off-by: Zoltan HERPAI <wigyori@uid0.hu>
The first RTL931x devices make their way into OpenWrt. Their copper
ports are driven by different interfaces modes like 10G_QXGMII or
Realtek proprietary XSGMII. The DSA driver has no proper handling
for theses modes implemented yet. So a lot is auto-mapped to USXGMII
internally. As soon as the SerDes setup activates this (wrong) mode
the PHY connectivity breaks.
Disable this mode for now and rely on the proper U-Boot setup.
Signed-off-by: Markus Stockhausen <markus.stockhausen@gmx.de>
Link: https://github.com/openwrt/openwrt/pull/20292
Signed-off-by: Robert Marko <robimarko@gmail.com>
Now the NAND targets have real devices that need to be built.
Remove the source-only flag to make the images available.
Signed-off-by: Markus Stockhausen <markus.stockhausen@gmx.de>
Link: https://github.com/openwrt/openwrt/pull/20255
Signed-off-by: Robert Marko <robimarko@gmail.com>
The Realtek NAND kernel configuration has some shortcomings.
Fix this as follows:
- MTD_NAND_ECC_REALTEK selects MTD_NAND_ECC and this selects
MTD_NAND_CORE. For consistency add both config options.
- The partition layout of the Linksys switches requires some tricky
concatenation to keep dual boot active. Add CONFIG_MTD_VIRT_CONCAT
Signed-off-by: Markus Stockhausen <markus.stockhausen@gmx.de>
Link: https://github.com/openwrt/openwrt/pull/20255
Signed-off-by: Robert Marko <robimarko@gmail.com>
Userspace handling is deprecated.
Also handle 2.4ghz LED in ath9k instead of generic.
Signed-off-by: Rosen Penev <rosenp@gmail.com>
Link: https://github.com/openwrt/openwrt/pull/20269
Signed-off-by: Hauke Mehrtens <hauke@hauke-m.de>
Plasma Cloud PAX1800-Lite is a dual-band Wi-Fi 6 router, based on MediaTek
MT7621A + MT79x5D platform.
Specifications:
- SOC: MT7621AT (880 MHz)
- DRAM: DDR3 448 MiB (Nanya NT5CC256M16DP-DI)
- Flash: 2 MiB SPI NOR (S25FL016K) + 128 MB SPI NAND (W25N02KVZEIR)
- Ethernet: 1x 10/100/1000 Mbps (SOC's built-in switch, with PoE+)
- Wi-Fi: 2x2:2 2.4/5 GHz (MT7905DAN + MT7975DN)
(MT7905DAN doesn't support background DFS scan/BT)
- LED: tri-color LED for status (red, blue, green)
- Buttons: 1x (reset)
- Antenna: 4x internal, non-detachable omnidirectional
- UART: 1x 4-pin (2.54 mm pitch, marked as "3V3 G/RX GND W/TX")
- Power: 12 V DC/2 A (DC jack)
MAC addresses:
WAN: 54:9C:27:xx:xx:00 (factory 0x3fff4, device label)
2.4 GHz: 54:9C:27:xx:xx:02 (factory 0x4, device label +2)
5 GHz: 54:9C:27:xx:xx:08 (factory 0xa, device label +8)
Flashing instructions:
======================
Various methods can be used to install the actual image on the flash.
Two easy ones are:
ap51-flash
----------
The tool ap51-flash (https://github.com/ap51-flash/ap51-flash) should be
used to transfer the image to the u-boot when the device boots up.
initramfs from TFTP
-------------------
The serial console (115200 8N1) must be used to access the u-boot shell
during bootup. It can then be used to first boot up the initramfs image
from a TFTP server (here with the IP 192.168.1.21):
setenv serverip 192.168.1.21
setenv ipaddr 192.168.1.1
tftpboot 0x83001000 <filename-of-initramfs-kernel>.bin && bootm $fileaddr
The actual sysupgrade image can then be transferred (on the LAN port) to the
device via
scp <filename-of-squashfs-sysupgrade>.bin root@192.168.1.1:/tmp/
On the device, the sysupgrade must then be started using
sysupgrade -n /tmp/<filename-of-squashfs-sysupgrade>.bin
Signed-off-by: Sven Eckelmann (Plasma Cloud) <se@simonwunderlich.de>
Link: https://github.com/openwrt/openwrt/pull/20152
Signed-off-by: Hauke Mehrtens <hauke@hauke-m.de>
After extracting the EEPROMs of different devices, only the 0x4 address is unique.
Use the 0x4 address as the LAN address, and the LAN+1 address as the WAN address.
Signed-off-by: Coia Prant <coiaprant@gmail.com>
Link: https://github.com/openwrt/openwrt/pull/20256
Signed-off-by: Hauke Mehrtens <hauke@hauke-m.de>
According to the MT7628 hardware datasheet:
- GPIO/4 was originally used for I2C, but is now used as the Modem Power.
- GPIO/5 was originally used for I2C, but is now used as the SIM card select. (n/a for this device)
- GPIO/6 was originally used for SPI CS1, but is now used as the Serial mode switch.
- GPIO/36 was originally used for PERST, but is now used as the GPS OE. (n/a for this device)
- GPIO/38 was originally used for WDT, but is now used as the Modem2 Power. (n/a for this device)
- GPIO/44 was used for WLED_AN, but is now controlled by `gpio-leds`.
Corrected pinctrl to ensure it works properly in the future.
Signed-off-by: Coia Prant <coiaprant@gmail.com>
Link: https://github.com/openwrt/openwrt/pull/20256
Signed-off-by: Hauke Mehrtens <hauke@hauke-m.de>
Now the rtl931x target has real devices that need to be built. Remove the
source-only flag to make the images available.
Signed-off-by: Sven Eckelmann <se@simonwunderlich.de>
Link: https://github.com/openwrt/openwrt/pull/20172
Signed-off-by: Hauke Mehrtens <hauke@hauke-m.de>
The Plasma Cloud ESX28 Switch is a 24 + 4 port multi-GBit switch with
24x 10/100/1000/2500BaseT Ethernet ports and 4x SFP+ module slot.
Hardware:
- RTL9312C SoC
- Macronix MX25L25645G (32MB flash)
- 512MB DDR3 SDRAM
- RTL8231 GPIO extender to control the port LEDs
- 6x RTL8224 4x 10m/100m/1/2.5 Gigabit PHY
- SFP+ 4x 10GBit slot
The switch is powered directly via AC.
The external RS232 serial connector (RJ45, Cisco pinout) can be used to
access the terminal. Serial connection is via 115200 baud, 8N1.
A reset button is accessible through a hole in the front panel.
Installation
------------
* The device can be flashed by using sysupgrade command. Either from the
original vendor firmware or using an initramfs (see "Debug")
* Connect serial on front panel. Connection parameters: 115200 8N1
* The image must be copied using scp to /tmp of the device
scp openwrt-realtek-rtl931x-plasmacloud_esx28-squashfs-sysupgrade.bin root@[IP address of the device]:/tmp/
* start sysupgrade without saving the original vendor configuration
sysupgrade -n /tmp/openwrt-realtek-rtl931x-plasmacloud_esx28-squashfs-sysupgrade.bin
Installation via u-boot
-----------------------
If you have an TFTP server connected to the switch, it is possible to
directly install the device using the factory image from u-boot
# setup networking and IP of TFP server
rtk network on
setenv ipaddr 10.100.100.99
setenv serverip 10.100.100.20
# get factory image
tftp 0x84000000 factory.bin
# erase firmware partitions
sf probe 0
sf erase 0x5e0000 0x1a20000
# write firmware to both partitions
sf write ${fileaddr} 0x5e0000 ${filesize}
sf write ${fileaddr} 0x12f0000 ${filesize}
# adjust the boot commands
setenv bootargs "mtdparts=spi0.0:768k(u-boot),64k(u-boot-env),64k(u-boot-env2),5120k(reserved),13376k(inactive),13376k(firmware2)"
setenv bootcmd "rtk init; bootm 0xb52f0000"
# restart
reset
Debug
-----
* Connect serial on front panel. Connection parameters: 115200 8N1.
* A tftp server is required, tftpd-hpa works well.
* Power the device, at U-Boot start rapidly hit Esc key to stop autoboot
* Enter passwords: "1234" or "plasmapsx"
* Enable network:
rtk network on
* Change ip address of device:
setenv ipaddr 192.168.1.6
* Download initramfs from TFTP server:
tftpboot 0x84000000 192.168.1.111:openwrt-realtek-rtl931x-plasmacloud_esx28-initramfs-kernel.bin
* Boot loaded file:
bootm 0x84000000
Signed-off-by: Harshal Gohel <hg@simonwunderlich.de>
Co-developed-by: Sven Eckelmann <se@simonwunderlich.de>
Signed-off-by: Sven Eckelmann <se@simonwunderlich.de>
Link: https://github.com/openwrt/openwrt/pull/20172
Signed-off-by: Hauke Mehrtens <hauke@hauke-m.de>
The Plasma Cloud PSX28 Switch is a 24 + 4 port multi-GBit switch with
24x 10/100/1000/2500BaseT Ethernet ports and 4x SFP+ module slot.
Hardware:
- RTL9312C SoC
- Macronix MX25L25645G (32MB flash)
- 512MB DDR3 SDRAM
- RTL8231 GPIO extender to control the port LEDs
- 6x RTL8224 4x 10m/100m/1/2.5 Gigabit PHY
- SFP+ 4x 10GBit slot
- RTL8239 POE++ PSE controller with frontend MCU
The switch is powered directly via AC.
The external RS232 serial connector (RJ45, Cisco pinout) can be used to
access the terminal. Serial connection is via 115200 baud, 8N1.
A reset button is accessible through a hole in the front panel.
Installation
------------
* The device can be flashed by using sysupgrade command. Either from the
original vendor firmware or using an initramfs (see "Debug")
* Connect serial on front panel. Connection parameters: 115200 8N1
* The image must be copied using scp to /tmp of the device
scp openwrt-realtek-rtl931x-plasmacloud_psx28-squashfs-sysupgrade.bin root@[IP address of the device]:/tmp/
* start sysupgrade without saving the original vendor configuration
sysupgrade -n /tmp/openwrt-realtek-rtl931x-plasmacloud_psx28-squashfs-sysupgrade.bin
Installation via u-boot
-----------------------
If you have an TFTP server connected to the switch, it is possible to
directly install the device using the factory image from u-boot
# setup networking and IP of TFP server
rtk network on
setenv ipaddr 10.100.100.99
setenv serverip 10.100.100.20
# get factory image
tftp 0x84000000 factory.bin
# erase firmware partitions
sf probe 0
sf erase 0x5e0000 0x1a20000
# write firmware to both partitions
sf write ${fileaddr} 0x5e0000 ${filesize}
sf write ${fileaddr} 0x12f0000 ${filesize}
# adjust the boot commands
setenv bootargs "mtdparts=spi0.0:768k(u-boot),64k(u-boot-env),64k(u-boot-env2),5120k(reserved),13376k(inactive),13376k(firmware2)"
setenv bootcmd "rtk init; bootm 0xb52f0000"
# restart
reset
Debug
-----
* Connect serial on front panel. Connection parameters: 115200 8N1.
* A tftp server is required, tftpd-hpa works well.
* Power the device, at U-Boot start rapidly hit Esc key to stop autoboot
* Enter passwords: "1234" or "plasmapsx"
* Enable network:
rtk network on
* Change ip address of device:
setenv ipaddr 192.168.1.6
* Download initramfs from TFTP server:
tftpboot 0x84000000 192.168.1.111:openwrt-realtek-rtl931x-plasmacloud_psx28-initramfs-kernel.bin
* Boot loaded file:
bootm 0x84000000
Signed-off-by: Harshal Gohel <hg@simonwunderlich.de>
Co-developed-by: Sven Eckelmann <se@simonwunderlich.de>
Signed-off-by: Sven Eckelmann <se@simonwunderlich.de>
Link: https://github.com/openwrt/openwrt/pull/20172
Signed-off-by: Hauke Mehrtens <hauke@hauke-m.de>
To be able to read out the ethaddr from the u-boot environment for MAC
address configuration, it is required to also enable the NVMEM layout
parsing code for the U-Boot env layout.
Signed-off-by: Sven Eckelmann <se@simonwunderlich.de>
Link: https://github.com/openwrt/openwrt/pull/20172
Signed-off-by: Hauke Mehrtens <hauke@hauke-m.de>
OpenWrt buildroot will compile all dtbs defined in target to
$(KDIR)/image-$(DEVICE_DTS).dtb, so make use of it to allow us
debug and use external dtbs easier without patching kernel Makefile.
This also fixes commit 5c724939c3 which forgot to update DTS_DIR
in KERNEL variable.
Fixes: 5c724939c3 ("rockchip: add DEVICE_DTS_DIR definition")
Signed-off-by: Tianling Shen <cnsztl@immortalwrt.org>
Link: https://github.com/openwrt/openwrt/pull/20286
Signed-off-by: Hauke Mehrtens <hauke@hauke-m.de>
If transmissions are done outside of the DSA switch (directly from the CPU
port), the STP state must not block the transmission. Otherwise, STP frames
are not correctly submitted and the STP frames cannot correctly detect
loops before switching a port in the forwarding state.
The same applies for the LLDP frames. These must be submitted independent
of the STP state to identify neighbors or configure POE limits.
It is not necessary to filter specific destination mac addresses because
the transmission was done outside the bridge/switch in the first place. The
transmission is therefore forced.
Signed-off-by: Issam Hamdi <ih@simonwunderlich.de>
Co-developed-by: Sven Eckelmann <sven@narfation.org>
Signed-off-by: Sven Eckelmann <sven@narfation.org>
Link: https://github.com/openwrt/openwrt/pull/20184
Signed-off-by: Robert Marko <robimarko@gmail.com>
The RTL930X and RTL931X SoCs support port-based, flow-based, and
RSPAN-based mirroring. Like for other SoCs from the realtek target, only
the port based port mirroring can be exposed using Linux's tc subsystem.
The port_mirror_add() implementation was updated with the following
considerations for RTL93xx SoCs:
* mirrored packets must pass through the TX pipeline of the mirroring
port, so they are subject to configuration such as VLAN tagging,
remarking, and EVC
* when a packet hits both source ports (SPM) and destination port (DPM) of
a mirror group, the egress port traffic will be mirrored
The port_mirror_del() function doesn't require any modifications.
Signed-off-by: Sharadanand Karanjkar <sk@simonwunderlich.de>
Co-developed-by: Sven Eckelmann <se@simonwunderlich.de>
Signed-off-by: Sven Eckelmann <se@simonwunderlich.de>
Link: https://github.com/openwrt/openwrt/pull/20264
Signed-off-by: Robert Marko <robimarko@gmail.com>
Instead of using a lot of if-else blocks in the port mirror code, provide
SoC specific function which calculates the SoC specific portions. The
generic part of the port mirroring code can then simply operate on the
calculated register addresses and values.
Suggested-by: Markus Stockhausen <markus.stockhausen@gmx.de>
Signed-off-by: Sven Eckelmann <se@simonwunderlich.de>
Link: https://github.com/openwrt/openwrt/pull/20264
Signed-off-by: Robert Marko <robimarko@gmail.com>
The FIT loadaddr on RK3308/RK3566/RK3568/RK358x is 0x02000000
instead of 0x02080000, while on RK3576 it's 0x42000000, which is
quite different from the former SoCs and incompatible with current
kernel loadaddr value.
Signed-off-by: Tianling Shen <cnsztl@immortalwrt.org>
Link: https://github.com/openwrt/openwrt/pull/20041
Signed-off-by: Hauke Mehrtens <hauke@hauke-m.de>
Replace the pending I2C backport patches for RTL93XX added in
44655c97bb with the upstreamed variants. The patches have been accepted
upstream in the meantime and are included in v6.17 or v6.18.
Signed-off-by: Jonas Jelonek <jelonek.jonas@gmail.com>
Link: https://github.com/openwrt/openwrt/pull/20273
Signed-off-by: Robert Marko <robimarko@gmail.com>
The RTL931x has next to its SPI flash controller a SPI master interface. It
is connected to
* SPI_CS#[1,0]: AH22 , AK22 (aka: GPIO 12, 11)
* SPI_CLK: AL23 (aka: GPIO 8)
* SPI_MISO: AM23 (aka: GPIO 9)
* SPI_MOSI: AL22 (aka: GPIO 10)
It is not the same as the SPI flash controller which uses pins:
* SPI_CS#[1,0]: B24, A24
* SPI_SCLK: A23
* SPI_SDI/SIO0: B21
* SPO_SDO_SIO1: B21
* SPI_SIO2: A22
* SPI_SIO3: B22
* SPI_RSTN: B23
As shown above, the SPI master controller shares its pin with GPIO 8, 9,
10, 11, 12. In some upcoming devices (like the Plasma Cloud PSX28/ESX28),
they will be used for SFP cage signaling. These pins must therefore be
switched manually to the GPIO mode.
The SPI_CTRL0 register provides all necessary configuration to enforce the
GPIO mode of the pins. And until more requirements (and a correct driver)
for the SPI master controller arise, it is therefore possible to use
pinctrl-single to configure it using the devicetree.
Previously the ethernet driver did configure the SPI master controller for
31.25 MHz. It is unknown for which kind of device this was originally made
and what was actually connected there. But this manual write to the
register conflicts potentially with the write of the pinctrl driver to the
same register. Luckily, we don't need this SPI speed configuration in the
ethernet driver. Still, to allow this device an easy migration, the
`spi0-31mhz` configuration was already prepared.
Signed-off-by: Sven Eckelmann <se@simonwunderlich.de>
Link: https://github.com/openwrt/openwrt/pull/20263
Signed-off-by: Robert Marko <robimarko@gmail.com>
The RTL8224 used by Plasma Cloud PSX8/PSX10 is not using USXGMII but
USXGMII 10G-QXGMII mode. The correct phy-mode string for this is
"10g-qxgmii".
Signed-off-by: Sven Eckelmann <se@simonwunderlich.de>
Link: https://github.com/openwrt/openwrt/pull/20239
Signed-off-by: Robert Marko <robimarko@gmail.com>
The current SerDes implementation for RTL931x handles 10G-QXGMII via the
"usxgmii" PHY mode. This is not 100% correct because it is not a single
port with 10G (max) but 4 ports with 2.5G each.
To allow setting of the "10g-qxgmii" phy mode, just change the code for now
to use the same codepaths as USXGMII. This has to be cleaned up further
during the SerDes driver rewrites.
Suggested-by: Markus Stockhausen <markus.stockhausen@gmx.de>
Signed-off-by: Sven Eckelmann <se@simonwunderlich.de>
Link: https://github.com/openwrt/openwrt/pull/20239
Signed-off-by: Robert Marko <robimarko@gmail.com>
The Plasma Cloud PSX28 and ESX28 are using RTL8224 as ethernet PHY. This
phy works perfectly fine on PSX8/PSX10 (RTL930x) but failed to establish a link
on rtl931x because the upstream realtek phy driver was not enabled.
Signed-off-by: Sven Eckelmann <se@simonwunderlich.de>
Link: https://github.com/openwrt/openwrt/pull/20239
Signed-off-by: Robert Marko <robimarko@gmail.com>
Deprecated. Replaced with nvmem.
Signed-off-by: Rosen Penev <rosenp@gmail.com>
Link: https://github.com/openwrt/openwrt/pull/20176
Signed-off-by: Robert Marko <robimarko@gmail.com>
Userspace handling is deprecated.
Signed-off-by: Rosen Penev <rosenp@gmail.com>
Link: https://github.com/openwrt/openwrt/pull/20176
Signed-off-by: Robert Marko <robimarko@gmail.com>
Userspace handling is deprecated.
Signed-off-by: Rosen Penev <rosenp@gmail.com>
Link: https://github.com/openwrt/openwrt/pull/20176
Signed-off-by: Robert Marko <robimarko@gmail.com>
Userspace handling is deprecated.
Signed-off-by: Rosen Penev <rosenp@gmail.com>
Link: https://github.com/openwrt/openwrt/pull/20176
Signed-off-by: Robert Marko <robimarko@gmail.com>
Upstream will get support for the Realtek ECC engine with 6.18.
To make use of this in Openwrt
- backport upstream patches
- change config so that ECC will be built for nand subtargets
- define ECC engine in RTL93xx DTS.
Signed-off-by: Markus Stockhausen <markus.stockhausen@gmx.de>
Link: https://github.com/openwrt/openwrt/pull/19746
Signed-off-by: Robert Marko <robimarko@gmail.com>
During testing, we discovered that when adding a new offload FDB rule
on certain VLANs and then delete it, does not work as expected.
Steps to Reproduce:
* Create VLAN 4094 on the port lan1:
bridge vlan add vid 4094 dev lan1 pvid
* Add a new FDB entry on port lan1 for VLAN 4094:
bridge fdb add 00:01:02:22:33:44 dev lan1 vlan 4094 master permanent
* Delete the new FDB entry on port lan1 for VLAN4094
bridge fdb del 00:01:02:22:33:44 dev lan1 vlan 4094 master permanent
Root Cause:
The failure occurs because the hash_msb flag is not set correctly
based on the VLAN ID when adding a new L2 entry.
Signed-off-by: Issam Hamdi <ih@simonwunderlich.de>
Signed-off-by: Sven Eckelmann <se@simonwunderlich.de>
Link: https://github.com/openwrt/openwrt/pull/20183
Signed-off-by: Robert Marko <robimarko@gmail.com>
Align GS1900-10HP dts with other realtek devices to reduce the risk of device
specific regressions with the upcoming driver cleanup/rewrite.
Signed-off-by: Bjørn Mork <bjorn@mork.no>
Link: https://github.com/openwrt/openwrt/pull/20228
Signed-off-by: Robert Marko <robimarko@gmail.com>
Parse the pcs-handle property regardless of phy-handle
Signed-off-by: Bjørn Mork <bjorn@mork.no>
Link: https://github.com/openwrt/openwrt/pull/20228
Signed-off-by: Robert Marko <robimarko@gmail.com>
Check if the uploaded image matches the version of RouterBOOT before
proceeding with sysupgrade on MikroTik devices with NOR flash.
Signed-off-by: Daniel Golle <daniel@makrotopia.org>
RouterBOOT v7 for NOR devices does not support the historic yaffs
"kernel" ELF boot method.
Generate a compatible kernel
Signed-off-by: John Thomson <git@johnthomson.fastmail.com.au>
RouterBOOT v7 for NOR devices does not support the historic yaffs
"kernel" ELF boot method.
Generate a compatible kernel
Signed-off-by: John Thomson <git@johnthomson.fastmail.com.au>
RouterBOOT v7 for NOR devices does not support the historic yaffs
"kernel" ELF boot method.
Generate a compatible kernel
Signed-off-by: John Thomson <git@johnthomson.fastmail.com.au>
Add missing syscon compatible for scuclk node.
Fix the unit-address of the scuclk node.
This fixes the pcs driver error:
airoha-pcs 1fa08000.pcs: probe with driver airoha-pcs failed with error -22
airoha-pcs 1fa09000.pcs: probe with driver airoha-pcs failed with error -22
Fixes: c3d70b1 ("airoha: en7581: Add support for external PHY")
Signed-off-by: Aleksander Jan Bajkowski <olek2@wp.pl>
Signed-off-by: Chukun Pan <amadeus@jmu.edu.cn>
Link: https://github.com/openwrt/openwrt/pull/20190
Signed-off-by: Christian Marangi <ansuelsmth@gmail.com>
The pinctrl driver for airoha was expecting a function name that was
not a string, but was passed one. Removing #string fixed this issue.
Fixes: c5b12fc ("airoha: Introduce support for Airoha AN7583 SoC")
Signed-off-by: Chukun Pan <amadeus@jmu.edu.cn>
Link: https://github.com/openwrt/openwrt/pull/20190
Signed-off-by: Christian Marangi <ansuelsmth@gmail.com>
This patch already exists in generic/backport-6.12.
Fixes: 122135b ("airoha: an7581: add support for kernel 6.12")
Signed-off-by: Chukun Pan <amadeus@jmu.edu.cn>
Link: https://github.com/openwrt/openwrt/pull/20190
Signed-off-by: Christian Marangi <ansuelsmth@gmail.com>
All devices under airoha use dts directory under the target,
so update the default DEVICE_DTS_DIR. Also set the default
DEVICE_DTS based on the SoC name for non-dev boards.
Signed-off-by: Chukun Pan <amadeus@jmu.edu.cn>
Link: https://github.com/openwrt/openwrt/pull/20190
Signed-off-by: Christian Marangi <ansuelsmth@gmail.com>
Add support for swapping the Serdes TX line on RTL8261N PHYs.
This is used on an Arcadyan Mozart board where the Serdes TX is swapped
on the PHY (instead of on the Soc) to permit support of SFP module by
using toggling the integrated MUX.
Link: https://github.com/openwrt/openwrt/pull/20227
Signed-off-by: Christian Marangi <ansuelsmth@gmail.com>
Update with make kernel_oldconfig CONFIG_TARGET=target. Also disable
CONFIG_POSIX_MQUEUE, as it's available in the OpenWrt configuration.
Signed-off-by: Rui Salvaterra <rsalvaterra@gmail.com>
This is an automatically generated commit which aids following Kernel patch
history, as git will see the move and copy as a rename thus defeating the
purpose.
For the original discussion see:
https://lists.openwrt.org/pipermail/openwrt-devel/2023-October/041673.html
Signed-off-by: Rui Salvaterra <rsalvaterra@gmail.com>
This is an automatically generated commit.
When doing `git bisect`, consider `git bisect --skip`.
Signed-off-by: Rui Salvaterra <rsalvaterra@gmail.com>
Userspace handling is deprecated.
Also convert custom LED to one handled by ath9k.
Signed-off-by: Rosen Penev <rosenp@gmail.com>
Link: https://github.com/openwrt/openwrt/pull/20112
Signed-off-by: Hauke Mehrtens <hauke@hauke-m.de>
Upstream DTS in 6.12 contains many changes from our copy.
Move the remaining diff, which is LED aliases, USB ports and partition
labels into a patch and drop the full copy.
Signed-off-by: Stefan Kalscheuer <stefan@stklcode.de>
Link: https://github.com/openwrt/openwrt/pull/19786
Signed-off-by: Hauke Mehrtens <hauke@hauke-m.de>
Upstream DTS in 6.12 is almost identical to our copy.
Move the partition label change into a patch and drop the full copy.
Signed-off-by: Stefan Kalscheuer <stefan@stklcode.de>
Link: https://github.com/openwrt/openwrt/pull/19786
Signed-off-by: Hauke Mehrtens <hauke@hauke-m.de>
Upstream DTS in 6.12 is almost identical to our copy.
Move LED and partition tweaks into a patch and drop the full copy.
Signed-off-by: Stefan Kalscheuer <stefan@stklcode.de>
Link: https://github.com/openwrt/openwrt/pull/19786
Signed-off-by: Hauke Mehrtens <hauke@hauke-m.de>
Upstream DTS is almost identical to our copy. Move network aliases and
phy-mode into a patch and drop the full copy.
Signed-off-by: Stefan Kalscheuer <stefan@stklcode.de>
Link: https://github.com/openwrt/openwrt/pull/19786
Signed-off-by: Hauke Mehrtens <hauke@hauke-m.de>
Upstream DTS in 6.12 is almost identical to our copy.
The only non-trivial difference is ethernet aliases. Move this change
into a patch and drop the full copy.
Signed-off-by: Stefan Kalscheuer <stefan@stklcode.de>
Link: https://github.com/openwrt/openwrt/pull/19786
Signed-off-by: Hauke Mehrtens <hauke@hauke-m.de>
All changes to the DTS have been applied upstream, remove our DTS copy.
This change effectively drops the workaround for the 2500Base-x
interface which was broken until kernel 5.15 and removes redundant
address-/size-cells.
Signed-off-by: Stefan Kalscheuer <stefan@stklcode.de>
Link: https://github.com/openwrt/openwrt/pull/19786
Signed-off-by: Hauke Mehrtens <hauke@hauke-m.de>
Point the driver to the precal section of the emmc "factory" partition.
Signed-off-by: Bjørn Mork <bjorn@mork.no>
Link: https://github.com/openwrt/openwrt/pull/20154
Signed-off-by: Hauke Mehrtens <hauke@hauke-m.de>
Replace the hotplug script with nvmem now that loading data from emmc
partitions is supported.
Signed-off-by: Bjørn Mork <bjorn@mork.no>
Link: https://github.com/openwrt/openwrt/pull/20154
Signed-off-by: Hauke Mehrtens <hauke@hauke-m.de>
Avoids the occacial lost race, where VAPs are created before the hotplug
script has updated the phy mac address.
Signed-off-by: Bjørn Mork <bjorn@mork.no>
Link: https://github.com/openwrt/openwrt/pull/20154
Signed-off-by: Hauke Mehrtens <hauke@hauke-m.de>
Prior to the deletion of the old IXP4xx codebase we supported
Actiontec MI424WR A, C and D.
This brings back the support using the upstream device trees
from Linux.
Link: https://github.com/openwrt/openwrt/pull/20066
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
This corrects the WRV54G device tree and adds patches for
MI424WR alongh with GPIO MMIO support for the same.
Link: https://github.com/openwrt/openwrt/pull/20066
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
Add missing bluetooth support btif in dts.
Signed-off-by: Elwin Huang <s09289728096@gmail.com>
Link: https://github.com/openwrt/openwrt/pull/20181
Signed-off-by: Robert Marko <robimarko@gmail.com>
Introduce initial support for Airoha AN7583 SoC and add all the required
patch for basic functionality of the SoC.
Airoha AN7583 is based on Airoha EN7581 SoC with some major changes on
the PHY handling and Serdes. It can be see as a lower spec of EN7581
with modern and simplified implementations.
All the patch are sent upstream and are pending revision. Support for
PCIe and USB will come later as soon as DT structure is accepted
upstream.
Signed-off-by: Christian Marangi <ansuelsmth@gmail.com>
To correctly init the CPUFreq driver, CPUFREQ_DT is needed. While at it
also enable CPU HOTPLUG kconfig to support hotplug of secondary CPU.
Signed-off-by: Christian Marangi <ansuelsmth@gmail.com>
This add a pending version of the Airoha PCS driver to add support for
External PHY. The Airoha PCS driver will receive some minor modification
once we the PCS subsystem will be defined upstream.
Add all the required node for GDM2 and GDM4 and enable the PCS config.
Signed-off-by: Christian Marangi <ansuelsmth@gmail.com>
There are SFP modules which only work if auto-negotiation is disabled,
like some "OEM SFP-2.5G-T" modules. This also seems to be necessary for
RTL8226/RTL8221B PHYs when using 2500Base-X.
However, currently, it is always enabled, so add support for configuring
it to make these SFP modules and PHYs work.
This also adds locking which should be useful for future extension of
the PCS driver.
Signed-off-by: Jan Hoffmann <jan@3e8.eu>
Link: https://github.com/openwrt/openwrt/pull/19518
Signed-off-by: Robert Marko <robimarko@gmail.com>
Now that MDIO and DSA driver only look for pcs-handle drop all
usages of the sds property.
Signed-off-by: Markus Stockhausen <markus.stockhausen@gmx.de>
Link: https://github.com/openwrt/openwrt/pull/20148
Signed-off-by: Robert Marko <robimarko@gmail.com>
In the Realtek dts the pcs-handle property at the switch port is the
successor of the sds property at the phy. Rearrange the MDIO and DSA
driver so they always look at the new attribute.
Remark! This code can be dropped completely if the new PCS driver
is fully featured. But this will take some time.
Signed-off-by: Markus Stockhausen <markus.stockhausen@gmx.de>
Link: https://github.com/openwrt/openwrt/pull/20148
Signed-off-by: Robert Marko <robimarko@gmail.com>
Switch Airoha targets to 6.12 and drop 6.6 support.
Signed-off-by: Andrew LaMarche <andrewjlamarche@gmail.com>
Link: https://github.com/openwrt/openwrt/pull/20137
Signed-off-by: Robert Marko <robimarko@gmail.com>
en7523 compilation on 6.12 fails with a no prototype warning. Fix this
by declaring max_transfer_size and transfer_one_message static.
Signed-off-by: Andrew LaMarche <andrewjlamarche@gmail.com>
Link: https://github.com/openwrt/openwrt/pull/20138
Signed-off-by: Hauke Mehrtens <hauke@hauke-m.de>
Zyxel labels their switch revisions A1, B1, ... and not v1, v2, ...
Rename the supported device to A1 to make it clear this is the only
known compatible hardware revision.
Also add a compatible for seamless upgrade.
Signed-off-by: Stijn Segers <foss@volatilesystems.org>
Link: https://github.com/openwrt/openwrt/pull/20118
Signed-off-by: Robert Marko <robimarko@gmail.com>
Zyxel labels their switch revisions A1, B1, ... and not v1, v2, ...
Rename the devices as such in OpenWrt to match the labels. Of note:
the first (A1) revision is never labeled as such on the label, just
in the web UI. Provide compatibles for seamless sysupgrade.
For a recent overview of Zyxel GS1900 series revisions, see the
table linked in https://forum.openwrt.org/t//57875/3874.
Signed-off-by: Stijn Segers <foss@volatilesystems.org>
Link: https://github.com/openwrt/openwrt/pull/20118
Signed-off-by: Robert Marko <robimarko@gmail.com>
Zyxel labels their switch revisions A1, B1, ... and not v1, v2, ...
Rename the devices as such in OpenWrt to match the labels. Of note:
the first (A1) revision is never labeled as such on the label, just
in the web UI. Provide compatibles for seamless sysupgrade.
For a recent overview of Zyxel GS1900 series revisions, see the
table linked in https://forum.openwrt.org/t//57875/3874.
Signed-off-by: Stijn Segers <foss@volatilesystems.org>
Link: https://github.com/openwrt/openwrt/pull/20118
Signed-off-by: Robert Marko <robimarko@gmail.com>
Userspace handling is deprecated.
Signed-off-by: Rosen Penev <rosenp@gmail.com>
Link: https://github.com/openwrt/openwrt/pull/17344
Signed-off-by: Robert Marko <robimarko@gmail.com>
Userspace handling is deprecated.
Move the mac address patch to 10_fix_wifi_mac.
This uses an AR9287, which uses a smaller size for its calibration.
The PCI ID is also wrong.
Signed-off-by: Rosen Penev <rosenp@gmail.com>
Link: https://github.com/openwrt/openwrt/pull/19864
Signed-off-by: Robert Marko <robimarko@gmail.com>
This commit fixes stability issues on certain RAX3000Me devices. Some
devices has DDR3 RAM which don't able to work reliably at 2133 MHz
and require special BL2 (1866 MHz RAM freq).
Fixes: https://github.com/openwrt/openwrt/issues/20046
Signed-off-by: Mikhail Zhilkin <csharper2005@gmail.com>
Link: https://github.com/openwrt/openwrt/pull/20059
Signed-off-by: Hauke Mehrtens <hauke@hauke-m.de>
This patch has already been accepted and landed in 6.17.
Signed-off-by: Aleksander Jan Bajkowski <olek2@wp.pl>
Link: https://github.com/openwrt/openwrt/pull/20132
Signed-off-by: Hauke Mehrtens <hauke@hauke-m.de>
No functional changes intended.
Signed-off-by: Aleksander Jan Bajkowski <olek2@wp.pl>
Link: https://github.com/openwrt/openwrt/pull/20131
Signed-off-by: Robert Marko <robimarko@gmail.com>
No functional changes intended.
Fixes warning:
/linux/arch/arm64/boot/dts/airoha/en7581-gemtek-w1700k.dtb: i2c1@1fbf8100 (mediatek,mt7621-i2c): status: 'oneOf' conditional failed, one must be fixed:
['disable'] is not of type 'object'
'disable' is not one of ['okay', 'disabled', 'reserved', 'fail', 'fail-needs-probe']
from schema $id: http://devicetree.org/schemas/dt-core.yaml#
Signed-off-by: Aleksander Jan Bajkowski <olek2@wp.pl>
Link: https://github.com/openwrt/openwrt/pull/20131
Signed-off-by: Robert Marko <robimarko@gmail.com>
Now that there is a dedicated PCS driver remove the old functions
from the DSA driver and make use of the new ones.
Signed-off-by: Markus Stockhausen <markus.stockhausen@gmx.de>
Link: https://github.com/openwrt/openwrt/pull/20129
Signed-off-by: Hauke Mehrtens <hauke@hauke-m.de>
For all switch ports where the assigned SerDes is known, add the new
pcs-handle to the dts. Leave the existing <sds> assignments to the
PHYs as is because the driver has not yet been updated.
Signed-off-by: Markus Stockhausen <markus.stockhausen@gmx.de>
Link: https://github.com/openwrt/openwrt/pull/20111
Signed-off-by: Robert Marko <robimarko@gmail.com>
This commit adds support for Buffalo WSR-6000AX8 and AX8P models.
Hardware
--------
SOC: MediaTek MT7986B
RAM: 512MB
FLASH: 128MB SPI-NAND (Winbond)
WIFI 2.4G: (Embedded in SOC) b/g/n/ax, MIMO 4x4
WIFI 5G: (Embedded in SOC) a/n/ac/ax, MIMO 4x4
ETHERNET: 2.5GbE MaxLinear GPY211C (eth1: WAN)
ETHERNET: MediaTek MT7531AE 3xGbE (eth0: LAN1, LAN2, LAN3)
UART: 3.3V 115200 8N1
Serial(UART) Pin Layout
-----------------------
+-------+-------+-------+-------+
J4 | RX | TX | GND |(3.3V) |
+-------+-------+-------+-------+
(Bottom Side)
MAC Address Table
-----------------
lan1-3: board_data 0x4(text)
eth1/WAN: board_data 0x4(text)
WIFI 2.4G: lan1 + 2
WIFI 5G: lan1 + 9
Installation
------------
1. Set up a TFTP server with the IP address "192.168.11.2".
2. Rename the OpenWrt initramfs image to "linux.ubi-recovery" and place it
in the TFTP server's root directory.
3. While holding down the AOSS button, power on the WSR-6000AX8 (or AX8P).
4. The device will automatically download the initramfs image
from the TFTP server and boot into it.
5. Once booted, run "sysupgrade -n" using the OpenWrt sysupgrade image
to complete the installation.
Recovery
--------
1. Decrypt the official firmware image using "buffalo-enc".
example:
$ buffalo-enc -d -i wsr_6000ax8_jp_100 -o wsr_6000ax8_jp_100.dec \
-l -O 0xc8
2. Run "sysupgrade -F -n" with the decrypted image.
Signed-off-by: Shin Sato <shin.sugar.ssyysy2021@gmail.com>
Link: https://github.com/openwrt/openwrt/pull/13107
Signed-off-by: Hauke Mehrtens <hauke@hauke-m.de>
Specification :
- SOC : Mediatek MT7981B (1.3GHz)
- RAM : 256MB
- Flash : 16MB SPI NOR
- Ports : 4 LAN (1G) & 1 WAN (1G)
- WIFI : MediaTek dual-band WiFi 6
- 2.4 GHz : b/g/n/ax, MIMO 2x2
- 5 GHz : a/n/ac/ax, MIMO 2x2
- Buttons : Reset & WPS/Mesh
- LEDS : WAN (Green), Status (Red & Blue)
- Power : 12V1A
Install via OEM web ui:
Upload the sysupgrade image to firmware upgrade page on OEM web ui
Install via recovery / revert to stock firmware:
1. Unplug from power
2. Download the Sysupgrade (for openwrt installation) or OEM Factory image (for revert to stock firmware)
3. Set your computer ethernet IP to 192.168.1.X, subnet 255.255.255.0 (X=your chosen ip number ranging from 2-254)
4. Press and hold reset button while turn on / plug power adapter to the router. Wait untill ALL LAN green LED turn on, then release the reset button.
5. Plug the LAN cable from your computer into LAN 1 port then open web browser, and type in the address column : 192.168.1.1
6. Upload the sysupgrade / oem factory image
7. Wait until the router finished flashing (the router will reboot)
8. Set ethernet ip to dhcp
9. Open 192.168.1.1 (for openwrt install) / 192.168.0.1 (for OEM firmware)
Signed-off-by: Ari Kurniawan <noobhek@gmail.com>
Link: https://github.com/openwrt/openwrt/pull/20035
Signed-off-by: Hauke Mehrtens <hauke@hauke-m.de>
Now that we have a board file, add calibration variant for TP-Link
Archer C60 v1 and add ipq-wifi package for it.
Signed-off-by: Christoph Krapp <achterin@gmail.com>
Link: https://github.com/openwrt/openwrt/pull/19993
Signed-off-by: Hauke Mehrtens <hauke@hauke-m.de>
This fixes a previous commit breaking setting the MAC address for the
wifi devices.
Fixes: 9ed4d27fbf ("mediatek: filogic: fix 5G MAC address for Zyxel EX5601")
Link: https://github.com/openwrt/openwrt/pull/20100
Signed-off-by: Hauke Mehrtens <hauke@hauke-m.de>
Until now the the SerDes configuration is realized with helper functions
scattered around the DSA and PHY driver. Give them a new home as a PCS
driver.
The target design is as follows:
- dsa driver manages switch
- pcs driver manages SerDes on high level (this commit)
- mdio driver manages SerDes on low level
This driver adds the high level SerDes access via PCS. It makes use of
the low level mdio SerDes driver to access the registers.
Remark: This initial version provides exactly all phylink_pcs_ops that
are currently part of the DSA driver. So this can be swapped in one of
the next commits as a drop in replacement. To make use of it something
like this is needed:
...
ports = of_get_child_by_name(node, "ethernet-ports");
if (!ports)
return -EINVAL;
for_each_available_child_of_node(ports, port) {
pcs_node = of_parse_phandle(port, "pcs-handle", 0);
of_property_read_u32(port, "reg", &port_nr)) {
priv->pcs[port_nr] = rtpcs_create(dev, pcs_node, port_nr);
}
...
Signed-off-by: Markus Stockhausen <markus.stockhausen@gmx.de>
Link: https://github.com/openwrt/openwrt/pull/20075
Signed-off-by: Robert Marko <robimarko@gmail.com>
In the future the PCS & DSA drivers will lookup the SerDes of a
switch port via pcs-handle (like upstream does). Provide a macro
that allows to expand the existing port definitions. To link a
SerDes to port simply do
Either in short form:
replace SWITCH_PORT(0, 1, qsgmii)
with SWITCH_PORT_SDS(0, 1, 3, qsgmii) (Link to SerDes 3)
Or in long form:
port@24 {
reg = <24>;
label = "lan25";
pcs-handle = <&serdes4>; (Link to SerDes 4)
phy-handle = <&phy24>;
phy-mode = "1000base-x";
managed = "in-band-status";
sfp = <&sfp0>;
};
Signed-off-by: Markus Stockhausen <markus.stockhausen@gmx.de>
Link: https://github.com/openwrt/openwrt/pull/20075
Signed-off-by: Robert Marko <robimarko@gmail.com>
The fixes for the dying timers were finally accepted upstream.
Signed-off-by: Markus Stockhausen <markus.stockhausen@gmx.de>
Link: https://github.com/openwrt/openwrt/pull/20097
Signed-off-by: Robert Marko <robimarko@gmail.com>
Instead of having two LED entries that supposedly control the same
thing, set the pin properly.
Signed-off-by: Rosen Penev <rosenp@gmail.com>
Link: https://github.com/openwrt/openwrt/pull/18905
Signed-off-by: Robert Marko <robimarko@gmail.com>
of_gpio.h is deprecated in upstream Linux and may be removed soon. Get
ahead of things and remove it. Most of these drivers already use the
gpiod API.
Signed-off-by: Rosen Penev <rosenp@gmail.com>
Link: https://github.com/openwrt/openwrt/pull/20076
Signed-off-by: Robert Marko <robimarko@gmail.com>
This is a smart door lock device equipped with OpenWrt 14.07 OEM
modified version Qdwrt
The OEM has closed down, This commit is intended to maximize the
remaining value of these devices. It can flash OpenWrt to become
an AP
Specification:
- SoC: MediaTek MT7628NN
- Flash: 8 MB
- RAM: 64 MB
- Power: DC 5V - 25V
- Ethernet: 1 x RJ45 (10/100 Mbps)
- Wireless radio: 802.11n 2.4g-only
- On-Board LED:
Status 1: GPIO/43 active-low
Status 2: GPIO/44 active-low
Power: AlwaysOn
- Button:
WPS / RESET: GPIO/14 active-low
- Bluetooth: CC2541 via UART1 (ttyS1) and GPIO/26-29
- RFID: MF RC522 on I2C@28
- RTC: DS1339 on I2C@68
- Shell (via CON1 cable)
- LED (Swipe card area):
- Green GPIO/3 active-high
- Red GPIO/11 active-high
- Matrix keypad: (active-low)
GPIO/20 GPIO/21 GPIO/19 (Rows)
GPIO/24 1 2 3
GPIO/25 4 5 6
GPIO/22 7 8 9
GPIO/23 BACK 0 ENTER
(Cols)
- UART: 1 x UART on PCB - 57600 8N1
- GPIO Relay: GPIO/42 active-high
- GPIO Buzzer: GPIO/15 active-high
Warning:
The original firmware does not use the device tree.
This device tree is written based on the content of /sys/devices/platform
and has been tested
Note:
- On the device, matrix keypad rows actually are columns, and the columns actually are rows
- The key code of the CLEAR key of the matrix keypad is BACK in the original firmware.
Issue:
- No drivers in mainline kernel for RFID and Bluetooth.
Flash Instruction:
Using SSH/Telnet:
1. Connect the board to the computer via RJ45 Ethernet
2. Login 10.10.10.1 with root password "szqdingnet123" (SSH Port 22, Telnet Port 9900)
3. Download openwrt firmware on the computer.
4. Setup a http server on computer. And use wget download openwrt firmware from computer
5. Use command "mtd -r write openwrt-ramips-mt76x8-qding_qc202-squashfs-sysupgrade.bin firmware"
to flash
Using U-Boot WebUI:
1. Configure PC with a static IP address 10.10.10.2/24.
2. Open http://10.10.10.1
3. Use "mkqdimg -B qc202 -f openwrt-ramips-mt76x8-qding_qc202-squashfs-sysupgrade.bin" to
make image.
4. Upload factory.bin via U-Boot WebUI.
Original Firmware Dump / More details:
https://blog.gov.cooking/archives/research-qianding-smart-locker-and-flash.html
Original U-Boot firmware image tools:
https://gitlab.com/CoiaPrant/mkqdimg
Signed-off-by: Coia Prant <coiaprant@gmail.com>
Tested-by: Coia Prant <coiaprant@gmail.com>
Link: https://github.com/openwrt/openwrt/pull/17471
Signed-off-by: Hauke Mehrtens <hauke@hauke-m.de>
Currently following warnings are given
dts/rtl930x.dtsi:166.4-23: Warning (reg_format):
/switchcore@1b000000/i2c@36c:reg: property has invalid length
(8 bytes) (#address-cells == 2, #size-cells == 1)
Obviously default address-cells size is fixed to 64 bit. Align
with upstream and override address size to 32 bit.
Suggested-by: Jonas Jelonek <jelonek.jonas@gmail.com>
Signed-off-by: Markus Stockhausen <markus.stockhausen@gmx.de>
Link: https://github.com/openwrt/openwrt/pull/20091
Signed-off-by: Robert Marko <robimarko@gmail.com>
Add node to support the second UART node controller in IPQ5018.
Signed-off-by: George Moussalem <george.moussalem@outlook.com>
Link: https://github.com/openwrt/openwrt/pull/20090
Signed-off-by: Robert Marko <robimarko@gmail.com>
Specification:
SoC: Mediatek MT7981BA
RAM: 512 MB DDR4 RAM
Flash: Winbond W25N01GV 128 MB SPI-NAND (dual boot on OEM)
WiFi: MT7976CN DBDC AX
Switch: MediaTek MT7531AE (3x LAN Gigabit ports) + Internal Gbe Phy (1x WAN Gigabit port)
GPIO: 4x LED (power, internet, fn, wifi), 2x buttons (wps, reset), 1x switch (mesh)
UART Interface:
Pins: VCC, TX, RX, NC, GND
Settings: 115200, 8N1
Flashing via TFTP:
1. Connect your PC and router to the first LAN port, configure PC interface using IP 192.168.1.2, mask 255.255.255.0
2. Save the factory image of the OpenWRT firmware, renamed to KN-3711_recovery.bin, on the TFTP server
3. Hold the reset button and power up the device
4. Keep the button pressed until the status LED starts blinking
Signed-off-by: Vladimir Epifantsev <volatilefield@outlook.com>
Link: https://github.com/openwrt/openwrt/pull/19633
Signed-off-by: Hauke Mehrtens <hauke@hauke-m.de>
The EN751221 has an XHCI that is compatible with MT7621.
While there is setup logic in the vendor code for both
EN751221 and MT7621, but MT7621 does not use it in mainline
or OpenWRT, and it appears to work correctly with EN751221.
Include SCSI / Mass Storage because many EcoNet devices
contain a builtin USB SD-Card reader.
Signed-off-by: Caleb James DeLisle <cjd@cjdns.fr>
Link: https://github.com/openwrt/openwrt/pull/20050
[Remove usb storage kmod from smartfiber_xp8421-b]
Signed-off-by: Hauke Mehrtens <hauke@hauke-m.de>
The baud rate control on Airoha does not function properly. This
patch enables the inactive code responsible for this. The UART2
baud rate is correct. HSUART3 operates at twice the requested
baud rate. The same problem exists in the current code, so this
doesn't introduce any regression. Support for baud rates higher
than 460800 is still required. This will be added in the future.
Tested on Gemtek W1700k. UART2 and HSUART3 are working fine.
Signed-off-by: Aleksander Jan Bajkowski <olek2@wp.pl>
Link: https://github.com/openwrt/openwrt/pull/20049
Signed-off-by: Robert Marko <robimarko@gmail.com>
Changelog: https://cdn.kernel.org/pub/linux/kernel/v6.x/ChangeLog-6.12.47
No patches needed to be rebased.
Build system: x86/64
Build-tested: Build-tested: flogic/xiaomi_redmi-router-ax6000-ubootmod, x86/64-glibc
Run-tested: flogic/xiaomi_redmi-router-ax6000-ubootmod, x86/64-glibc
Signed-off-by: John Audia <therealgraysky@proton.me>
Link: https://github.com/openwrt/openwrt/pull/20003
Signed-off-by: Robert Marko <robimarko@gmail.com>
The driver makes its own ath9k LED which handles everything.
Simplifies DTS slightly.
Signed-off-by: Rosen Penev <rosenp@gmail.com>
Link: https://github.com/openwrt/openwrt/pull/20023
Signed-off-by: Robert Marko <robimarko@gmail.com>
Userspace handling for this is deprecated.
Signed-off-by: Rosen Penev <rosenp@gmail.com>
Link: https://github.com/openwrt/openwrt/pull/20023
Signed-off-by: Robert Marko <robimarko@gmail.com>
The upcoming PCS driver will lookup the SerDes mdio bus via
of_mdio_find_bus() and the devicetree. This is only possible
with proper registration via devm_of_mdiobus_register().
Signed-off-by: Markus Stockhausen <markus.stockhausen@gmx.de>
Link: https://github.com/openwrt/openwrt/pull/20078
Signed-off-by: Robert Marko <robimarko@gmail.com>
No need two write a dedicated 1:1 mapping function and link that
for all the targets except RTL931x. Combine everything into a generic
helper and reduce the configuration structure.
Signed-off-by: Markus Stockhausen <markus.stockhausen@gmx.de>
Link: https://github.com/openwrt/openwrt/pull/20078
Signed-off-by: Robert Marko <robimarko@gmail.com>
The new SerDes mdio driver produces the following compilation
error in non-debug builds.
drivers/net/mdio/mdio-realtek-otto-serdes.c:72:12:
error: 'rtsds_sds_to_mmd' defined but not used [-Werror=unused-function]
72 | static int rtsds_sds_to_mmd(int sds_page, int sds_regnum)
| ^~~~~~~~~~~~~~~~
cc1: all warnings being treated as errors
Move the function into the debug section.
Fixes: 7a7ee72c4d ("realtek: mdio: add SerDes driver")
Signed-off-by: Markus Stockhausen <markus.stockhausen@gmx.de>
Link: https://github.com/openwrt/openwrt/pull/20078
Signed-off-by: Robert Marko <robimarko@gmail.com>
In first commit I successfully bring WAN port into ethernet switch,
without realizing that I was using custom bootloader. But if using
original bootloader it do not works. WAN port in original bootloader
is tied to using its own GMAC.
This fix is made so this firmware will be compatible with orignal
bootloader, so the user can directly flash from stock firmware without
changing anything.
Signed-off-by: Roy H <roy@altbytes.com>
Link: https://github.com/openwrt/openwrt/pull/20039
Signed-off-by: Hauke Mehrtens <hauke@hauke-m.de>
Despite having the same tplink.dtsi file, there are differences in wifi
Move wifi nodes out of dtsi to make it clear what the chipset is and
what calibration size should be used.
While at it, change to use led-sources to simplify LED setup.
Signed-off-by: Rosen Penev <rosenp@gmail.com>
Link: https://github.com/openwrt/openwrt/pull/20024
Signed-off-by: Robert Marko <robimarko@gmail.com>
Until now the SerDes access is realized with some helper functions
in the mdio bus. These were moved around a lot and had no real home.
End that temporary solution to move them where they belong.
The target design for the different Realtek drivers is as follows:
- dsa driver manages switch
- pcs driver manages SerDes on high level (to be developed)
- mdio driver manages SerDes on low level (this commit)
This driver adds the low level SerDes access via mdio. For debugging
purposes the user can interact with the SerDes in different ways.
First, there is a debug interface in
/sys/kernel/debug/realtek_otto_serdes/serdes.X/registers.
With that a dump of all registers can be shown.
> cat /sys/kernel/debug/realtek_otto_serdes/serdes.4/registers
Back SDS 4: 00 01 02 03 04 05 06 07 08
SDS : 0C03 0F00 7060 7106 074D 0EBF 0F0F 0359 5248
SDS_EXT : 0000 0000 85FA 8C6D 5CCC 0000 20D8 0003 79AA
...
Second, one can read/write registers via the mmd functions of the
mdio command line tool. Important to know: The registers are accessed
on the vendor specific MDIO_MMD_VEND1 device address (=30). Additionally
the SerDes page and register are concatenated into the the mmd register.
Top 8 bits are SerDes page and bottom 8 bits are SerDEs register.
E.g.
- mmd 0x0206 : SerDes page 0x02, SerDes register 0x06
- mmd 0x041f : SerDes page 0x04, SerDes register 0x1f
Read register 0x02 on page 0x03 of SerDes 0
> mdio realtek-serdes-mdio mmd 0:30 raw 0x0302
Write register 0x12 on page 0x02 of SerDes 1
> mdio realtek-serdes-mdio mmd 1:30 raw 0x0212 0x2222
For now this driver is only defined in the devicetree and activated
in the kernel build. There is no current consumer but at least
the debugging interface is available. Cleanup of the currently used
SerDes functions will come later.
Signed-off-by: Markus Stockhausen <markus.stockhausen@gmx.de>
Link: https://github.com/openwrt/openwrt/pull/20062
Signed-off-by: Robert Marko <robimarko@gmail.com>
There is some open coding in the ethernet driver. Drop
that and use kernel helpers instead.
- Use napi_gro_receive() instead of local skb list
- Use skb_put_data() instead of skb_put() plus memcpy()
- Use netdev_alloc_skb_ip_align() instead of manual alignment
Signed-off-by: Markus Stockhausen <markus.stockhausen@gmx.de>
Link: https://github.com/openwrt/openwrt/pull/20030
Signed-off-by: Robert Marko <robimarko@gmail.com>
Refresh patches 6.12 for airoha and econet
Fixes: 122135b964 ("airoha: an7581: add support for kernel 6.12")
Fixes: 73d0f92460 ("kernel: Add new platform EcoNet MIPS")
Signed-off-by: Leo Barsky <leobrsky@proton.me>
Link: https://github.com/openwrt/openwrt/pull/20073
Signed-off-by: Robert Marko <robimarko@gmail.com>
Use upstreamed patch for adding the QUP3 I2C node.
Signed-off-by: George Moussalem <george.moussalem@outlook.com>
Link: https://github.com/openwrt/openwrt/pull/20070
Signed-off-by: Robert Marko <robimarko@gmail.com>
Enable kernel 6.12 as the testing kernel for airoha.
This first commit will largely maintain feature-parity with kernel 6.6.
DTS changes are backwards-compatible with kernel 6.6.
Tested to flash and boot on Gemtek W1700K (#17869).
Signed-off-by: Kenneth Kasilag <kenneth@kasilag.me>
Link: https://github.com/openwrt/openwrt/pull/19038
Signed-off-by: Robert Marko <robimarko@gmail.com>
This is an automatically generated commit.
When doing `git bisect`, consider `git bisect --skip`.
Signed-off-by: Kenneth Kasilag <kenneth@kasilag.me>
Link: https://github.com/openwrt/openwrt/pull/19038
Signed-off-by: Robert Marko <robimarko@gmail.com>
Use label MAC to set addresses for wireless interfaces
for Linksys MX4200v2 and MX4300.
Signed-off-by: Paweł Owoc <frut3k7@gmail.com>
Link: https://github.com/openwrt/openwrt/pull/18759
Signed-off-by: Robert Marko <robimarko@gmail.com>
ascii-env driver allows reading mac addresses directly from devinfo partition from dts level.
Additionally label mac address have been set.
Signed-off-by: Paweł Owoc <frut3k7@gmail.com>
Link: https://github.com/openwrt/openwrt/pull/18759
Signed-off-by: Robert Marko <robimarko@gmail.com>
This adds the Vitesse VSC73xx DSA switch modules to the two
Gemini devices that have them.
Link: https://github.com/openwrt/openwrt/pull/20057
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
Refresh patch which was accidentally without non-confrming style and
not matching line numbers.
Also add patch description by copying the description of the commit
in OpenWrt, so the patch can be applied using `git am` and is ready
for upstream submission.
Fixes: afcec128c5 ("mediatek: add support for trng on mt7988a")
Signed-off-by: Daniel Golle <daniel@makrotopia.org>
Use upstreamed patches for adding IPQ CMN PLL driver support and its
node and clocks to the DTS accordingly.
In addition, set clock-div and clock-mult properties instead of the
frequency itself for the XO board clock in all board files as it's
converted to a fixed factor clock.
Signed-off-by: George Moussalem <george.moussalem@outlook.com>
Link: https://github.com/openwrt/openwrt/pull/19890
Signed-off-by: Robert Marko <robimarko@gmail.com>
Use upstreamed patch for adding the crypto nodes.
Signed-off-by: George Moussalem <george.moussalem@outlook.com>
Link: https://github.com/openwrt/openwrt/pull/19890
Signed-off-by: Robert Marko <robimarko@gmail.com>
Use upstreamed patch for adding the PRNG node.
Signed-off-by: George Moussalem <george.moussalem@outlook.com>
Link: https://github.com/openwrt/openwrt/pull/19890
Signed-off-by: Robert Marko <robimarko@gmail.com>
Use upstreamed patch for adding the SPI nand node.
Signed-off-by: George Moussalem <george.moussalem@outlook.com>
Link: https://github.com/openwrt/openwrt/pull/19890
Signed-off-by: Robert Marko <robimarko@gmail.com>
Use upstreamed patch for adding driver support and the the mdio and phy
nodes.
Signed-off-by: George Moussalem <george.moussalem@outlook.com>
Link: https://github.com/openwrt/openwrt/pull/19890
Signed-off-by: Robert Marko <robimarko@gmail.com>
Use upstreamed patch for adding the tsens node.
Temperature sensors are enabled by default, therefore remove explicit
enablement in board files.
Signed-off-by: George Moussalem <george.moussalem@outlook.com>
Link: https://github.com/openwrt/openwrt/pull/19890
Signed-off-by: Robert Marko <robimarko@gmail.com>
Converts the KS8995 "phy" driver to a proper DSA switch.
Currently the upstream only supports the "none" tag
but this is a good improvement already.
Make the old module depend on kernel 6.6 and the new
one depend on !6.6.
The Realtek RTL8261n patch needs to be refreshed
because of textual dependencies.
Realtek RTL838x DSA and phy patches also have textual
dependencies and need to be refreshed.
The Mediatek in-flight DSA patch and related patches
also need to be rebased and refreshed.
Link: https://github.com/openwrt/openwrt/pull/19970
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
This change fixes the eeprom load failure while on boot
Signed-off-by: Rhnn Hur <hurrhnn@icmp.kr>
Link: https://github.com/openwrt/openwrt/pull/20044
Signed-off-by: Hauke Mehrtens <hauke@hauke-m.de>
This addresses #9113 by adding up to 1MB padding after writing the
rootfs image. On boot mount_root will probe for existing filesystems
after the rootfs image data. Without overwriting the initial free
space left on the rootfs partition, OpenWrt might incorrectly detect
an exising filesystem and fails to mount it, resulting in a bricked
device as the overlayfs will not be mountend and settings will not be
available.
Fixes#9113.
Signed-off-by: Orne Brocaar <info@brocaar.com>
Link: https://github.com/openwrt/openwrt/pull/19997
Signed-off-by: Robert Marko <robimarko@gmail.com>
During SerDes rework the helper functions were temporarily
renamed to ..._new(). Fix the leftovers by
- giving the functions a new rtsds_ prefix nad
- dropping the _new appendix.
Signed-off-by: Markus Stockhausen <markus.stockhausen@gmx.de>
Link: https://github.com/openwrt/openwrt/pull/20034
Signed-off-by: Robert Marko <robimarko@gmail.com>
Specification
-------------
- SoC : MediaTek MT7986AV quad-core ARM Cortex-A53 2GHz
- RAM : DDR4 512Mbytes, Nanya Technology NT5AD256M16E4
- Flash : 128Mbytes NAND Flash, ESMT F50L1G41LB
- WLAN : MediaTek MT7976DAN, MediaTek MT7916AN, MediaTek MT7976AN
- 2.4GHz : b/g/n/ax, Multi User MIMO
- 5GHz : a/n/ac/ax, Multi User MIMO
- 6GHz : ax, Multi User MIMO
- Ethernet : 10/100/1000 Mbps x4, LAN (MediaTek MT7531AE)
10/100/1000/2500 Mbps x1, WAN (MaxLinear GPY211C0VC)
- UART : 1x4 pin header on PCB
- [J1] 3.3V, TX, RX, GND (115200, 8N1)
- Buttons : WPS, Reset
- Switches : Rfkill Slide Switch
- USB : 1x USB 3.0 (MediaTek MT7986AV peripheral)
- FAN : 1x Fan (off - slow - fast)
- LEDs : 1x Power (Blue)
1x CPU (Blue)
1x Wi-Fi 6GHz (Blue)
1x Wi-Fi 5GHz (Blue)
1x Wi-Fi 2.4GHz (Blue)
4x LAN activity (Blue)
1x WAN activity (Blue)
1x USB 3.0 (Blue)
- Power : 12VDC, 3.5A (Center positive polarity)
MAC address
-----------
+-----------+-------------------+------------------------+
| Interface | MAC | Algorithm |
+-----------+-------------------+------------------------+
| WLAN 2.4G | 58:86:94:xx:xx:xx | label1 |
| WLAN 5G | 5A:86:94:xx:xx:xx | label2 with LA Bit set |
| WLAN 6G | 5A:86:94:xx:xx:xx | label1 with LA Bit set |
| WAN | 58:86:94:xx:xx:xx | label1 + 1 |
| LAN | 58:86:94:xx:xx:xx | label1 + 3 |
+-----------+-------------------+------------------------+
The WLAN 2.4G MAC address (label1) was found in 'Factory' partition, 0xA0004
The WLAN 5G MAC address (label2) was found in 'Factory' partition, 0x4
Installation
------------
1. Download the OEM recovery software (ipTIME Firmware Wizard (11ac))
from the manufacturer's website
2. Download the *squashfs-factory.bin file from the OpenWrt website
3. Press a reset button, and power up the router (keep pressing the reset button)
4. Wait more than 10 seconds until the CPU LED stop blinking
5. Connect the router (LAN port) to the PC
6. Run the OEM recovery software and follow the instructions
7. Select the *squashfs-factory.bin file during the router recovery process
8. Wait for the router to boot from *squashfs-factory.bin
Note: The router will automatically reboot if no file is uploaded within
55 seconds.
Fan Control
------------
The fan speed is controlled by writing a value from 0 to 2 to the
`fan1_target` file.
```
cd /sys/devices/platform/gpio-fan/hwmon/hwmon2
echo '0' > fan1_target // off
echo '1' > fan1_target // slow
echo '2' > fan1_target // fast
```
Limitation: Enabling Wi-Fi 6E
----------
Wi-Fi 6E (6GHz) does not work out of the box on LuCI.
After installation, you need to configure a few settings in the `radio1`
and `default_radio1` sections of the `/etc/config/wireless`.
Once you have made these changes, you can enable and use Wi-Fi 6E.
In the `radio1` section, you need to add three common options:
- band: must be set to `6g`
- country: a valid country code for the 6GHz band
- channel: a preferrend scanning channel (PSC) for 6GHz
In the `default_radio1` section, you need to add the SSID and key:
- ssid: The public name of your Wi-Fi network
- key: The Wi-Fi password
- encryption: must be set to either `sae` for WPA3 or `owe` for OWE
(open network)
Example:
```
config wifi-device 'radio1'
...
option band '6g'
option country 'KR'
option channel '37'
...
config wifi-iface 'default_radio1'
...
option ssid 'my_wifi_6e_name'
option key 'my_strong_password1234'
option encryption 'sae'
...
```
Note: A list of all the 6GHz PSC channels:
```
5, 21, 37, 53, 69, 85, 101, 117, 133, 149, 165, 181, 197, 213, and 229
```
Limitation: Maximum Transmit Power
----------
The maximum transmit power is currently broken. In the drop-down menu,
you can only choose between "driver default" and "255 dBm (2147493647
mW)". There is currently no workaround for the issue. Please leave the
maximum transmit power set to "driver default".
Signed-off-by: Donghyun Ko <nyankosoftware@gmail.com>
Link: https://github.com/openwrt/openwrt/pull/19763
Signed-off-by: Hauke Mehrtens <hauke@hauke-m.de>
Add driver for hardware random number generator found in MT7981, MT7988
and MT7987. This gives us a fast source of high-quality random numbers
on those platforms.
root@OpenWrt:~# cat /dev/hwrng | rngtest -c 10000
rngtest 6.17
Copyright (c) 2004 by Henrique de Moraes Holschuh
This is free software; see the source for copying conditions. There is NO warranty; not even for MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.
rngtest: starting FIPS tests...
rngtest: bits received from input: 200000032
rngtest: FIPS 140-2 successes: 9988
rngtest: FIPS 140-2 failures: 12
rngtest: FIPS 140-2(2001-10-10) Monobit: 2
rngtest: FIPS 140-2(2001-10-10) Poker: 0
rngtest: FIPS 140-2(2001-10-10) Runs: 4
rngtest: FIPS 140-2(2001-10-10) Long run: 6
rngtest: FIPS 140-2(2001-10-10) Continuous run: 0
rngtest: input channel speed: (min=616.108; avg=11979.007; max=19531250.000)Kibits/s
rngtest: FIPS tests speed: (min=1.859; avg=82.116; max=83.656)Mibits/s
rngtest: Program run time: 18629928 microseconds
Signed-off-by: Daniel Golle <daniel@makrotopia.org>
The kernel config accidentally contains CONFIG_UBIFS_FS_AUTHENTICATION
which select a number of other unnecessary components, remove them.
The target has at least two subtargets, only one is currently
implemented. Move the Device builds into a file for this subtarget.
Signed-off-by: Caleb James DeLisle <cjd@cjdns.fr>
Link: https://github.com/openwrt/openwrt/pull/20027
Signed-off-by: Hauke Mehrtens <hauke@hauke-m.de>
Now that HSGMII is not used any longer drop the patch
the invents this mode.
Signed-off-by: Markus Stockhausen <markus.stockhausen@gmx.de>
Link: https://github.com/openwrt/openwrt/pull/20002
Signed-off-by: Hauke Mehrtens <hauke@hauke-m.de>
The only consumers of the Realtek HSGMII (2.5G SGMII) mode were
the RTL8226/RTL8221B PHYs. These have been converted to dynamic
SGMII/2500base-x mode switching. Drop the leftovers of the mode
implementation.
Signed-off-by: Markus Stockhausen <markus.stockhausen@gmx.de>
Link: https://github.com/openwrt/openwrt/pull/20002
Signed-off-by: Hauke Mehrtens <hauke@hauke-m.de>
The mdio controller got its own dts node with a dedicated bus node.
Until now it still searches the phy nodes in the ethernet node.
Change the driver so it searches the nodes at the right location.
For this to work move the phy nodes in all dts/dtsi over to the new
bus node. Use the following replacement rule:
Replace old full declaration
ðernet0 {
mdio-bus {
...
};
};
and old abbreviated declaration
&mdio {
...
};
simply with the new declaration
&mdio_bus0 {
...
};
Signed-off-by: Markus Stockhausen <markus.stockhausen@gmx.de>
Link: https://github.com/openwrt/openwrt/pull/19986
Signed-off-by: Hauke Mehrtens <hauke@hauke-m.de>
The mdio controller has now its own target specific device nodes. This
is much closer to upstream notation. Adapt the driver to make use of it.
Signed-off-by: Markus Stockhausen <markus.stockhausen@gmx.de>
Link: https://github.com/openwrt/openwrt/pull/19986
Signed-off-by: Hauke Mehrtens <hauke@hauke-m.de>
Until now the mdio bus is a subnode of the ethernet device. This
coupling is different from upstream and wrong. Ethernet and mdio
are different devices. Additionally differentiate between mdio
controller and mdio bus. To make it clear:
- There is one mdio controller
- With up to 4 busses (on RTL93xx)
Prepare new mdio controller and bus nodes with SoC specific compatibles.
These will be used later when refactoring the mdio driver probing.
Remark! For now only define the first bus for the RTL93xx targets.
So the driver still relies on "rtl9300,smi-address = <x y>;". It will
need much more refactoring to get totally aligned with upstream.
Signed-off-by: Markus Stockhausen <markus.stockhausen@gmx.de>
Link: https://github.com/openwrt/openwrt/pull/19986
Signed-off-by: Hauke Mehrtens <hauke@hauke-m.de>
While converting the RTL931x SerDes code to the new frontend
access methods, the target specific workarounds where left in
place. The old functions were kept and the phy/sds mapping
was unchanged too. It is time to clean this up
- drop the old functions
- reuse the existing read/write logic
- harden the new functions
For now keep the function naming rtmdio_...__new() as is. This
will be changed in a future commit.
Signed-off-by: Markus Stockhausen <markus.stockhausen@gmx.de>
Link: https://github.com/openwrt/openwrt/pull/19973
Signed-off-by: Hauke Mehrtens <hauke@hauke-m.de>
They have the same 0x200 calibration size.
Added various compatible lines in various places to make it clear what
device we're talking about.
Signed-off-by: Rosen Penev <rosenp@gmail.com>
Link: https://github.com/openwrt/openwrt/pull/19863
Signed-off-by: Hauke Mehrtens <hauke@hauke-m.de>
These devices use AR9285, which uses 1f8 as the calibration size, not
440 like newer chips do. Actually the driver mandates a minimum of 200.
Signed-off-by: Rosen Penev <rosenp@gmail.com>
Link: https://github.com/openwrt/openwrt/pull/19863
Signed-off-by: Hauke Mehrtens <hauke@hauke-m.de>
The TP-Link Archer VR1200v (v2) is a low end DSL modem based on the
EcoNet EN751221 processor platform.
While it does have an unlocked bootloader, the factory upgrade feature
requires a cryptographic signature so flashing from the web UI is not
feasible.
The Archer VR1200v (v2) uses a dual-image layout. I have chosen to reuse
this to support dual-boot between OpenWRT and the factory firmware.
Flashing instructions (from bootloader):
Build and then locate the squashfs-sysupgrade.bin image file
Get the length of that file in hex: printf '%X\n' "$(stat -c%s the-file-squashfs-sysupgrade.bin)"
Connect to device with xmodem capability, e.g. picocom --send-cmd lsx -vv -b 115200 /dev/ttyUSB0
Switch device on and press a key within 3 seconds, you should get to a `bldr>` prompt
Type: xmdm 80020000 <file length hex>
Quickly start xmodem and send the file, in picocom that is ctrl+a ctrl+s <paste-the-file-name> enter If the transfer fails to start, wait 30 seconds to a minute for the bootloader prompt to return and then try the command again.
Once the transfer has completed successfully, type the following flash 80000 80020000 <file length hex>
Type `re` or simply restart the device to boot into OpenWRT
Signed-off-by: Caleb James DeLisle <cjd@cjdns.fr>
Link: https://github.com/openwrt/openwrt/pull/19021
Signed-off-by: Hauke Mehrtens <hauke@hauke-m.de>
The SmartFiber XP8421-B is a fiber modem which is available for $20 online
and has 512MB of memory, 256MB of SPI NAND flash and 2 USB 2.0 ports in
addition to ethernet, wifi and XPON.
Because EcoNet is not currently producing evaluation boards, the XP8421-B
stands in as a convenient, low cost, off-the-shelf, representitive example
of the capabilities of the EN751221 econet processor. This is also the
example board that is included in the upstream Linux patchset.
The XP8421-B, and apparently many other devices of this platform, use a
dual-image layout. I have chosen to reuse this to support dual-boot between
OpenWRT and the factory firmware. Certain design decisions were made with
the goal of not overwriting data that is used by the factory OS.
This commit also introduces a utility for switching between OS_A and OS_B
which are used for OpenWRT and Factory OS respectively.
Flashing instructions (from bootloader):
Build and then locate the squashfs-tclinux.trx image file
Get the length of that file in hex: printf '%X\n' "$(stat -c%s the-file-squashfs-tclinux.trx)"
Connect to device with xmodem capability, e.g. picocom --send-cmd lsx -vv -b 115200 /dev/ttyUSB0
Switch device on and press a key within 3 seconds
Enter bootloader username and password: telecomadmin nE7jA%5m
Type: xmdm 80020000 <file length hex>
Quickly start xmodem and send the file, in picocom that is ctrl+a ctrl+s <paste-the-file-name> enter If the transfer fails to start, wait 30 seconds to a
minute for the bootloader prompt to return and then try the command again.
Once the transfer has completed successfully, type the following flash 80000 80020000 <file length hex>
Type go or simply restart the device to boot into OpenWRT
Signed-off-by: Caleb James DeLisle <cjd@cjdns.fr>
Link: https://github.com/openwrt/openwrt/pull/19021
Signed-off-by: Hauke Mehrtens <hauke@hauke-m.de>
EcoNet EN75xx is a big endian MIPS platform used in XPON (fiber),
DSL, and SIM (3g/4g) applications. Complete GPL vender SDKs exist
for this platform, but are based on Linux 2.6.
The bulk of this submission has already been accepted upstream:
https://patchwork.kernel.org/project/linux-mips/list/?series=960479&state=*
This platform uses a bootloader that is derived from old TrendChip
code. This bootloader implements a frustratingly complex Bad Block
Table which is implemented here in en75_bmt.c
This BMT is not upstreamed because it depends on mtk_bmt framework
which likewise is not upstreamed.
This BMT system rewrites block indexes in flash and if the bootloader
considers it to be corrupted, it will attempt to automatically rebuild
on boot. So without implementing the algorithm, you can't safely use
the disk at all.
Signed-off-by: Caleb James DeLisle <cjd@cjdns.fr>
Link: https://github.com/openwrt/openwrt/pull/19021
Signed-off-by: Hauke Mehrtens <hauke@hauke-m.de>
Hardware
--------
RockChip RK3568 ARM64 (4 cores)
1/2GB LPDDR4 RAM
2x 2500 Base-T (PCIe, r8125b)
1 LED (Power)
1 Button (Reset)
Micro-SD Slot
2x USB 3.0 Port
12V DC Jack
Installation
------------
Uncompress the OpenWrt sysupgrade and write it to a micro SD card using
dd.
Tested-by: Francisco G Luna <frangonlun@gmail.com>
Signed-off-by: Tianling Shen <cnsztl@immortalwrt.org>
Link: https://github.com/openwrt/openwrt/pull/19990
Signed-off-by: Hauke Mehrtens <hauke@hauke-m.de>
Add labels wan and cpu for ethernet ports.
Signed-off-by: Paweł Owoc <frut3k7@gmail.com>
Link: https://github.com/openwrt/openwrt/pull/19968
Signed-off-by: Hauke Mehrtens <hauke@hauke-m.de>
Currently 5G wireless interface MAC address is incorrect.
Fix by setting MAC address using Factory data.
Signed-off-by: Paweł Owoc <frut3k7@gmail.com>
Link: https://github.com/openwrt/openwrt/pull/19968
Signed-off-by: Hauke Mehrtens <hauke@hauke-m.de>
Convert NWA50AX Pro to use NVMEM framework for wifi macaddr.
Also remove the unused macaddr@a.
Signed-off-by: Zhi-Jun You <hujy652@protonmail.com>
Link: https://github.com/openwrt/openwrt/pull/19982
Signed-off-by: Hauke Mehrtens <hauke@hauke-m.de>
Convert NWA50AX Pro to use NVMEM framework for EEPROM/precal.
Signed-off-by: Zhi-Jun You <hujy652@protonmail.com>
Link: https://github.com/openwrt/openwrt/pull/19982
Signed-off-by: Hauke Mehrtens <hauke@hauke-m.de>
These are already specified in DTS. Only thing missing is
label-mac-device.
Signed-off-by: Rosen Penev <rosenp@gmail.com>
Link: https://github.com/openwrt/openwrt/pull/19806
Signed-off-by: Hauke Mehrtens <hauke@hauke-m.de>
Support in mt76 has existed for quite a while. Use it.
Signed-off-by: Rosen Penev <rosenp@gmail.com>
Link: https://github.com/openwrt/openwrt/pull/19806
Signed-off-by: Hauke Mehrtens <hauke@hauke-m.de>
After trying to implement the gluon support for this device I ended up in a boot loop due to the usable amount of flash left. With this patch layout it uses the unused and empty flash space in the original partiton layout.
The version 3 of this device the RE365 share the same approach to have more usable space.
Signed-off-by: Steffen Förster <nemesis@chemnitz.freifunk.net>
Link: https://github.com/openwrt/openwrt/pull/18639
Signed-off-by: Sander Vanheule <sander@svanheule.net>
A lot of definitions in the global mach include have been taken over
to the individual drivers. Only a few of the definitions are really
used nowadays. Remove all the unneeded lines.
Signed-off-by: Markus Stockhausen <markus.stockhausen@gmx.de>
Link: https://github.com/openwrt/openwrt/pull/19995
Signed-off-by: Robert Marko <robimarko@gmail.com>
- shrink data structures
- avoid unnecessary divisions
- support GSO fraglist on tx
Reapply with fixed patch
Signed-off-by: Felix Fietkau <nbd@nbd.name>
Use Linux kernel version 6.12 by default for loongarch64 target.
Signed-off-by: Weijie Gao <hackpascal@gmail.com>
Link: https://github.com/openwrt/openwrt/pull/19980
Signed-off-by: Hauke Mehrtens <hauke@hauke-m.de>
Boards such as [1] and [2] add an extra Ethernet port to Raspberry Pi (CM)5.
These typically use Realtek PCIe or USB Ethernet NICs. Include kmod-r8169 and
kmod-usb-net-rtl8152 by default to make it easy to configure LAN/WAN ports
with these parts on Raspberry Pi 5.
Because CM5 can fit in the same carrier boards as CM4, also ensure that both
devices have the same Ethernet NIC kmods.
[1]: https://www.waveshare.com/wiki/CM5-DUAL-ETH-MINI
[2]: https://www.waveshare.com/wiki/PCIe_TO_Gigabit_ETH_Board_(C)
Signed-off-by: Elbert Mai <code@elbertmai.com>
Link: https://github.com/openwrt/openwrt/pull/19384
Signed-off-by: Hauke Mehrtens <hauke@hauke-m.de>
Certain boards have an at24(-compatible) EEPROM for storing various
parameters like MAC addresses. Enable support for this hardware across
the whole target.
Signed-off-by: Zoltan HERPAI <wigyori@uid0.hu>
Backport fixes for Airoha pinctrl driver for PHY LED and MDIO bus. This
fix a copy-paste error for PHY LED and a misconfiguration for MT7530
embedded Switch MDIO bus GPIO pin to permit usage of external PHYs.
Signed-off-by: Christian Marangi <ansuelsmth@gmail.com>
The RK356x/RK3588 SoCs support up to 10 serial ports.
Signed-off-by: Tianling Shen <cnsztl@immortalwrt.org>
Link: https://github.com/openwrt/openwrt/pull/19917
Signed-off-by: Hauke Mehrtens <hauke@hauke-m.de>
Apart from improved power consumption, this fixes the runtime errors
from the pmdomain driver (failed to set idle on domain '%s')
Backport four clk fixes while at it.
Signed-off-by: Tianling Shen <cnsztl@immortalwrt.org>
Link: https://github.com/openwrt/openwrt/pull/19925
Signed-off-by: Hauke Mehrtens <hauke@hauke-m.de>
All devices supported by the Zynq target have either a Realtek or Marvell
PHY. The Vitesse PHY was enabled when the target was created (2d45ad07fc).
It's not used here, so it's safe to disable it.
Ethernet PHYs used by individual devices are listed below.
Device PHY
AVNET ZedBoard Marvell 88E1518
Digilent Zybo Realtek RTL8211E
Digilent Zybo Z7 Realtek RTL8211E or RTL8211F
Xilinx ZC702 Marvell 88E1116R
Signed-off-by: Aleksander Jan Bajkowski <olek2@wp.pl>
Link: https://github.com/openwrt/openwrt/pull/19969
Signed-off-by: Hauke Mehrtens <hauke@hauke-m.de>
This was done by executing these command:
$ make kernel_oldconfig CONFIG_TARGET=platform
Signed-off-by: Aleksander Jan Bajkowski <olek2@wp.pl>
Link: https://github.com/openwrt/openwrt/pull/19969
Signed-off-by: Hauke Mehrtens <hauke@hauke-m.de>
The devices are basically identical. The RAX3000Me can be with
ddr3 RAM.
Signed-off-by: Mikhail Zhilkin <csharper2005@gmail.com>
Link: https://github.com/openwrt/openwrt/pull/19760
Signed-off-by: Hauke Mehrtens <hauke@hauke-m.de>
This commit adds ddr3 build for the ddr3 variant of the CMCC RAX3000Me
router.
Signed-off-by: Mikhail Zhilkin <csharper2005@gmail.com>
Link: https://github.com/openwrt/openwrt/pull/19760
Signed-off-by: Hauke Mehrtens <hauke@hauke-m.de>
Hardware
--------
MediaTek MT7981 WiSoC
512MB DDR4 RAM
128MB SPI-NAND
MediaTek MT7981 2x2 DBDC 802.11ax 2T2R (2.4 / 5)
4 LAN MediaTek MT7531 PHY
1 WAN RTL8221B-VB-CG 2.5Gbps PHY
UART: 115200 8N1 3.3V
USB2 Port
PoE on WAN Port
MAC:
LAN MAC: label mac
WAN MAC: label mac + 1
2.4G MAC: label mac
5G MAC: label mac + 1 with LA bit set
Gotchas:
WAN LED does not light up (might require further DTS tweaks)
PoE on WAN port was not tested
This commit is heavily based on WR3000H one, I've just ported DTS differences
from the official image to get USB support and proper LED mapping.
Installation
------------
[Untested as I've received and used a transitional image from Cudy]
1. Connect to the serial port as described in the "Hardware" section.
2. Power on the device + press reset pin. Keep pressing reset pin to enter the U-Boot shell.
3. Download the OpenWrt initramfs image. Place it on an TFTP server
connected to the Cudy LAN ports. Make sure the server is reachable at
192.168.1.88. Rename the image to "cudy3000p.bin"
4. Download and boot the OpenWrt initramfs image.
$ tftpboot 0x46000000 cudy3000s.bin; bootm 0x46000000
5. Transfer the OpenWrt sysupgrade image to the device using scp.
Install with sysupgrade.
Signed-off-by: Michal Halva <hedik01@gmail.com>
Link: https://github.com/openwrt/openwrt/pull/19636
Signed-off-by: Hauke Mehrtens <hauke@hauke-m.de>
The Radxa E52C is a compact network computer using the Rockchip RK3582
SoC.
- https://radxa.com/products/network-computer/e52c
Hardware
--------
- Dual Cortex-A76 and Quad Cortex-A55 CPU
- 5 TOPS NPU
- 2/4/8GB LPDDR4 RAM
- 16/32/64GB on-board eMMC
- microSD card slot
- 2x 2.5 Gigabit Ethernet ports
- USB 3.1 Gen1 Type-A HOST/OTG port
- USB Type-C debug port
- USB Type-C power port
Installation
------------
Uncompress the OpenWrt sysupgrade and write it to a micro SD card or
eMMC using dd.
Signed-off-by: FUKAUMI Naoki <naoki@radxa.com>
Link: https://github.com/openwrt/openwrt/pull/19867
Signed-off-by: Hauke Mehrtens <hauke@hauke-m.de>
The Radxa ROCK 5C (Lite) is a single board computer using the Rockchip
RK3588S2 (RK3582) SoC.
- https://radxa.com/products/rock5/5c
Hardware
--------
- Quad (Dual) Cortex-A76 and Quad Cortex-A55 CPU
- Mali-G610 MP4 GPU (5C only)
- 6 (5) TOPS NPU
- 1/2/4/8/16/32GB LPDDR4X RAM
- eMMC/SPI NOR flash connector
- microSD card slot
- Wi-Fi 6 (AIC8800D80, not yet supported)
- Gigabit Ethernet port with PoE (additional PoE HAT required)
- USB 3.1 Gen1 Type-A HOST/OTG port
- USB 3.1 Gen1 Type-A HOST port
- 2x USB 2.0 Type-A HOST ports
- FPC connector with PCIe 2.1 x1
- PWM fan connector
- 20x2 pin header
- USB Type-C power port
Installation
------------
Uncompress the OpenWrt sysupgrade and write it to a micro SD card or
eMMC using dd.
Signed-off-by: FUKAUMI Naoki <naoki@radxa.com>
Link: https://github.com/openwrt/openwrt/pull/19867
Signed-off-by: Hauke Mehrtens <hauke@hauke-m.de>
The Radxa ROCK 5 ITX(+) is a Mini-ITX form factor computer using the
Rockchip RK3588 SoC.
- https://radxa.com/products/rock5/5itx
- https://radxa.com/products/rock5/5itxp
Hardware
--------
- Quad Cortex-A76 and Quad Cortex-A55 CPU
- Mali-G610 MP4 GPU
- 6 TOPS NPU
- 4/8/16/24/32GB LPDDR5 RAM
- on-board eMMC
- 16MB SPI NOR flash
- microSD card slot
- 2x 2.5 Gigabit Ethernet ports with PoE (additional PoE module required)
- USB 3.1 Gen1 Type-C HOST/OTG port
- 4x USB 3.1 Gen1 Type-A HOST ports
- 2x USB 2.0 Type-A HOST ports
- M.2 M Key connector with PCIe 3.0 x2
- 4x SATA connectors (ITX only)
- 2nd M.2 M Key connector with PCIe 3.0 x2 (ITX+ only)
- M.2 E Key connector with PCIe 2.1 x1 and USB 2.0
- RTC battery socket for CR1220
- 4pin PWM fan connector
- Serial console pin header
- Front panel pin headers
- 24pin ATX power connector
- 5525 12V DC jack
Installation
------------
Uncompress the OpenWrt sysupgrade and write it to a micro SD card or
eMMC using dd.
Signed-off-by: FUKAUMI Naoki <naoki@radxa.com>
Link: https://github.com/openwrt/openwrt/pull/19867
Signed-off-by: Hauke Mehrtens <hauke@hauke-m.de>
The Radxa ROCK 5B+ is a single board computer using the Rockchip
RK3588 SoC.
- https://radxa.com/products/rock5/5bp
Hardware
--------
- Quad Cortex-A76 and Quad Cortex-A55 CPU
- Mali-G610 MP4 GPU
- 6 TOPS NPU
- 4/8/16/24/32GB LPDDR5 RAM
- 16/32/64/128/256GB on-board eMMC (optional)
- 16MB SPI NOR flash
- microSD card slot
- Wi-Fi 6 (Realtek RTW8852BE)
- 2.5 Gigabit Ethernet port with PoE (additional PoE HAT required)
- USB 3.1 Gen1 Type-C HOST/OTG port
- 2x USB 3.1 Gen1 Type-A HOST ports
- 2x USB 2.0 Type-A HOST ports
- 2x M.2 M Key connectors with PCIe 3.0 x2
- M.2 B Key connector
- SIM card slot
- RTC battery connector
- PWM fan connector
- 20x2 pin header
- USB Type-C power port
Installation
------------
Uncompress the OpenWrt sysupgrade and write it to a micro SD card or
eMMC using dd.
Signed-off-by: FUKAUMI Naoki <naoki@radxa.com>
Link: https://github.com/openwrt/openwrt/pull/19867
Signed-off-by: Hauke Mehrtens <hauke@hauke-m.de>
Backport dts changes up to Linux v6.17 for Radxa E52C.
Signed-off-by: FUKAUMI Naoki <naoki@radxa.com>
Link: https://github.com/openwrt/openwrt/pull/19867
Signed-off-by: Hauke Mehrtens <hauke@hauke-m.de>
Backport dts changes up to Linux v6.17 for Radxa ROCK 5C and 5C Lite.
Signed-off-by: FUKAUMI Naoki <naoki@radxa.com>
Link: https://github.com/openwrt/openwrt/pull/19867
Signed-off-by: Hauke Mehrtens <hauke@hauke-m.de>
Backport dts changes up to Linux v6.17 for Radxa ROCK 5 ITX and ITX+.
Signed-off-by: FUKAUMI Naoki <naoki@radxa.com>
Link: https://github.com/openwrt/openwrt/pull/19867
Signed-off-by: Hauke Mehrtens <hauke@hauke-m.de>
Backport dts changes up to Linux v6.17 for Radxa ROCK 5B, 5B+, and 5T.
Signed-off-by: FUKAUMI Naoki <naoki@radxa.com>
Link: https://github.com/openwrt/openwrt/pull/19867
Signed-off-by: Hauke Mehrtens <hauke@hauke-m.de>
Backport dts changes up to Linux v6.17 for Radxa ROCK 5A.
Use power(green) LED instead of heartbeat(blue) LED.
Signed-off-by: FUKAUMI Naoki <naoki@radxa.com>
Link: https://github.com/openwrt/openwrt/pull/19867
Signed-off-by: Hauke Mehrtens <hauke@hauke-m.de>
Backport dts changes up to Linux v6.17 for Rockchip RK358x.
Signed-off-by: FUKAUMI Naoki <naoki@radxa.com>
Link: https://github.com/openwrt/openwrt/pull/19867
Signed-off-by: Hauke Mehrtens <hauke@hauke-m.de>
Backport gated-fixed-clk driver from Linux v6.13.
This is needed to fix a PCIe controller probe hang on the Radxa ROCK 5
ITX.
Signed-off-by: FUKAUMI Naoki <naoki@radxa.com>
Link: https://github.com/openwrt/openwrt/pull/19867
Signed-off-by: Hauke Mehrtens <hauke@hauke-m.de>
So much code was distributed between phy/ethernet/dsa drivers. A lot
was already cleand up before. With this step the mdio bus gets its
own space and is no longer hidden inside the ethernet driver.
This commit is mostly a copy/paste that includes only minor changes.
- define prefixes are renamed to RTMDIO
- The driver is totally self contained (does not rely on SoC include)
- The DTS structure (mdio node below ethernet node) was kept
- The driver is added to the kernel config of all subtargets.
Signed-off-by: Markus Stockhausen <markus.stockhausen@gmx.de>
Link: https://github.com/openwrt/openwrt/pull/19942
Signed-off-by: Robert Marko <robimarko@gmail.com>
The ethernet and mdio code will be splitted. The dsa driver depends
on proper loading of both, before switch setup can start. Sadly there
are severe cleanup issues in the probe() function if one of the
required devices is not available.
As a temporary workaround provide a dedicated check function that
verifies if the ethernet platform device driver is loaded and can
be used.
Signed-off-by: Markus Stockhausen <markus.stockhausen@gmx.de>
Link: https://github.com/openwrt/openwrt/pull/19942
Signed-off-by: Robert Marko <robimarko@gmail.com>
Use Unix LF style instead of Windows CRLF style.
Signed-off-by: Shiji Yang <yangshiji66@outlook.com>
Link: https://github.com/openwrt/openwrt/pull/19963
Signed-off-by: Robert Marko <robimarko@gmail.com>
At the end of RX NAPI polling the counter and mask registers are
cleaned up. Although this might run in parallel there is no
synchronization and the register modifications are some wild mix.
RTL83xx enables only the interrupt of a single ring while RTL93xx
just reactivates all interrupts (even for other NAPI threads).
Make use of the driver lock and only modify the interrupt bits that
the current thread owns.
Signed-off-by: Markus Stockhausen <markus.stockhausen@gmx.de>
Link: https://github.com/openwrt/openwrt/pull/19960
Signed-off-by: Robert Marko <robimarko@gmail.com>
Now that the counter registers work fine there is no need to
free buffers in software. Hardware will automatically block
input processing when software processing is too slow.
Signed-off-by: Markus Stockhausen <markus.stockhausen@gmx.de>
Link: https://github.com/openwrt/openwrt/pull/19960
Signed-off-by: Robert Marko <robimarko@gmail.com>
The receive path of the RTL93xx SoCs is currently discarding packets
in software. Analysis gives the following explanation:
- RX ring size registers are setup with the full software ring size
- When packets are received the packet counter registers are increased
- After RX processing the counter registers are changed the wrong way
- From then SOC is allowed to receive more packets than software allows
- Overflow interrupts are fired
- As a reaction to that the software drops packets
Change the processing as follows:
- Setup ring size registers with a headroom of 2 buffers
- Decrease the counter registers with the real work done
With this change no more overflow interrupts occur because the SoC
disables the queues before they can overflow or hit a buffer that is
still owned by the CPU.
Benchmark from single stream iperf3 run, with server process running
on ZyXEL XGS1210 (RTL930x).
iperf3 run before
-----------------------------------------------------------
Server listening on 5201 (test #1)
-----------------------------------------------------------
Accepted connection from 192.168.2.86, port 54412
[ 5] local 192.168.2.71 port 5201 connected to 192.168.2.86 port 54418
[ ID] Interval Transfer Bitrate
[ 5] 0.00-1.00 sec 384 KBytes 3.14 Mbits/sec
[ 5] 1.00-2.00 sec 0.00 Bytes 0.00 bits/sec
[ 5] 2.00-3.00 sec 0.00 Bytes 0.00 bits/sec
[ 5] 3.00-4.01 sec 5.12 MBytes 42.8 Mbits/sec
[ 5] 4.01-5.00 sec 11.4 MBytes 95.8 Mbits/sec
[ 5] 5.00-6.00 sec 0.00 Bytes 0.00 bits/sec
[ 5] 6.00-7.00 sec 0.00 Bytes 0.00 bits/sec
[ 5] 7.00-8.00 sec 0.00 Bytes 0.00 bits/sec
[ 5] 8.00-9.00 sec 0.00 Bytes 0.00 bits/sec
[ 5] 9.00-10.00 sec 0.00 Bytes 0.00 bits/sec
iperf3 run after
-----------------------------------------------------------
Server listening on 5201 (test #1)
-----------------------------------------------------------
Accepted connection from 192.168.2.86, port 55228
[ 5] local 192.168.2.71 port 5201 connected to 192.168.2.86 port 55232
[ ID] Interval Transfer Bitrate
[ 5] 0.00-1.00 sec 22.8 MBytes 191 Mbits/sec
[ 5] 1.00-2.01 sec 25.4 MBytes 211 Mbits/sec
[ 5] 2.01-3.00 sec 25.4 MBytes 215 Mbits/sec
[ 5] 3.00-4.01 sec 26.5 MBytes 220 Mbits/sec
[ 5] 4.01-5.00 sec 26.2 MBytes 222 Mbits/sec
[ 5] 5.00-6.00 sec 26.9 MBytes 225 Mbits/sec
[ 5] 6.00-7.00 sec 27.0 MBytes 226 Mbits/sec
[ 5] 7.00-8.01 sec 26.9 MBytes 224 Mbits/sec
[ 5] 8.01-9.00 sec 26.5 MBytes 223 Mbits/sec
[ 5] 9.00-10.00 sec 26.8 MBytes 225 Mbits/sec
[ 5] 10.00-10.02 sec 640 KBytes 224 Mbits/sec
Signed-off-by: Markus Stockhausen <markus.stockhausen@gmx.de>
Link: https://github.com/openwrt/openwrt/pull/19960
Signed-off-by: Robert Marko <robimarko@gmail.com>
Backport quirks for two SFP+ modules. Both support the RollBall protocol.
The fix for the FLYPRO module is queued in net-next tree.
Signed-off-by: Aleksander Jan Bajkowski <olek2@wp.pl>
Link: https://github.com/openwrt/openwrt/pull/19949
Signed-off-by: Hauke Mehrtens <hauke@hauke-m.de>
These patches hacked the set_eee() and get_eee() functions into
the phy_driver. Drop them with no consumer left.
Signed-off-by: Markus Stockhausen <markus.stockhausen@gmx.de>
Link: https://github.com/openwrt/openwrt/pull/19906
Signed-off-by: Hauke Mehrtens <hauke@hauke-m.de>
Since we are using upstream PHY drivers there is no more need
for the downstream version. Side effect is that the SoC dependent
polling functions are no longer needed. This was always wrong
in this driver.
Signed-off-by: Markus Stockhausen <markus.stockhausen@gmx.de>
Link: https://github.com/openwrt/openwrt/pull/19906
Signed-off-by: Hauke Mehrtens <hauke@hauke-m.de>
A new version of the ZyXEL XGS1210-12 has been discovered in
the wild. It includes at least two known hardware changes
- lan9/lan10 use RTL8221B instead of RTL8226
- lan9/lan10 use different SMI busses
Pave the new device the way by splitting the existing DTS.
According to the vendor website the models are named
- A1 (first version): not explicetly labeled
- B1 (second version): Label Rev. B1 on device
Rename the current OpenWrt device definition to A1 as it was
made for the first version. To stay compatible with older
installations, add the old device name to the list of
supported devices.
Signed-off-by: Markus Stockhausen <markus.stockhausen@gmx.de>
Link: https://github.com/openwrt/openwrt/pull/19908
Signed-off-by: Hauke Mehrtens <hauke@hauke-m.de>
The rt-loader currently only supports booting piggy backed lzma
compressed kernels. This requires a data layout where the kernel
directly follows the loader. That might not be sufficient for
more complex flash layouts.
Especially bootbase devices (like ZyXEL GS1920) will need some
kind of chain loading that needs to be explored yet.
Enhance the rt-loader as follows:
- Allow to build as standalone version
- In this case a flash start address is given
- During boot loader will search the ROM starting from that address
- If it finds a uImage this will be loaded into RAM
- Afterwards it will be decompressed to its load address
- While we are here add uncompressed uImage support
As always the implementation tries to be as simple as possible.
- uImage detection works without magics
- uImage will be loaded to highest possible memory address
- Documentation in Makefile has been adapted accordingly
Funny side fact: A standalone rt-loader can chain load a piggy
backed rt-loader from flash.
During bootup loader will show
rt-loader
Running on RTL8380M (chip id 6275C) with 256MB
Relocate 15760 bytes from 0x82000000 to 0x8ffa0000
Searching for uImage starting at 0xb45a0000 ...
uImage 'MIPS OpenWrt Linux-6.12.40' found at 0xb45a0000 with load address 0x80100000
Copy 2923034 bytes of image data to 0x8fcd61e6 ...
Extract image with 2923034 bytes from 0x8fcd61e6 to 0x80100000 ...
Final kernel size is 2923034 bytes
Booting kernel from 0x80100000 ...
Signed-off-by: Markus Stockhausen <markus.stockhausen@gmx.de>
Link: https://github.com/openwrt/openwrt/pull/19832
Signed-off-by: Hauke Mehrtens <hauke@hauke-m.de>
Provide a crc32 function (will be needed later). Do some
minor naming and coding cleanups
Signed-off-by: Markus Stockhausen <markus.stockhausen@gmx.de>
Link: https://github.com/openwrt/openwrt/pull/19832
Signed-off-by: Hauke Mehrtens <hauke@hauke-m.de>
Registers must not be accessed in parallel by multiple drivers.
Read-modify-write operations are not atomic, and the result of parallel
access is undefined.
The MAC_L2_GLOBAL_CTRL2 register is essentially a pin configuration
register and is represented by a pinmux node in the devicetree. Operations
on this register by the realtek,rtl838x-eth driver must therefore also be
reflected in the devicetree.
Since the MDIO sets used are board-specific, the pins must be enabled in
the board’s devicetree. This can be achieved using the pinctrl properties
for the realtek,rtl83xx-switch.
&switch0 {
pinctrl-names = "default";
pinctrl-0 = <&pinmux_enable_mdc_mdio_0>,
<&pinmux_enable_mdc_mdio_1>;
....
};
Signed-off-by: Sven Eckelmann <sven@narfation.org>
Link: https://github.com/openwrt/openwrt/pull/19815
Signed-off-by: Robert Marko <robimarko@gmail.com>
The pinmux-related registers on the RTL931X SoC family are spread across
various non-consecutive registers. It might be tempting to modify them
directly in a specific driver (SPI, LED, etc.), but this would cause issues
with parallel, non-locked read-modify-write operations, which are required
to update individual portions of these registers.
Instead, it is better to use the devicetree pinctrl properties to define
the correct configurations for the various operation modes.
One important setting here is the LED Sync bit. This allows the LED
controller to generate an additional positive edge on the `STCP`
("STore Clock Pin", also known as `RCLK`) of the LED shift register after
the actual content has already been shifted in using the normal shift
clock. The LED shift register is then expected to copy the content from the
shift register section into the storage registers, which act as the actual
LED output control. This functionality is available in, and commonly used
with, the SNx4HC595 family of shift registers.
To activate it, simply register it in the default state of the
"realtek,rtl83xx-switch" node:
&switch0 {
pinctrl-names = "default";
pinctrl-0 = <&pinmux_enable_led_sync>;
....
};
It would be nicer when this can be directly added to the led subnode. But
for this to work, `realtek,rtl9300-leds` must first be an actual driver
(known to the driver core).
[1] https://www.ti.com/lit/ds/symlink/sn74hc595.pdf
Suggested-by: Bevan Weiss <bevan.weiss@gmail.com>
Signed-off-by: Sven Eckelmann <sven@narfation.org>
Link: https://github.com/openwrt/openwrt/pull/19815
Signed-off-by: Robert Marko <robimarko@gmail.com>
The MAC_L2_GLOBAL_CTRL2 register is primarily used for pin configuration.
It is necessary to select specific modes for pins or to free them for use
as GPIOs.
Fixes: 9dbc04785c ("realtek: add rtl8231-aux to rtl931x.dtsi")
Signed-off-by: Sven Eckelmann <sven@narfation.org>
Link: https://github.com/openwrt/openwrt/pull/19815
Signed-off-by: Robert Marko <robimarko@gmail.com>
The pinmux-related registers on the RTL930X SoC family are spread across
various non-consecutive registers. It might be tempting to modify them
directly in a specific driver (SPI, LED, etc.), but this would cause issues
with parallel, non-locked read-modify-write operations, which are required
to update individual portions of these registers.
Instead, it is better to use the devicetree pinctrl properties to define
the correct configurations for the various operation modes.
One important setting here is the LED Sync bit. This allows the LED
controller to generate an additional positive edge on the `STCP`
("STore Clock Pin", also known as `RCLK`) of the LED shift register after
the actual content has already been shifted in using the normal shift
clock. The LED shift register is then expected to copy the content from the
shift register section into the storage registers, which act as the actual
LED output control. This functionality is available in, and commonly used
with, the SNx4HC595 family of shift registers.
To activate it, simply register it in the default state of the
"realtek,rtl83xx-switch" node:
&switch0 {
pinctrl-names = "default";
pinctrl-0 = <&pinmux_enable_led_sync>;
....
};
It would be nicer when this can be directly added to the led subnode. But
for this to work, `realtek,rtl9300-leds` must first be an actual driver
(known to the driver core).
[1] https://www.ti.com/lit/ds/symlink/sn74hc595.pdf
Suggested-by: Bevan Weiss <bevan.weiss@gmail.com>
Signed-off-by: Sven Eckelmann <sven@narfation.org>
Link: https://github.com/openwrt/openwrt/pull/19815
Signed-off-by: Robert Marko <robimarko@gmail.com>
Add the NPU and reserved memory node for AN7581 dtsi since it's not
supported.
Link: https://github.com/openwrt/openwrt/pull/19816
Signed-off-by: Christian Marangi <ansuelsmth@gmail.com>
Major backport of upstream patch for support of multiple feature of the
Airoha Ethernet driver.
Feature backported are TSO, Jumbo packet, Offload and initial Wlan
Offload support.
Link: https://github.com/openwrt/openwrt/pull/19816
Signed-off-by: Christian Marangi <ansuelsmth@gmail.com>
Backport trivial fixes from upstream related to pinctrl and ethernet
driver.
Link: https://github.com/openwrt/openwrt/pull/19816
Signed-off-by: Christian Marangi <ansuelsmth@gmail.com>
Backport patch adding support for AN7581 Ethernet PHY based on the same
Mediatek embedded Switch PHY.
Link: https://github.com/openwrt/openwrt/pull/19816
Signed-off-by: Christian Marangi <ansuelsmth@gmail.com>
Mediatek PHY patch has been merged upstream. Reintroduce them to
backport directory as the same PHY is also needed for Airoha target.
All the affected patch automatically refreshed.
Link: https://github.com/openwrt/openwrt/pull/19816
Signed-off-by: Christian Marangi <ansuelsmth@gmail.com>
Backport support for Aeonsemi AS121xxx PHY. The PHY require dedicated
firmware to be loaded to correctly work and support a big family of
Aeonsemi PHY that provide from 1G to 10G speed.
Automatically refresh all affected patch and file (rtl PHY).
Link: https://github.com/openwrt/openwrt/pull/19816
Signed-off-by: Christian Marangi <ansuelsmth@gmail.com>
Replace thermal patch with upstream version. The thermal maintainer
reported that the sysfs entry are considered deprecated and that slope
and offset should be handled internally to the driver.
Link: https://github.com/openwrt/openwrt/pull/19816
Signed-off-by: Christian Marangi <ansuelsmth@gmail.com>
Fix the model name in DTS compatible, Makefiles and board scripts by
using dash instead of comma or underscore. This aligns it with other
examples in OpenWrt and makes in consistent in all places where the
board model is used.
'tplink,tl-st1008f,v2' --> 'tplink,tl-st1008f-v2'
'tplink,tl-st1008f_v2' --> 'tplink,tl-st1008f-v2'
Fixes: 39b9b491bb ("realtek: add support for TP-Link TL-ST1008F v2.0")
Fixes: #19930
Signed-off-by: Jonas Jelonek <jelonek.jonas@gmail.com>
Link: https://github.com/openwrt/openwrt/pull/19934
Signed-off-by: Hauke Mehrtens <hauke@hauke-m.de>
Backport a patch from upstream kernel 6.17-rc4 which fixes a regression
introduced in the latest stable kernel versions.
This is already in the Linus stable queues for the next minor kernel
updates.
Fixes: 1c92e468d5 ("kernel: bump 6.6 to 6.6.103")
Fixes: f39c7e103f ("kernel: bump 6.12 to 6.12.43")
Reported-by: Goetz Goerisch <ggoerisch@gmail.com>
Signed-off-by: Hauke Mehrtens <hauke@hauke-m.de>
Currently the calculation for the CMU (even) SerDes works similar
to this pseudo code.
analog_backend_serdes = get_analog_serdes(frontend_serdes);
even_backend_serdes = analog_backend_serdes & ~1;
write_to(even_backend_serdes);
Because of the SerDes layout and frontend/backend mapping this can
be swapped to the following order with the same resulting Serdes.
even_frontend_serdes = frontend_serdes ~1;
analog_backend_serdes = get_analog_serdes(even_frontend_serdes);
write_to(analog_backed_serdes);
In the later example the frontend/backend mapping code is already
in our new functions. So swap the calculation logic and use the
new access functions. This allows to finally drop the old access
functions without mapping.
From now on all RTL931x SerDes functions will use a consistent
frontend view.
Signed-off-by: Markus Stockhausen <markus.stockhausen@gmx.de>
Link: https://github.com/openwrt/openwrt/pull/19873
Signed-off-by: Hauke Mehrtens <hauke@hauke-m.de>
The RTL931x has 14 frontend and at least 26 backend serdes. Currently
the programming functions always need to determine the right backend
serdes from the given frontend serdes on their own. We plan to provide
a consistent serdes mapping to all callers.
As the third step make use of these new functions whenever we want to
access the "digital 2" pages. The pages are mapped starting at 0x200.
So the function conversion is as simple as this:
Old:
dsds = (sds - 1) * 2;
rtmdio_931x_read_sds_phy(dsds + 1, page, ...)
New:
rtmdio_931x_read_sds_phy_new(sds, page + 0x200, ...)
Signed-off-by: Markus Stockhausen <markus.stockhausen@gmx.de>
Link: https://github.com/openwrt/openwrt/pull/19873
Signed-off-by: Hauke Mehrtens <hauke@hauke-m.de>
The more we step down into the SerDes deeps the more confusing it
gets. Nevertheless it is not to late to fix a wrong assumption.
Until now it seemed as if the frontend/backend SerDes mapping is
totally without intersection. This is not true.
The backend SerDes mapping is also dependent on the mode. Especially
the proprietary Realtek XSGMII mode stands out from all other
mappings. So fix the descriptions and the calculation of the third
page package (digital 2 aka XSGMII 2).
As it was not yet used it had no impact.
Fixes: a4cbb44c1b ("realtek: convert access to RTL931x analog serdes pages")
Signed-off-by: Markus Stockhausen <markus.stockhausen@gmx.de>
Link: https://github.com/openwrt/openwrt/pull/19873
Signed-off-by: Hauke Mehrtens <hauke@hauke-m.de>
The RTL931x has 14 frontend and at least 26 backend serdes. Currently
the programming functions always need to determine the right backend
serdes from the given frontend serdes on their own. We plan to provide
a consistent serdes mapping to all callers.
As the second step make use of these new functions whenever we
want to access the digital 1 pages. The pages are mapped starting
at 0x100. So the function conversion is as simple as this:
Old:
dsds = (sds - 1) * 2;
rtmdio_931x_read_sds_phy(dsds, page, ...)
New:
rtmdio_931x_read_sds_phy_new(sds, page + 0x100, ...)
Signed-off-by: Markus Stockhausen <markus.stockhausen@gmx.de>
Link: https://github.com/openwrt/openwrt/pull/19873
Signed-off-by: Hauke Mehrtens <hauke@hauke-m.de>
For some reason 3 of the 4 mdio access functions contain an
artifical delay of 10ms. While it might have been part of
older Realtek SDKs it can no longer be found in current ones.
Remove the delays.
While we are here remove the pre-access bus ready checks.
It is sufficient to run them after the command start. If
anything fails the caller will get an error. This is the
same behaviour as for the other targets.
Finally cleanup the error handling. Something like this makes
no sense at all.
err = rtmdio_838x_smi_wait_op(100000);
if (err)
goto errout;
err = 0;
errout:
Signed-off-by: Markus Stockhausen <markus.stockhausen@gmx.de>
Link: https://github.com/openwrt/openwrt/pull/19901
Signed-off-by: Robert Marko <robimarko@gmail.com>
When sending llc packets with vlan tx offload, the hardware fails to
actually add the tag. Deal with this by fixing it up in software.
Fixes: https://github.com/openwrt/openwrt/issues/19916
Reported-by: Thibaut VARENE <hacks@slashdirt.org>
Signed-off-by: Felix Fietkau <nbd@nbd.name>
Most drivers have this as const. Especially upstream in the kernel.
Signed-off-by: Rosen Penev <rosenp@gmail.com>
Link: https://github.com/openwrt/openwrt/pull/19911
Signed-off-by: Hauke Mehrtens <hauke@hauke-m.de>
Import upstream patches fixing issues with unreliable temperature
reading on some batches of the MediaTek MT7988 SoCs.
Signed-off-by: Daniel Golle <daniel@makrotopia.org>
Prepare the SerDes patch function to allow different patch sequences
depending on the phy mode. Patches are required to allow devices with a
lightweight bootloader (one that doesn't have a "rtk network init"
command) to use the serdes. Some modes required a different patch
sequence than the one currently used.
Signed-off-by: Damien Dejean <dam.dejean@gmail.com>
Link: https://github.com/openwrt/openwrt/pull/19834
Signed-off-by: Hauke Mehrtens <hauke@hauke-m.de>
The addition of the soft_reset() function to the RTL8221B PHYs
missed to take care of C22/C45 standalone PHY versions. Especially
on RTL930x switch devices with these PHY the reset fails for the
C45 operation mode. This comes from the fact that the mdio bus
disables C22 read/writes when being set to C45.
Upstream has gained a proper C45 reset function. Use it for the
C45 PHY models.
Fixes: 7e3284eef7 ("generic: use genphy_soft_reset for RealTek 2.5G PHYs")
Signed-off-by: Markus Stockhausen <markus.stockhausen@gmx.de>
Link: https://github.com/openwrt/openwrt/pull/19843
Signed-off-by: Hauke Mehrtens <hauke@hauke-m.de>
We reached the point of no return. Upstream has gained the final
bits for the RTL8226 PHYs. That means.
- RTL8226 MAC side behaves like RTL8221(B)
- It's serdes no longer uses proprietary HSGMII (2.5G SGMII)
- Instead it dynamically switches between SGMII and 2500base-x
This (partly) solves one of the central henn/egg problems of the
Realtek target. To change the MAC/PHY interface mode both sides
need to have all bits in place to do so. But where to start if
so much needs to be done?
Now the PHY side has created facts and it mitigates a lot of
problems. All downstream HSGMII patches and coding can be dropped
in the future.
For now only adapt the only DTS that still maps PHYs to HSGMII.
Signed-off-by: Markus Stockhausen <markus.stockhausen@gmx.de>
Link: https://github.com/openwrt/openwrt/pull/19843
Signed-off-by: Hauke Mehrtens <hauke@hauke-m.de>
The patching sequence of the RTL8214x/8218x is very similar.
Especially the preparation for readiness is always the same.
Provide a common helper to improve readability.
While we are here clean up the changed functions
- Sort variable definitions according to upstream
- simplify some messages
Signed-off-by: Markus Stockhausen <markus.stockhausen@gmx.de>
Link: https://github.com/openwrt/openwrt/pull/19810
Signed-off-by: Hauke Mehrtens <hauke@hauke-m.de>
Our phy driver can handle some multiport phys (e.g. RTL8218B
or RTL8214FC). To access arbitrary ports some package access
functions have been defined. These were implemented in the
mdio bus with poor knowledge about the phy/mdio dependencies.
So they add unneeded complexity to the bus and the phy driver
must access these external functions directly.
Provide a new helper get_package_phy() that can derive any
phy device in a package from a given phy of that package.
Make use of this local helper and cut the mdio dependency.
While we refactor several firmware patching functions rename
the loop variables to "port" to better indicate what we are
working on.
Signed-off-by: Markus Stockhausen <markus.stockhausen@gmx.de>
Link: https://github.com/openwrt/openwrt/pull/19810
Signed-off-by: Hauke Mehrtens <hauke@hauke-m.de>
Now that we have a get_base_phy() function a lot code of the RTL8214FC
handling can be cleaned up. To name a few:
- use phy_read/phy_write instead of mdiobus functions or the even worse
phy_package_..._paged() helpers
- replace messages with phydev_info()
- remove if/else statements around copper/fibre handling
Signed-off-by: Markus Stockhausen <markus.stockhausen@gmx.de>
Link: https://github.com/openwrt/openwrt/pull/19810
Signed-off-by: Hauke Mehrtens <hauke@hauke-m.de>
Currently phy packages (like RTL8214x/RTL8218x) are patched and
initialized as soon as the first phy of the package is found.
In this situation the shared structure is not finalized because
devm_phy_package_join() has only been called for the first phy.
This is no issue as the patching directly hammers the bus addresses
for the follow-up phys.
In the future we want to simplify the package handling and allow
to access all phy_device structures from only one phy_device of
the package. With this we can use normal phy_read/phy_write.
Switch the probing logic to "late patching". With this we will
initialize the firmware of the package when the last phy of the
package has been found and thus the shared structure is complete.
Provide get_base_phy() as the first package helper that allows
to determine the first phy of the package from any other phy.
While we are here drop the shared structure that only repeats the
phy name and has no other use.
Signed-off-by: Markus Stockhausen <markus.stockhausen@gmx.de>
Link: https://github.com/openwrt/openwrt/pull/19810
Signed-off-by: Hauke Mehrtens <hauke@hauke-m.de>
The Plasma Cloud PSX10 Switch is a 8 + 2 port multi-GBit switch with
8x 10/100/1000/2500BaseT Ethernet ports and 2x SFP+ module slot.
Hardware:
- RTL9302C SoC
- Macronix MX25L25645G (32MB flash)
- Winbond W632GU6NB-12 (256MB DDR3 SDRAM - only 128 MB configured*)
- 2x RTL8224 4x 10m/100m/1/2.5 Gigabit PHY
- SFP+ 2x 10GBit slot
- IC+ IP8008 POE+ PSE controller
The switch is powered by 54 Volts 2.77A barrel connector. The internal TTL
serial connector can be used to access the terminal. Pins from 1: TX RX
(unused) GND. Serial connection is via 115200 baud, 8N1.
A reset button is accessible through a hole in the front panel.
*) Only 128 MB of RAM are currently configured because there were
infrequent random memory corruptions detected when using memtester with a
256 MB DT configuration. This could also be reproduced with RTLSDK.
Installation
------------
* The device can be flashed by using sysupgrade command. Either from the
original vendor firmware or using an initramfs (see "Debug")
* Connect serial as per the layout above. Connection parameters: 115200 8N1
* The image must be copied using scp to /tmp of the device
scp openwrt-realtek-rtl930x-plasmacloud_psx10-squashfs-sysupgrade.bin root@[IP address of the device]:/tmp/
* start sysupgrade without saving the original vendor configuration
sysupgrade -n /tmp/openwrt-realtek-rtl930x-plasmacloud_psx10-squashfs-sysupgrade.bin
Installation via u-boot
-----------------------
If you have an TFTP server connected to the switch, it is possible to
directly install the device using the factory image from u-boot
# setup networking and IP of TFP server
rtk network on
setenv ipaddr 10.100.100.99
setenv serverip 10.100.100.20
# get factory image
tftp 0x84000000 factory.bin
# erase firmware partitions
sf probe 0
sf erase 0x100000 0x01f00000
# write firmware to both partitions
sf write ${fileaddr} 0x100000 ${filesize}
sf write ${fileaddr} 0x1080000 ${filesize}
# adjust the boot commands
setenv bootargs "mtdparts=spi0.0:896k(u-boot),64k(u-boot-env),64k(u-boot-env2),15872k(inactive),15872k(firmware2)"
setenv bootcmd "rtk init; bootm 0xb5080000"
# restart
reset
Debug
-----
* Connect serial as per the layout above. Connection parameters: 115200 8N1.
* A tftp server is required, tftpd-hpa works well.
* Power the device, at U-Boot start rapidly hit Esc key to stop autoboot
* Enable network:
rtk network on
* Change ip address of device:
setenv ipaddr 192.168.1.6
* Download initramfs from TFTP server:
tftpboot 0x84000000 192.168.1.111:openwrt-realtek-rtl930x-plasmacloud_psx10-initramfs-kernel.bin
* Boot loaded file:
bootm 0x84000000
Signed-off-by: Harshal Gohel <hg@simonwunderlich.de>
Co-developed-by: Sharadanand Karanjkar <sk@simonwunderlich.de>
Signed-off-by: Sharadanand Karanjkar <sk@simonwunderlich.de>
Link: https://github.com/openwrt/openwrt/pull/19362
Signed-off-by: Hauke Mehrtens <hauke@hauke-m.de>
The Plasma Cloud PSX8 Switch is a 8 port multi-GBit switch with
8x 10/100/1000/2500BaseT Ethernet ports.
Hardware:
- RTL9302C SoC
- Macronix MX25L25645G (32MB flash)
- Winbond W632GU6NB-12 (256MB DDR3 SDRAM - only 128 MB configured*)
- 2x RTL8224 4x 10m/100m/1/2.5 Gigabit PHY
- IC+ IP8008 POE+ PSE controller
The switch is powered by 54 Volts 2.77A barrel connector. The internal TTL
serial connector can be used to access the terminal. Pins from 1: TX RX
(unused) GND. Serial connection is via 115200 baud, 8N1.
A reset button is accessible through a hole in the front panel.
*) Only 128 MB of RAM are currently configured because there were
infrequent random memory corruptions detected when using memtester with a
256 MB DT configuration. This could also be reproduced with RTLSDK.
Installation
------------
* The device can be flashed by using sysupgrade command. Either from the
original vendor firmware or using an initramfs (see "Debug")
* Connect serial as per the layout above. Connection parameters: 115200 8N1
* The image must be copied using scp to /tmp of the device
scp openwrt-realtek-rtl930x-plasmacloud_psx8-squashfs-sysupgrade.bin root@[IP address of the device]:/tmp/
* start sysupgrade without saving the original vendor configuration
sysupgrade -n /tmp/openwrt-realtek-rtl930x-plasmacloud_psx8-squashfs-sysupgrade.bin
Installation via u-boot
-----------------------
If you have an TFTP server connected to the switch, it is possible to
directly install the device using the factory image from u-boot
# setup networking and IP of TFP server
rtk network on
setenv ipaddr 10.100.100.99
setenv serverip 10.100.100.20
# get factory image
tftp 0x84000000 factory.bin
# erase firmware partitions
sf probe 0
sf erase 0x100000 0x01f00000
# write firmware to both partitions
sf write ${fileaddr} 0x100000 ${filesize}
sf write ${fileaddr} 0x1080000 ${filesize}
# adjust the boot commands
setenv bootargs "mtdparts=spi0.0:896k(u-boot),64k(u-boot-env),64k(u-boot-env2),15872k(inactive),15872k(firmware2)"
setenv bootcmd "rtk init; bootm 0xb5080000"
# restart
reset
Debug
-----
* Connect serial as per the layout above. Connection parameters: 115200 8N1.
* A tftp server is required, tftpd-hpa works well.
* Power the device, at U-Boot start rapidly hit Esc key to stop autoboot
* Enable network:
rtk network on
* Change ip address of device:
setenv ipaddr 192.168.1.6
* Download initramfs from TFTP server:
tftpboot 0x84000000 192.168.1.111:openwrt-realtek-rtl930x-plasmacloud_psx8-initramfs-kernel.bin
* Boot loaded file:
bootm 0x84000000
Signed-off-by: Harshal Gohel <hg@simonwunderlich.de>
Co-developed-by: Sharadanand Karanjkar <sk@simonwunderlich.de>
Signed-off-by: Sharadanand Karanjkar <sk@simonwunderlich.de>
Link: https://github.com/openwrt/openwrt/pull/19362
Signed-off-by: Hauke Mehrtens <hauke@hauke-m.de>
Plasma Cloud devices use a dual-firmware regions/slots boot mechanism. On
APs, the u-boot is "intelligent" and checks the NOR/NAND partitions (kernel
+ rootfs) for corruption via "datachk". If validation fails, the bootloader
automatically switches to the fallback partition.
On Realtek-based switches, this "datachk" helper is not available.
However, the bootloader still supports two firmware regions/slots.
When flashing a new image, the "inactive" partition is written instead of
overwriting the active one. If no "inactive" partition exists but
"firmware1" is present, the bootloader always treats "firmware1" as
fallback. Only after a successful flash is the `u-boot-env` updated to
select the newly written partition.
On reboot, the bootloader loads the kernel from the new partition and
passes `mtdparts` information as the kernel cmdline. The Plasma Cloud
switch device tree does not override this with a `bootargs` property, so
the active partition layout is honored from cmdline.
Since offsets, sizes, and names of partitions match between the device tree
and cmdline (except the inactive slot), properties and nodes such as
`nvmem-cells` or `compatible` remain fully usable.
This mechanism also allows switching back to the old firmware slot. For
example, if `firmware1` is currently active (`/proc/mtd` shows it), it can
be switched to slot 2 using:
. /lib/upgrade/upgrade_dualboot.sh
set_boot_part 2
reboot
Firmware upgrades use standard `sysupgrade` tarballs, chosen for
compatibility with vendor images. In theory, one can switch between vendor
and OpenWrt with:
sysupgrade -n /tmp/*-squashfs-sysupgrade.bin
Note: configuration files must not be preserved, as they are not compatible
with vanilla OpenWrt.
Signed-off-by: Harshal Gohel <hg@simonwunderlich.de>
Signed-off-by: Sharadanand Karanjkar <sk@simonwunderlich.de>
Link: https://github.com/openwrt/openwrt/pull/19362
Signed-off-by: Hauke Mehrtens <hauke@hauke-m.de>
To be able to read out the ethaddr from the u-boot environment for MAC
address configuration, it is required to also enable the NVMEM layout
parsing code for the U-Boot env layout.
Signed-off-by: Harshal Gohel <hg@simonwunderlich.de>
Signed-off-by: Sharadanand Karanjkar <sk@simonwunderlich.de>
Link: https://github.com/openwrt/openwrt/pull/19362
Signed-off-by: Hauke Mehrtens <hauke@hauke-m.de>
The function of_get_mac_address is not taking care of evaluation the nvmem
address before trying to read out the mac-address properties. The driver
must check whether the return code is -EPROBE_DEFER and stop the probing
process in that case. If the nvmem-cell related driver code finished, the
probe can be redone ad the correct mac-address will appear for the device.
Signed-off-by: Harshal Gohel <hg@simonwunderlich.de>
Signed-off-by: Sharadanand Karanjkar <sk@simonwunderlich.de>
Link: https://github.com/openwrt/openwrt/pull/19362
Signed-off-by: Hauke Mehrtens <hauke@hauke-m.de>
Add calibration variant and ipq-wifi package for Xiaomi AIoT AC2350
Signed-off-by: Igor Dyatlov <dyatlov.igor@gmail.com>
Link: https://github.com/openwrt/openwrt/pull/19707
Signed-off-by: Robert Marko <robimarko@gmail.com>
The ath9k driver creates an ath9k LED by default. Instead of having a
non functional LED, configure it properly and remove the extra as it's
not needed.
It's also a bit funny matching against phy0 and phy1 when both differ
between ath9k and ath10k.
Signed-off-by: Rosen Penev <rosenp@gmail.com>
Link: https://github.com/openwrt/openwrt/pull/19862
Signed-off-by: Robert Marko <robimarko@gmail.com>
LLDP packets must be transmitted on a single port and trapped on a port of
a device which understands LLDP. It must not forward it to other ports to
avoid confusing neighbor information on connected devices.
Signed-off-by: Harshal Gohel <hg@simonwunderlich.de>
Signed-off-by: Sharadanand Karanjkar <sk@simonwunderlich.de>
Link: https://github.com/openwrt/openwrt/pull/19571
Signed-off-by: Hauke Mehrtens <hauke@hauke-m.de>
Driver needs to configure management frame actions
To support LLDP, EAPOL or MSTP, which needs to be trapped to the CPU
instead of being forwarded.
The function to implement the various management frame actions was already
present but not yet registered correctly.
Signed-off-by: Harshal Gohel <hg@simonwunderlich.de>
Signed-off-by: Sharadanand Karanjkar <sk@simonwunderlich.de>
Link: https://github.com/openwrt/openwrt/pull/19571
Signed-off-by: Hauke Mehrtens <hauke@hauke-m.de>
Driver needs to configure management frame actions
To support LLDP, EAPOL or MSTP, which needs to be trapped to the CPU
instead of being forwarded
Signed-off-by: Harshal Gohel <hg@simonwunderlich.de>
Signed-off-by: Sharadanand Karanjkar <sk@simonwunderlich.de>
Link: https://github.com/openwrt/openwrt/pull/19571
Signed-off-by: Hauke Mehrtens <hauke@hauke-m.de>
The functions to enable trapping of management frames are not RTL83xx
specific. It is more appropriate to use the more generic "rtldsa" prefix
for them.
Signed-off-by: Harshal Gohel <hg@simonwunderlich.de>
Signed-off-by: Sharadanand Karanjkar <sk@simonwunderlich.de>
Link: https://github.com/openwrt/openwrt/pull/19571
Signed-off-by: Hauke Mehrtens <hauke@hauke-m.de>
Add new option required to build with VHOST_MENU=y
This option enables two IOCTLs: VHOST_SET_FORK_FROM_OWNER and
VHOST_GET_FORK_FROM_OWNER. These allow userspace applications
to modify the vhost worker mode for vhost devices.
Also expose module parameter 'fork_from_owner_default' to allow users
to configure the default mode for vhost workers.
By default, `VHOST_ENABLE_FORK_OWNER_CONTROL` is set to `y`,
users can change the worker thread mode as needed.
If this config is disabled (n),the related IOCTLs and parameters will
be unavailable.
If unsure, say "Y".
Signed-off-by: John Audia <therealgraysky@proton.me>
Link: https://github.com/openwrt/openwrt/pull/19618
Signed-off-by: Robert Marko <robimarko@gmail.com>
The ath9k driver creates an ath9k LED by default. Instead of having a
non functional LED, configure it properly and remove the extra as it's
not needed.
Signed-off-by: Rosen Penev <rosenp@gmail.com>
Link: https://github.com/openwrt/openwrt/pull/18904
Signed-off-by: Robert Marko <robimarko@gmail.com>
Use macro defined bias types instead of some magic numbers. This can
help reviewers better understand bias types.
Signed-off-by: Shiji Yang <yangshiji66@outlook.com>
Link: https://github.com/openwrt/openwrt/pull/19855
Signed-off-by: Robert Marko <robimarko@gmail.com>
The RTL931x has 14 frontend and at least 26 backend serdes. Currently
the programming functions always need to determine the right backend
serdes from the given frontend serdes on their own.
We plan to provide a consistent serdes mapping to all callers as follows
Frontend SerDes | 0 1 2 3 4 5 6 7 8 9 10 11 12 13
-----------------+------------------------------------------
Backend SerDes 1 | 0 1 2 3 6 7 10 11 14 15 18 19 22 23
Backend SerDes 2 | 0 1 2 4 6 8 10 12 14 16 18 20 22 24
Backend SerDes 3 | 0 1 2 5 6 9 10 13 14 17 18 21 22 25
frontend page "even" frontend SerDes "odd" frontend SerDes
page 0x000-0x03f (analog): page 0x000-0x03f back SDS page 0x000-0x03f back SDS
page 0x100-0x13f (XSGMII1): page 0x000-0x03f back SDS page 0x000-0x03f back SDS+1
page 0x200-0x23f (XSGMII2): page 0x000-0x03f back SDS page 0x000-0x03f back SDS+2
As a first micro step provide some helpers that simply operate on
frontend serdes and will determine the backend serdes on their own.
So rtmdio_931x_read_sds_phy() and rtmdio_931x_write_sds_phy() operate
on backend serdes. While rtmdio_931x_read_sds_phy_**new**() and
rtmdio_931x_write_sds_phy_**new**() operate on frontend serdes.
This is only an intermediate naming convention and will be cleanup
afterwards.
In a first step make use of these new functions whenever we
want to access the analog page. As the pages stay unchanged
in the new functions conversion is as simple as this:
Old:
asds = rtl931x_get_analog_sds(...)
rtmdio_931x_read_sds_phy(asds, ...)
New:
rtmdio_931x_read_sds_phy_new(sds, ...)
Signed-off-by: Markus Stockhausen <markus.stockhausen@gmx.de>
Link: https://github.com/openwrt/openwrt/pull/19818
Signed-off-by: Robert Marko <robimarko@gmail.com>
The ath9k documentation says to use pci168c strings for the compatible
string, probably because the OWL loader uses it to overide bogus pci IDs
like abcd. This is not the case with ath10k and the documentation
explicitly states to use qcom,ath10k.
Signed-off-by: Rosen Penev <rosenp@gmail.com>
Link: https://github.com/openwrt/openwrt/pull/18920
Signed-off-by: Robert Marko <robimarko@gmail.com>
This device does not come with a pci card. It has a slot where one can
get supplied. What's more, nvmem or ieee80211 frequency limits are not
applied here. It can just get removed.
Signed-off-by: Rosen Penev <rosenp@gmail.com>
Link: https://github.com/openwrt/openwrt/pull/18920
Signed-off-by: Robert Marko <robimarko@gmail.com>
The ath9k driver creates an ath9k LED by default. Instead of having a
non functional LED, configure it properly and remove the extra as it's
not needed.
Signed-off-by: Rosen Penev <rosenp@gmail.com>
Link: https://github.com/openwrt/openwrt/pull/18906
Signed-off-by: Robert Marko <robimarko@gmail.com>
The ath9k driver creates an ath9k LED by default. Instead of having a
non functional LED, configure it properly and remove the extra as it's
not needed.
Signed-off-by: Rosen Penev <rosenp@gmail.com>
Link: https://github.com/openwrt/openwrt/pull/18908
Signed-off-by: Robert Marko <robimarko@gmail.com>
The ath9k driver creates an ath9k LED by default. Instead of having a
non functional LED, configure it properly and remove the extra as it's
not needed.
Set the pcie device to qcom,ath10k as the Documentation says, The pci
line implies it's ath9k when it's actually ath10k.
Signed-off-by: Rosen Penev <rosenp@gmail.com>
Link: https://github.com/openwrt/openwrt/pull/18873
Signed-off-by: Robert Marko <robimarko@gmail.com>
Userspace handling is deprecated.
Signed-off-by: Rosen Penev <rosenp@gmail.com>
Link: https://github.com/openwrt/openwrt/pull/18873
Signed-off-by: Robert Marko <robimarko@gmail.com>
The kmod is installed on all filogic mediatek images, even for devices
that do not have any aquantia hardware. Remove it.
Signed-off-by: Paul Donald <newtwen+github@gmail.com>
Link: https://github.com/openwrt/openwrt/pull/19488
[Do not explicitly remove kmod-phy-aquantia from gatonetworks_gdsp]
Signed-off-by: Hauke Mehrtens <hauke@hauke-m.de>
Move append-teltonika-metadata to image-commands.mk and unify over different targets.
This method can be used to create valid "factory" images for most of Teltonika devices.
Signed-off-by: Simonas Tamošaitis <simsasss@gmail.com>
Link: https://github.com/openwrt/openwrt/pull/19401
Signed-off-by: Hauke Mehrtens <hauke@hauke-m.de>
The ath9k driver creates an ath9k LED by default. Instead of having a
non functional LED, configure it properly and remove the extra as it's
not needed.
Signed-off-by: Rosen Penev <rosenp@gmail.com>
Tested-by: Zoltan HERPAI wigyori@uid0.hu
Link: https://github.com/openwrt/openwrt/pull/18907
Signed-off-by: Hauke Mehrtens <hauke@hauke-m.de>
Support in mt76 has existed for quite a while. Use it.
Signed-off-by: Rosen Penev <rosenp@gmail.com>
Link: https://github.com/openwrt/openwrt/pull/19799
Signed-off-by: Hauke Mehrtens <hauke@hauke-m.de>
This commit adds support for the WAVLINK WL-WN586X3 Rev B, which swaps
the 16MB NOR flash for an 128MB NAND flash chip, and uses UBI for
data partition. This commit utilizes the previous submitted dtsi that
includes common hardware for a few Wavlink routers.
Hardware
--------
- SOC: MediaTek MT7981B
- RAM: 256MB DDR3
- Flash: 128MB SPI-NAND (ESMT F50L1G41LB)
- Ethernet: 2x1Gb Lan 1x1Gb Wan
- WiFi: MediaTek MT7981B 2x2 DBDC 802.11ax 2T2R (2.4/5) with 4 external and 1 internal antennae
- LEDs: 2xLan 1x Wan 1x WIFI 1xSTATUS
Installation
------------
Flashing over the vendor WebUI has been tested and unsuccessful (YMMV).
The image need to be flashed via TFTP which can be activated over the onboard UART serial console:
1. Connect UART: TX->board RX, RX->board TX, GND->board GND.
2. Connect PC to router lan port.
3. Setup the tftp server on PC, set IP to 192.168.10.100.
4. Power on the device. Interrupt boot countdown at uboot boot menu and select 2. Upgrade firmware option.
5. Input the image name and start flashing.
Sample uboot menu:
```
*** U-Boot Boot Menu ***
1. Startup system (Default)
2. Upgrade firmware
3. Upgrade ATF BL2
4. Upgrade ATF FIP
5. Upgrade single image
6. Load image
0. U-Boot console
```
NOTE: Do not use the intermediate image here which is for Rev A only:
https://github.com/themaverickdm/firmware-misc/tree/main/wavlink/wl-wn586x3
MAC Addresses
-------------
LAN: 80:3F:5D:xx:xx:x1 (hw, 0x44e, ASCII encoded)
WAN: 80:3F:5D:xx:xx:x2 (hw, 0x460, ASCII encoded)
2G: 80:3F:5D:xx:xx:x3 (factory, 0x4, raw binary, also on label)
5G: 80:3F:5D:xx:xx:x3 (Same as 2G)
Signed-off-by: Zhenfu Shi <i0ntempest@i0ntempest.com>
Link: https://github.com/openwrt/openwrt/pull/19785
Signed-off-by: Hauke Mehrtens <hauke@hauke-m.de>
CREALITY BOX WB01 is small footprint router based on MediaTek MT7688,
is a device intended to interface Creality brand 3D printers to a cloud service.
Specifications:
- SoC: MediaTek MT7688AN @ 580MHz
- RAM: DDR2 128M (Winbond W971GG6SB-25)
- Flash: BoyaMicro BY25Q128AS (16 MiB, SPI NOR) handled by BoHong bh25q128as driver
- WiFi: 2.4GHz 1T1R internal panel antenna
- Ethernet: 1x LAN (10/100)
- USB: 2x USB2.0 port (Genesys Logic GL850G 2 port USB 2.0 hub)
- UART: 3.3V, TX, RX, GND / 56700 8N1 / only pads on PCB
- microSD SD-XC Class 10 slot
- micro USB input (for power only)
- reset button
- FCC ID: 2AXH6CREALITY-BOX
MAC addresses as verified by OEM firmware:
vendor OpenWrt source
LAN eth0 factory 0x2e
2.4GHz phy0-ap0 factory 0x04 (label)
LEDs
color vendor OpenWRT configurable
red SD card activity - yes
green Cloud connectivity status yes
blue LAN activity eth0 yes
yellow WIFI activity phy0tpt yes
Return to OEM & debrick
- download "cxsw_update.tar.bz2" from manufacturer site
- extract archive to FAT32 USB stick root
- put USB stick in USB2 port
- press & hold reset button
- power on device while holding reset
- wait approx 10 sec
- release reset button
Installation with SD Card
- power on device
- wait for device to finish starting
- copy "openwrt-ramips-mt76x8-creality_wb-01-squashfs-cxsw_update.tar.bz2"
to root of FAT32 SD card
- rename openwrt-ramips-mt76x8-creality_wb-01-squashfs-cxsw_update.tar.bz2
to "cxsw_update.tar.bz2"
- put SD card in device
- device will install OpenWRT on internal flash
Installation via telnet:
- extract the "factory.bin" and "install.sh" from newly created
openwrt-ramips-mt76x8-creality_wb-01-squashfs-cxsw_update.tar.bz2
to FAT32 USB stick root
- telnet to 10.10.10.254, user: root, password: cxswprin
- plug the USB in USB1 port
- cd /media/usbdisk/
- sh install.sh
- device will write "factory.bin" to internal flash
Co-authored-by: George Brooke <figgyc@figgyc.uk>
Co-authored-by: Peca Nesovanovic <peca.nesovanovic@sattrakt.com>
Co-authored-by: shivajiva101 <github.com/shivajiva101>
Co-authored-by: Axel Sepulveda <ansepulveda@uc.cl>
Signed-off-by: Axel Sepulveda <ansepulveda@uc.cl>
Link: https://github.com/openwrt/openwrt/pull/19686
Signed-off-by: Hauke Mehrtens <hauke@hauke-m.de>
mt7531 switch reset delay time is hard coded in the driver. The
"reset-assert-us" and "reset-deassert-us" won't take effect.
Signed-off-by: Shiji Yang <yangshiji66@outlook.com>
Link: https://github.com/openwrt/openwrt/pull/19741
Signed-off-by: Hauke Mehrtens <hauke@hauke-m.de>
Use tabs to align and remove some unnecessary spaces.
Signed-off-by: Shiji Yang <yangshiji66@outlook.com>
Link: https://github.com/openwrt/openwrt/pull/19741
Signed-off-by: Hauke Mehrtens <hauke@hauke-m.de>
They were lost when ported to the 6.12 kernel.
Signed-off-by: Shiji Yang <yangshiji66@outlook.com>
Link: https://github.com/openwrt/openwrt/pull/19741
Signed-off-by: Hauke Mehrtens <hauke@hauke-m.de>
The Mediatek pinctrl driver can only accepts drive-strength values
enumerated in "dt-bindings/pinctrl/mt65xx.h".
Signed-off-by: Shiji Yang <yangshiji66@outlook.com>
Link: https://github.com/openwrt/openwrt/pull/19741
Signed-off-by: Hauke Mehrtens <hauke@hauke-m.de>
Add the missing "device_type" property to fix the memory node. The
Linux kernel can not get the memory size without it. Though u-boot
can automatically fixup the memory node by adding the "device_type"
and "reg" properties if the CONFIG_ARCH_FIXUP_FDT_MEMORY symbol is
enabled, it's better not to rely on this optional feature. This
patch also adds the reg address for the memory node name to follow
the naming rules.
Signed-off-by: Shiji Yang <yangshiji66@outlook.com>
Link: https://github.com/openwrt/openwrt/pull/19741
Signed-off-by: Hauke Mehrtens <hauke@hauke-m.de>
When testing LLDP and STP, we observed that locally generated multicast
packets (e.g. LLDP, STP) were not restricted to the designated output
port(s). For example, when transmitting on `lan1`, the same packet was also
forwarded to other ports such as `lan2`.
Steps to reproduce:
1. Configure lldpd to use `lan1` in UCI and restart the service
2. Connect devices to `lan1` and `lan2`
3. Observe that the device on `lan2` still receives LLDP packets
The issue was caused by an incorrect `FWD_TYPE` setting in the TX CPU TAG,
which failed to enforce the selected egress port(s).
Fix this by updating the TX CPU TAG to set `FWD_TYPE` correctly, ensuring
that locally generated packets are transmitted only on the intended
port(s).
Signed-off-by: Issam Hamdi <ih@simonwunderlich.de>
Link: https://github.com/openwrt/openwrt/pull/19802
Signed-off-by: Hauke Mehrtens <hauke@hauke-m.de>
Product name: Acer Predator Connect W6x
Product link: https://www.acer.com/us-en/predator/networking/wi-fi/predator-connect-w6x/pdp/FF.G2TTA.001
* Specifications:
SOC: MT7986AV
RAM: 1024MB
Flash: 256 MB SPI NAND
Ports: 4 LAN (1G) & 1 WAN (2.5G)
WIFI: MT7976GN + MT7976AN
LED: 1, ws2812b controller
* Installation via UART:
1. Configure TFTP server with IP 192.168.1.66. Copy `openwrt-mediatek-filogic-acer_predator-w6x-initramfs-kernel.bin` to TFTP root and rename to `predator.bin`
2. Interrupt boot by pressing 0 on startup or select `U-Boot Console` in U-Boot Boot Menu.
3. Run setenv `serverip 192.168.1.66; setenv ipaddr 192.168.1.1; tftpboot 0x46000000 predator.bin; fdt addr $(fdtcontroladdr); fdt rm /signature; bootm` in uboot console.
4. Wait for boot complete on Openwrt initramfs env.
** You can back up the MTD partitions at this point. Refer to Backup Instructions section.
5. On client PC, transfer `openwrt-mediatek-filogic-acer_predator-w6x-squashfs-sysupgrade.bin` to /tmp/ - `scp -O openwrt-mediatek-filogic-acer_predator-w6x-squashfs-sysupgrade.bin root@192.168.1.1:/tmp/sysupgrade.bin`
6. On router, run sysupgrade - `sysupgrade -n /tmp/sysupgrade.bin`
Should now boot to Openwrt. Ensure it boots automatically to Openwrt by replugging the power.
* Backup Instructions:
Layout from stock firmware:
```
[ 0.968731] Creating 10 MTD partitions on "nmbm_spim_nand":
[ 0.974297] 0x000000000000-0x000000100000 : "BL2"
[ 0.979424] 0x000000100000-0x000000180000 : "u-boot-env"
[ 0.985032] 0x000000180000-0x000000380000 : "Factory"
[ 0.990379] 0x000000380000-0x000000580000 : "FIP"
[ 0.995378] 0x000000580000-0x000000600000 : "prod"
[ 1.000461] 0x000000600000-0x000000700000 : "dual"
[ 1.005527] 0x000000700000-0x000000800000 : "pot"
[ 1.010516] 0x000000800000-0x000006c00000 : "ubi"
[ 1.015626] 0x000006c00000-0x00000d000000 : "ubi1"
[ 1.020801] 0x00000d000000-0x00000d800000 : "storage"
```
Mapping in initramfs env:
```
dev: size erasesize name
mtd0: 00100000 00020000 "bl2"
mtd1: 00080000 00020000 "u-boot-env"
mtd2: 00200000 00020000 "factory"
mtd3: 00200000 00020000 "fip"
mtd4: 00020000 00020000 "prod"
mtd5: 00100000 00020000 "dual"
mtd6: 00100000 00020000 "pot"
mtd7: 06400000 00020000 "ubi"
mtd8: 06400000 00020000 "ubi1"
mtd9: 00800000 00020000 "storage"
```
1. While in openwrt initramfs environment, back up all the partitions by running the following:
```
cat /dev/mtd0 > /tmp/bl2.bin
cat /dev/mtd1 > /tmp/u-boot-env.bin
cat /dev/mtd2 > /tmp/factgory.bin
cat /dev/mtd3 > /tmp/fip.bin
cat /dev/mtd4 > /tmp/prod.bin
cat /dev/mtd5 > /tmp/dual.bin
cat /dev/mtd6 > /tmp/pot.bin
cat /dev/mtd7 > /tmp/ubi.bin
cat /dev/mtd8 > /tmp/ubi1.bin
cat /dev/mtd9 > /tmp/storage.bin
```
2. Transfer files to client PC for safekeeping. On client PC, run `scp -O root@192.168.1.1:/tmp/*.bin ./`
* Restore to Stock Firmware:
1. Boot to openwrt initramfs env.
2. Confirm layout matches as follows by running `cat /proc/mtd`. Ensure dev `mtd7` is named `ubi`:
```
dev: size erasesize name
mtd0: 00100000 00020000 "bl2"
mtd1: 00080000 00020000 "u-boot-env"
mtd2: 00200000 00020000 "factory"
mtd3: 00200000 00020000 "fip"
mtd4: 00020000 00020000 "prod"
mtd5: 00100000 00020000 "dual"
mtd6: 00100000 00020000 "pot"
mtd7: 06400000 00020000 "ubi"
mtd8: 06400000 00020000 "ubi1"
mtd9: 00800000 00020000 "storage"
```
3. Detach `ubi` partition - `ubidetach -p /dev/mtd7`
4. Transfer stock firmware's `ubi.bin` to router from client PC: `scp -O ubi.bin root@192.168.1.1/tmp/`
5. Format and replace with backup `ubiformat /dev/mtd7 -y -f /tmp/ubi.bin`
6. Reboot and you should now be back on stock firmware.
* LEDS:
LED color can be controlled by specifying values in GRB format in `/sys/class/leds/rgb:status/multi_intensity`. Default is `255 255 255` (white).
Example: `echo '75 0 130' > /sys/class/leds/rgb:status/multi_intensity`
LED brightness can be changed by specifying the value from 0-255 in /sys/class/leds/rgb:status/brightness. Default is `255` (full brightness).
Example: `echo 100 > /sys/class/leds/rgb:status/brightness`
For persistence across reboots, put the relevant command(s) in /etc/rc.local.
* Notes:
root access on stock firmware:
Before flashing openwrt, and while in openwrt initramfs env:
1. Mount /dev/ubi0_2: `mkdir /tmp/ubi0_2; mount -t ubifs /dev/ubi0_2 /tmp/ubi0_2`
2. Modify `/tmp/ubi0_2/upper/etc/passwd` and change line with `root❌0:0...` to `root::0:0...`, remove the `x`.
3. Save and reboot.
4. You should now be able to log in with root and empty password while booted in stock firmware.
While on Openwrt, subsequent upgrades can be made by sysupgrade, or via Luci. UART should not be necessary unless you want to revert to stock firmeware.
Signed-off-by: Qing W <ses1er@gmail.com>
Link: https://github.com/openwrt/openwrt/pull/19754
Signed-off-by: Hauke Mehrtens <hauke@hauke-m.de>
XikeStor (Seeker) SKS8310-8X is a 8 ports Multi-Gig switch, based on
RTL9303.
Specifications:
- SoC : Realtek RTL9303
- RAM : DDR3 512 MiB
- Flash : SPI-NOR 32 MiB (Macronix)
- Ethernet : 8x 1/2.5/10 Gbps (SFP+)
- LEDs/Keys (GPIO) : 1x/1x
- UART : "Console" port on the front panel
- type : RS-232C
- connector : RJ-45
- settings : 115200 8N1
- Power : 12 VDC, 2 A
Flash instruction using initramfs image:
1. Prepare TFTP server & connect to serial port.
2. Connect your computer to one of the ports on SKS8310-8X with a
suitable SFP module (some work, some don't).
3. Power on SKS8310-8X and interrupt autoboot with Shift + A.
4. Use Shift + Q to drop from vendor CLI to U-Boot CLI.
5. Enable networking within U-Boot.
> rtk network on
6. Set switch IP and TFTP server IP (optional, adjust to your setup).
> setenv ipaddr <ip>
> setenv serverip <ip>
7. Download initramfs image from TFTP server.
> tftpboot 0x82000000 <image name>
8. Boot with the downloaded image.
> bootm 0x82000000
9. With rambooted OpenWrt, backup the stock firmware if needed.
10. Copy sysupgrade image to the device.
11. Perform sysupgrade with the sysupgrade image.
12. After reboot, you should have functional OpenWrt.
Reverting to stock firmware:
1. Download latest firmware from XikeStor and upload to your device.
1. Write firmware with 'sysupgrade -F'.
2. After reboot, stock firmware should boot automatically.
Co-authored-by: Jonas Jelonek <jelonek.jonas@gmail.com>
Signed-off-by: Alexandra Alth <alexandra@alth.de>
Signed-off-by: Jonas Jelonek <jelonek.jonas@gmail.com>
Link: https://github.com/openwrt/openwrt/pull/19782
Signed-off-by: Hauke Mehrtens <hauke@hauke-m.de>
This makes 5ghz WiFi work out of the box on these devices, eliminating
the need to flash a magic blob to the radio partition.
This was found by user BulldozerBSG on the OpenWRT Forums:
https://forum.openwrt.org/t/tp-link-archer-mr600-exploration/65489/20
All credit belongs to them. I can confirm the correctness of the
findings. At least one other user (Iggy87100) confirmed them too.
Signed-off-by: Stefan Dösinger <stefandoesinger@gmail.com>
Link: https://github.com/openwrt/openwrt/pull/19790
Signed-off-by: Hauke Mehrtens <hauke@hauke-m.de>
The 6.12 kernel has exceeded the kernel size limit. the buildbot
can no longer build images for them. Developers can try switching
the kernel type to zImage to enable them again.
Signed-off-by: Shiji Yang <yangshiji66@outlook.com>
Link: https://github.com/openwrt/openwrt/pull/19826
Signed-off-by: Robert Marko <robimarko@gmail.com>
This is an automatically generated commit which aids following Kernel patch
history, as git will see the move and copy as a rename thus defeating the
purpose.
For the original discussion see:
https://lists.openwrt.org/pipermail/openwrt-devel/2023-October/041673.html
Signed-off-by: Andre Heider <a.heider@gmail.com>
Whilst testing Hasivo s1100wp-8gt-se LED configuration, several error
messages were presented which didn't indicate which led_set they were
referencing, nor what the value was that caused the invalid configuration.
Migrate to use dev_ print messages for this function.
And tidy up both when the error message is reported (don't show it when
an led_set isn't in the DTS) and what details the message presents.
Signed-off-by: Bevan Weiss <bevan.weiss@gmail.com>
Link: https://github.com/openwrt/openwrt/pull/19791
Signed-off-by: Robert Marko <robimarko@gmail.com>
Add defines for RTL930x and RTL931x led_set 'modes' (to avoid magic numbers
in dts files).
Signed-off-by: Bevan Weiss <bevan.weiss@gmail.com>
Link: https://github.com/openwrt/openwrt/pull/19791
Signed-off-by: Robert Marko <robimarko@gmail.com>
Remove old kernel support to prepare for the next LTS release.
Signed-off-by: Shiji Yang <yangshiji66@outlook.com>
Link: https://github.com/openwrt/openwrt/pull/19821
Signed-off-by: Nick Hainke <vincent@systemli.org>
We have not received any negative feedback in the past three months.
It's time to switch the default kernel to 6.12.
Signed-off-by: Shiji Yang <yangshiji66@outlook.com>
Link: https://github.com/openwrt/openwrt/pull/19821
Signed-off-by: Nick Hainke <vincent@systemli.org>
All of this uses OF now. No need to keep platform data around.
Signed-off-by: Rosen Penev <rosenp@gmail.com>
Link: https://github.com/openwrt/openwrt/pull/19804
Signed-off-by: Robert Marko <robimarko@gmail.com>
This commit repeats the mdio function relocation from the other targets.
In short that means:
- phy read/write functions are moved away from the phy driver
- SerDes read/write functions are moved away from the dsa driver
- All gets consolidated into the mdio driver (inside the ethernet driver)
This is mostly a copy/paste to keep the changes small. The SerDes phy mapping
and the simplification of the central bus functions will come later.
Signed-off-by: Markus Stockhausen <markus.stockhausen@gmx.de>
Link: https://github.com/openwrt/openwrt/pull/19743
Signed-off-by: Robert Marko <robimarko@gmail.com>
The IPQ4019 datasheet indicates that the maximum supported SPI
frequency is 25 MHz. My experiment on SKSpruce WIA3300-20 shows
that exceeding this threshold can lead to instability of SPI
peripheral. Limit the SPI clock frequency to the QSDK recommended
value 24MHz to enhance stability.
Signed-off-by: Shiji Yang <yangshiji66@outlook.com>
Link: https://github.com/openwrt/openwrt/pull/19744
Signed-off-by: Robert Marko <robimarko@gmail.com>
The support is done. Let's set 6.12 as testing kernel.
Signed-off-by: Pawel Dembicki <paweldembicki@gmail.com>
Link: https://github.com/openwrt/openwrt/pull/19152
Signed-off-by: Hauke Mehrtens <hauke@hauke-m.de>
Support in mt76 has existed for quite a while. Use it.
Signed-off-by: Rosen Penev <rosenp@gmail.com>
Link: https://github.com/openwrt/openwrt/pull/19771
Signed-off-by: Hauke Mehrtens <hauke@hauke-m.de>
Now that the driver has been enhanced for RTL931x devices and
the DTS is up to date, activate the needed kernel configuration
for the two RTL931x subtargets.
Signed-off-by: Markus Stockhausen <markus.stockhausen@gmx.de>
Link: https://github.com/openwrt/openwrt/pull/19776
Signed-off-by: Hauke Mehrtens <hauke@hauke-m.de>
The RTL8231 auxiliary controller is not defined in the rtl931x.dtsi.
Additionally the pinmux is configured at the wrong address. Fix
this.
Signed-off-by: Markus Stockhausen <markus.stockhausen@gmx.de>
Link: https://github.com/openwrt/openwrt/pull/19776
Signed-off-by: Hauke Mehrtens <hauke@hauke-m.de>
The auxiliary RTL8231 controller driver is missing RTL931x support.
Add it by defining the proper register and matching compatible.
Signed-off-by: Markus Stockhausen <markus.stockhausen@gmx.de>
Link: https://github.com/openwrt/openwrt/pull/19776
Signed-off-by: Hauke Mehrtens <hauke@hauke-m.de>
The Realtek DTS's use several macros for convenient phy/port definition.
These are repeated for the RTL83xx targets and most are missing for the
RTL93xx targets. In the near future we want to add high port count
switches with 1GBit Ethernet for them too. As a preparation provide a
central include so the definition is only needed once and is available
for all targets.
Signed-off-by: Markus Stockhausen <markus.stockhausen@gmx.de>
Link: https://github.com/openwrt/openwrt/pull/19772
Signed-off-by: Hauke Mehrtens <hauke@hauke-m.de>
Since 6.12 is now default, drop 6.6 support.
Signed-off-by: Goetz Goerisch <ggoerisch@gmail.com>
Link: https://github.com/openwrt/openwrt/pull/19778
Signed-off-by: Nick Hainke <vincent@systemli.org>
Let's switch the ipq40xx target to use kernel 6.12 by default.
Signed-off-by: Goetz Goerisch <ggoerisch@gmail.com>
Link: https://github.com/openwrt/openwrt/pull/19778
Signed-off-by: Nick Hainke <vincent@systemli.org>
We are using upstream otto timer. Delete some downstream leftovers.
Signed-off-by: Markus Stockhausen <markus.stockhausen@gmx.de>
Link: https://github.com/openwrt/openwrt/pull/19769
Signed-off-by: Robert Marko <robimarko@gmail.com>
Drop our downstream driver in favor of an upstream existing driver which
is available starting from v6.13.
Signed-off-by: Jonas Jelonek <jelonek.jonas@gmail.com>
Link: https://github.com/openwrt/openwrt/pull/19736
Signed-off-by: Robert Marko <robimarko@gmail.com>
Adapt the device tree definitions of rtl93xx devices and the base dtsi
for rtl930x and rtl931x to match with what's expected by the recently
backported RTL9300 I2C driver.
Signed-off-by: Jonas Jelonek <jelonek.jonas@gmail.com>
Link: https://github.com/openwrt/openwrt/pull/19736
Signed-off-by: Robert Marko <robimarko@gmail.com>
