The patch/config sequences we took over from the SDK are partially
redundant, i.e. they share common parts which can be separated per
speed. For example, the config for 10GR contains the one for 2500Base-X
but we have a dedicated one for 2500Base-X. This is a first step to
modularize and reverse-engineer those sequences, and decrease the size
they claim.
The sequences are nearly exclusive ordered by ascending pages. This
suggests that those register/writes do not have a hidden function of
performing inline resets but rather are just configuration values.
Likely, they may be applied in rather arbitrary order. Splitting up the
sequences here assumes this is true and does some minor order changes.
Testing shows no behavioral change. Looking at [1] there are no relevant
reset or trigger bits affected by that. Suspiciously ordered writes have
mostly been kept though.
USXGMII setup needs to be adjusted too due to shared sequence parts.
[1] 82af3a36b7/sources/rtk-dms1250/include/hal/phy/rtl8295_reg_def.h
Signed-off-by: Jonas Jelonek <jelonek.jonas@gmail.com>
Link: https://github.com/openwrt/openwrt/pull/22582
Signed-off-by: Robert Marko <robimarko@gmail.com>
The patch/config sequences for USXGMII modes contain a register write
which is explicitly labelled as "enable eee". To clean the sequences and
reduce duplication, move this specific write to the USXGMII
configuration function.
While at it, demystify this register write. From [1] we can see that
only a single bit needs to be set for controlling EEE instead of the
whole register. From testing it was seen that the register has a default
value of 0x445C after reset. Thus, there is no other operation hidden in
this write and we're safe to reduce it to setting just the EEE enable
bit.
[1] 82af3a36b7/sources/rtk-dms1250/include/hal/phy/rtl8295_reg_def.h
Signed-off-by: Jonas Jelonek <jelonek.jonas@gmail.com>
Link: https://github.com/openwrt/openwrt/pull/22582
Signed-off-by: Robert Marko <robimarko@gmail.com>
USXGMII configuration is currently only performed via the patching
sequences although there's a dedicated function which configures several
parameters and assigns meaningful names to some register fields. It was
introduced in dca20f91ea ("realtek: add serdes patch for 10G_QXGMII")
but somewhat abandoned later due to a partial revert.
To improve the situation, prioritize usage of the function for USXGMII
variants and remove some parts from the patch sequences which seem to be
exclusive for USXGMII and thus can be covered by this function. Writes
to registers [0x6, 0xE], [0x6, 0x13] and [0x6, 0x14] can be dropped
completely because they are redundant. The bits really affected by
these writes (compared to the default register values aquired from a
dump) are overwritten below again. Testing on real hardware and USXGMII
supports this.
While at it, improve the style a bit and add comments explaining some of
the fields a bit more. Additionally, fix the call situation which
currently is dead code due to early exit. Provide two calls to the
mentioned functions but comment one of them to remain current
functionality. Names and meaning of fields is inferred from [1].
[1] 82af3a36b7/sources/rtk-dms1250/include/hal/phy/rtl8295_reg_def.h
Signed-off-by: Jonas Jelonek <jelonek.jonas@gmail.com>
Link: https://github.com/openwrt/openwrt/pull/22582
Signed-off-by: Robert Marko <robimarko@gmail.com>
Start deconstructing the patch/config sequences by carving out two
specific writes which are common for non-USXGMII and are special because
they are not in analog SerDes pages.
Signed-off-by: Jonas Jelonek <jelonek.jonas@gmail.com>
Link: https://github.com/openwrt/openwrt/pull/22582
Signed-off-by: Robert Marko <robimarko@gmail.com>
Handle QSGMII config earlier within the configuration function as a
preparation for subsequent patches in this area. Those will target
splitting up the config sequences and 5G-QSGMII is special there.
Signed-off-by: Jonas Jelonek <jelonek.jonas@gmail.com>
Link: https://github.com/openwrt/openwrt/pull/22582
Signed-off-by: Robert Marko <robimarko@gmail.com>
Rename the function that currently "applies patches" so that it covers
everything it does (and will do). It doesn't only apply patches but in
general performs configuration of a SerDes for a particular hardware
mode.
While at it, remove a print above that call because it is both placed
wrong and redundant due to what the generic pcs_config prints.
Signed-off-by: Jonas Jelonek <jelonek.jonas@gmail.com>
Link: https://github.com/openwrt/openwrt/pull/22582
Signed-off-by: Robert Marko <robimarko@gmail.com>
Change how patches are applied to reduce redundancy and make the code
more readable. Define a generic function that applies any patch. Within
the RTL930x patch application, define a local macro that helps to get
rid of repeated even/odd checks. While making the code cleaner, it is
also a preparation for further refactoring here.
This adds a local helper macro intended to be only temporary but keeps
the style of the code clean by avoiding a lot of if-else clauses.
Signed-off-by: Jonas Jelonek <jelonek.jonas@gmail.com>
Link: https://github.com/openwrt/openwrt/pull/22582
Signed-off-by: Robert Marko <robimarko@gmail.com>
Several devices (including the upcoming DGS-1250) need a fully
featured port definition that includes:
- port number
- label
- led-set
- pcs-handle
- phy-handle
- phy-mode
Provide a new macro for that and make the Zyxel XGS-1210 series
the first consumer of it.
Signed-off-by: Markus Stockhausen <markus.stockhausen@gmx.de>
Link: https://github.com/openwrt/openwrt/pull/22591
Signed-off-by: Robert Marko <robimarko@gmail.com>
In the blamed commit, the wrong partition name for ART was used.
It was later discovered that the partition table uses "0:ART" instead of
"art" for the ART partition name thus breaking caldata extraction.
So, fix the partition name.
Fixes: ee5999cf78 ("treewide: linksys: use nvmem MAC for hw_mac_addr")
Signed-off-by: Anthony Sepa <protectivedad@gmail.com>
Signed-off-by: Robert Marko <robimarko@gmail.com>
Allow to configure the LM75 alert pin to active-high instead
of its default active-low. This patch is needed for the D-Link
DGS-1250 series where the alert pin steers the fan speed
between low and high.
Signed-off-by: Markus Stockhausen <markus.stockhausen@gmx.de>
Link: https://github.com/openwrt/openwrt/pull/22589
Signed-off-by: Hauke Mehrtens <hauke@hauke-m.de>
When the link goes down on the other end of a bond, it was noticed that the
switch was still trying to send data over this link.
Problem here is that net_lag_port_dev_txable() uses
bond_is_active_slave_dev() to look the state up. But this is actually
showing if a link is a NOT a backup - not if the link should be really be
TX enabled or not.
As a DSA driver, it is important to consume the DSA information.
dp->lag_tx_enabled must therefore be used for DSA .port_lag_change events.
This variable contains two information from the
struct netdev_lag_lower_state_info:
tx_enabled = linfo->link_up && linfo->tx_enabled;
Fixes: 89322b4d69 ("rtl93xx: dsa: Handle lag_change properly")
Signed-off-by: Sven Eckelmann <se@simonwunderlich.de>
Link: https://github.com/openwrt/openwrt/pull/22382
Signed-off-by: Hauke Mehrtens <hauke@hauke-m.de>
TP-Link Deco M5 v1 and v2 models use a separate LP5521 controller to
control the LEDs on the device.
Signed-off-by: Bee Cadorna <r3usrlnd@gmail.com>
Tested-by: Tan Li Boon <undisputed.seraphim@gmail.com>
Link: https://github.com/openwrt/openwrt/pull/17537
Signed-off-by: Robert Marko <robimarko@gmail.com>
Specifications
--------------
- SoC : Qualcomm IPQ4019
- RAM : 256 MiB DDR3-1600 (NT5CC128M16IP)
- Flash : 32 MiB SPI NOR
- V1, V2 : GigaDevice GD25Q256C
- V3 : Winbond W25Q256FV, Micron N25Q128A11
- V320 : EON EN25QH256, XMC XM25QH256BK (with patch included)
- WLAN : IPQ4019 On-chip
- 2.4 GHz : 2x2 MIMO 802.11b/g/n
- 5 GHz : 2x2 MIMO 802.11n/ac
- Ethernet : QCA8072 10/100/1000BASE-T 1x WAN; 1x LAN
- UART : 3v3 115200n, use pins under heatsink
- Buttons : 1x Reset
- LEDs : 1x Combined RGB LED
- V1 : Driven by LP5521 channels (Channel 0, 1, 2?)
- V3, V320 : Driven by GPIO Pins (Pin 28, 32, 35 Active Low)
- Bluetooth :
- V1, V2, V3 : CSR8811
- V320 : AC6368A/B
- Power : DC 12V @ 1.2A
- FCC ID :
- V1 : TE7M5
- V3 : TE7M5V3
- V320 : TE7M5V32, 2AXJ4M5V3, 2BCGWM5V3
- TFTP ID :
- Client : 192.168.0.66
- Router : 192.168.0.11
MAC Addresses
-------------
Label : OPAQUE partition @ 0x0008
LAN : Label
WAN : Label + 1
WLAN 2G : Label + 2
WLAN 5G : Label + 3
Installation
------------
1. Install TFTP server software
2. Rename the factory image to 'M5v1_tp_recovery.bin' and copy it into
the TFTP folder
3. Connect an interface configured to 192.168.0.66/24 to the LAN port
- Note: The LAN port is the ethernet port that is furthest away from
the power plug
4. Press the 'reset' button down before powering up the device, holding
for at least 10 seconds
5. Router should download the factory image, install it, and then reboot
6. Router will start up with address 192.168.1.1
Known Issues
------------
- Some devices (including some V1 and V2 devices) may have flash chips
that are not detected, supported by, or have broken SFDP support
Signed-off-by: Bee Cadorna <r3usrlnd@gmail.com>
Link: https://github.com/openwrt/openwrt/pull/17537
Signed-off-by: Robert Marko <robimarko@gmail.com>
The RTL93xx based D-Link DGS-1250 series is currently being
prepared for OpenWrt support. These devices have some extras
that are not yet supported by the existing configuration.
Add the following items to the kernel configuration:
- CONFIG_SENSORS_GPIO_FAN: The devices have a simple gpio
controlled fan (0/1 aka off/on).
- CONFIG_I2C_GPIO_SHARED: The busses of the SFP+ slots are
not controlled by the built-in SOC I2C controller. Instead
they are realized by shared SCL bit banged GPIOs.
- CONFIG_EEPROM_AT24: The MAC address and other device data
is storend in an Atmel EEPROM.
Signed-off-by: Markus Stockhausen <markus.stockhausen@gmx.de>
Link: https://github.com/openwrt/openwrt/pull/22543
Signed-off-by: Robert Marko <robimarko@gmail.com>
The i2c-shared-gpio driver is designed to emulate up to four
i2c busses with distinct sda lines and a a shared scl line.
For some reason the check for the number of allowed busses
is one off and the driver can only allocate three busses.
Fix that.
Fixes: acd7ecc9ed ("realtek: add new i2c-gpio-shared driver")
Signed-off-by: Markus Stockhausen <markus.stockhausen@gmx.de>
Link: https://github.com/openwrt/openwrt/pull/22543
Signed-off-by: Robert Marko <robimarko@gmail.com>
Due to the last refactorings it has become clear that the following
code is wrong.
static void rteth_tx_timeout()
{
...
rteth_838x_hw_en_rxtx(ctrl);
A generic function must not call a device specific function directly.
Make hw_en_rxtx() a config member and call that instead of the
functions directly.
With this change another optimization can take place. hw_init()
currently calls device specific hw_en_rxtx() functions at the start
of the function. This is wrong. Initialize the hardware first before
activating the network rx/tx. Take out the multiple calls and place
the rx/tx setup just before the hw_init() call.
Signed-off-by: Markus Stockhausen <markus.stockhausen@gmx.de>
Link: https://github.com/openwrt/openwrt/pull/22421
Signed-off-by: Robert Marko <robimarko@gmail.com>
The RTL839x notify ring buffer setup is the last consumer
of family_id. Convert it to a device specific callback and
drop family_id from the configuration structure.
Signed-off-by: Markus Stockhausen <markus.stockhausen@gmx.de>
Link: https://github.com/openwrt/openwrt/pull/22421
Signed-off-by: Robert Marko <robimarko@gmail.com>
Split rteth_93xx_hw_en_rxtx() into two device specific
functions to avoid family_id checks.
Signed-off-by: Markus Stockhausen <markus.stockhausen@gmx.de>
Link: https://github.com/openwrt/openwrt/pull/22421
Signed-off-by: Robert Marko <robimarko@gmail.com>
RTL93xx sets up the ring counters twice. One location is
inside rteth_93xx_hw_en_rxtx() and the other one is inside
rteth_93xx_hw_reset(). There are slight differences (e.g.
the ring size that is set or how the counters are cleared).
It is currently unclear where to place it best. For now
align this to RTL83xx and remove the coding from function
rteth_93xx_hw_en_rxtx(). Provide a complete & proper setup
in rteth_93xx_hw_reset().
Looking at the different old implementations one can see
that one initialized the ring counters with offset "-2".
This headroom is not needed. The old comment " Some SoCs
have issues with missing underflow protection" was only
regarding the way the counters are being resetted and not
how large they are setup.
Signed-off-by: Markus Stockhausen <markus.stockhausen@gmx.de>
Link: https://github.com/openwrt/openwrt/pull/22421
Signed-off-by: Robert Marko <robimarko@gmail.com>
Remove another family check inside rteth_open() and split it
out into device specific hw_init() helper functions.
RTL93xx still use a common rteth_93xx_hw_en_rxtx() helper.
That will be split later.
Signed-off-by: Markus Stockhausen <markus.stockhausen@gmx.de>
Link: https://github.com/openwrt/openwrt/pull/22421
Signed-off-by: Robert Marko <robimarko@gmail.com>
The hw_en_rxtx() functions still use the old prefix. Rename
them to align with the rest of the code. This refactoring
makes clear that there is a bug in rteth_tx_timeout(). A
generic function should not call a device specific function
directly. The bug will be fixed separately.
Signed-off-by: Markus Stockhausen <markus.stockhausen@gmx.de>
Link: https://github.com/openwrt/openwrt/pull/22421
Signed-off-by: Robert Marko <robimarko@gmail.com>
The hw_stop() function uses multiple family checks to determine
what needs to be done. Split that into device specific helpers
to simplify the code.
For further simplification common parts of the stop functions
have been kept in rteth_hw_stop().
Signed-off-by: Markus Stockhausen <markus.stockhausen@gmx.de>
Link: https://github.com/openwrt/openwrt/pull/22421
Signed-off-by: Robert Marko <robimarko@gmail.com>
rtl838x_hw_stop() still uses the old prefix. Change it "rteth"
and make clear that this is a generic function for all targets.
Signed-off-by: Markus Stockhausen <markus.stockhausen@gmx.de>
Link: https://github.com/openwrt/openwrt/pull/22421
Signed-off-by: Robert Marko <robimarko@gmail.com>
The build system currently issues the following warnings.
../dts/rtl9303_xikestor_sks8300-8t.dts:57.4-17: Warning (reg_format):
/switchcore@1b000000/i2c@36c/i2c@0/temperature-sensor@48:reg: property
has invalid length (4 bytes) (#address-cells == 2, #size-cells == 1)
Fix that by providing proper cell data.
Fixes: c63433acd ("add support for XikeStor SKS8300-8T")
Signed-off-by: Markus Stockhausen <markus.stockhausen@gmx.de>
Link: https://github.com/openwrt/openwrt/pull/22593
Signed-off-by: Robert Marko <robimarko@gmail.com>
The build system currently issues the following warnings.
../dts/rtl9303_xikestor_sks8310-8x.dts:141.4-17: Warning (reg_format):
/switchcore@1b000000/i2c@36c/i2c@0/sensor@48:reg: property has invalid
length (4 bytes) (#address-cells == 2, #size-cells == 1)
Fix that by providing proper cell data.
Fixes: 4a73f72a2 ("add monitor IC node for XikeStor SKS8310-8X")
Signed-off-by: Markus Stockhausen <markus.stockhausen@gmx.de>
Link: https://github.com/openwrt/openwrt/pull/22593
Signed-off-by: Robert Marko <robimarko@gmail.com>
Fix execution of initramfs image on Huawei AP5030DN and AP6010DN by
increasing available memory for LZMA extraction by the loader.
The default leaves only ~23.6 MB between the decompression target
and the running loader code. Extracting images with built-in
packages lead to overwriting the loader code. This causes
the decompression to produce garbage output and hang.
Fix this by overwriting LZMA_TEXT_START to increase the
available memory for LZMA extraction to ~39.6 MB.
Signed-off-by: Marco von Rosenberg <marcovr@selfnet.de>
Link: https://github.com/openwrt/openwrt/pull/22581
Signed-off-by: Hauke Mehrtens <hauke@hauke-m.de>
The Xiaomi Redmi/Mi Router AC2100 does have the correct label mac on the WAN interface.
This MAC is available as gmac1.
Signed-off-by: Florian Maurer <f.maurer@outlook.de>
Link: https://github.com/openwrt/openwrt/pull/22567
Signed-off-by: Hauke Mehrtens <hauke@hauke-m.de>
The Netgear GS110TPP uses an RTL8214C to drive ports 9 and 10. The
DTS is missing the corresponding serdes assignment. From looking at
[1] it seems to be connected to pins 82-85 (serdes 2). Add that
definition. With that the last improper use of SWITCH_PORT() macro
is sorted out.
Remark: I do not own this device. The patch just resembles what
the picture [1] shows.
[1] https://svanheule.net/switches/_media/wiki/gs110tpp-top.jpg
Signed-off-by: Markus Stockhausen <markus.stockhausen@gmx.de>
Link: https://github.com/openwrt/openwrt/pull/22232
Signed-off-by: Robert Marko <robimarko@gmail.com>
Backport additional upstream patch in preparation for multi-serdes and
proper PCS support.
Automatically refresh all affected patch.
Signed-off-by: Christian Marangi <ansuelsmth@gmail.com>
LAN969x DTS was finally merged upstream, so lets backport the backported
DTS instead of keeping a local copy.
Signed-off-by: Robert Marko <robert.marko@sartura.hr>
Tactical 1000 has per per port RS0 and RS1 pins, however internally they
are tied together.
So, model them as RS0 at least.
Signed-off-by: Robert Marko <robert.marko@sartura.hr>
FIPS 140-3 recommends that all crypto implementations should be tested
before first use. Testmanager performs initial tests based on existing
test vectors. Not all algorithms have defined test vectors, so to improve
this situation, this commit backports recently added test vectors for
following cipher suites:
* authenc(hmac(md5),cbc(des))
* authenc(hmac(md5),cbc(aes))
* authenc(hmac(sha1),rfc3686(ctr(aes)))
* authenc(hmac(sha224),rfc3686(ctr(aes)))
* authenc(hmac(sha256),rfc3686(ctr(aes)))
* authenc(hmac(sha384),rfc3686(ctr(aes)))
* authenc(hmac(sha512),rfc3686(ctr(aes)))
These vectors were calculated using a software implementation and then
double-checked on Mediatek MT7981/MT7986 (safexcel) and NXP P2020 (talitos).
Both platforms passed self-tests.
Signed-off-by: Aleksander Jan Bajkowski <olek2@wp.pl>
Link: https://github.com/openwrt/openwrt/pull/22409
Signed-off-by: Hauke Mehrtens <hauke@hauke-m.de>
This patch adds support for the following AEAD ciphersuites:
- authenc(hmac(md5),cbc(aes))
- authenc(hmac(md5),cbc(des)))
- authenc(hmac(md5),cbc(des3_ede))
- authenc(hmac(md5),rfc3686(ctr(aes)))
These algorithms are used mainly for backward compatibility with some
older equipment. This is enhanced version of the patch found in the
mtk-openwrt-feeds repo.
All cipher suites were tested using test vectors on the MediaTek MT7981,
MT7986, and MT7988.
Signed-off-by: Aleksander Jan Bajkowski <olek2@wp.pl>
Link: https://github.com/openwrt/openwrt/pull/22410
Signed-off-by: Hauke Mehrtens <hauke@hauke-m.de>
When the fan control script was first implemented, a variable was wrongly
named. The fan probably never turns on - fix that.
Signed-off-by: Andreas Böhler <dev@aboehler.at>
Link: https://github.com/openwrt/openwrt/pull/22531
Signed-off-by: Robert Marko <robimarko@gmail.com>
Rename smi_bus_isc45 to smi_bus_is_c45 for better readability.
Upstream uses same naming convention.
Signed-off-by: Markus Stockhausen <markus.stockhausen@gmx.de>
Link: https://github.com/openwrt/openwrt/pull/22565
Signed-off-by: Robert Marko <robimarko@gmail.com>
Harden the mdio driver probing by checking for duplicate port
definitions. Now that the driver has a valid_port mask this
is just a simple bit check. This is the same as upstream does.
Signed-off-by: Markus Stockhausen <markus.stockhausen@gmx.de>
Link: https://github.com/openwrt/openwrt/pull/22565
Signed-off-by: Robert Marko <robimarko@gmail.com>
Until now the driver determines the validity of a phy (or port)
by checking "smi_bus[] < 0". That is somehow confusing. Align
with upstream and add a valid_port bitmask that can be used for
this check with common kernel bit operations.
Signed-off-by: Markus Stockhausen <markus.stockhausen@gmx.de>
Link: https://github.com/openwrt/openwrt/pull/22565
Signed-off-by: Robert Marko <robimarko@gmail.com>
The mdio driver has come a long way. The code is
quite stable now and whenever bugs are analyzed
one can look at the registers with devmem from
command line. Drop unneeded debugging information.
Signed-off-by: Markus Stockhausen <markus.stockhausen@gmx.de>
Link: https://github.com/openwrt/openwrt/pull/22565
Signed-off-by: Robert Marko <robimarko@gmail.com>
Adjust the memory remap range according to the mt7621 programming
guide to ensure that the driver can correctly access the peripheral
registers.
Signed-off-by: Shiji Yang <yangshiji66@outlook.com>
Link: https://github.com/openwrt/openwrt/pull/22467
Signed-off-by: Hauke Mehrtens <hauke@hauke-m.de>
The kernel load address was changed in commit e2d823d068 ("ramips:
fix LZMA decompression error for TP-Link EAP615-Wall"). We also need
to relocate the load address for initramfs image so that it can be
booted correctly.
Fixes: e2d823d068 ("ramips: fix LZMA decompression error for TP-Link EAP615-Wall")
Fixes: https://github.com/openwrt/openwrt/issues/22505
Signed-off-by: Shiji Yang <yangshiji66@outlook.com>
Link: https://github.com/openwrt/openwrt/pull/22562
Signed-off-by: Hauke Mehrtens <hauke@hauke-m.de>
lantiq_gswip and tag_gswip were not loaded during failsafe, leaving the
switch uninitialised. This caused LAN1 port to show no link, making
SSH-based recovery impossible.
Add the autoload flag and include tag_gswip (which was also missing from
the autoload list) so the switch initialises correctly in failsafe mode.
Tested on BT HomeHub 5A (lantiq/xrx200).
Fixes: https://github.com/openwrt/openwrt/issues/22480
Signed-off-by: Benjamin Levine <benjaminmileslevine@gmail.com>
Link: https://github.com/openwrt/openwrt/pull/22514
Signed-off-by: Hauke Mehrtens <hauke@hauke-m.de>
This commit backports 2 patches that add gpio controller support
to RTL9607C SoCs. It enables us to make use of anything that
can be controlled by GPIO on RTL9607C, like LEDs, buttons and such.
Signed-off-by: Rustam Adilov <adilov@tutamail.com>
Link: https://github.com/openwrt/openwrt/pull/22358
Signed-off-by: Robert Marko <robimarko@gmail.com>
Certain versions of the VF2 bootloader require the presence of a
vf2_uEnv.txt in the boot partition to properly load a non-SDK kernel.
Add this file during the SD-card generation.
Known VF2 bootloader versions exhibiting this behaviour are:
U-Boot 2021.10 (Mar 31 2025 - 22:49:46 +0800), Build: jenkins-github_visionfive2_6.12-11
Signed-off-by: Zoltan HERPAI <wigyori@uid0.hu>
