A SerDes can host multiple PCS links: QSGMII binds four ports to one
SerDes, USXGMII variants up to eight. Today pcs-handle references the
SerDes as a whole, with no way to express which link inside the SerDes
a port wants. The driver gets away with this because it carries its own
port->link bookkeeping and the link slot is implicit in DSA's port
iteration order -- functional, but the wiring information lives nowhere
in DT.
The upcoming fwnode_pcs migration moves PCS lookup to the generic
fwnode provider API, which disambiguates multiple instances per fwnode
via phandle cells. To make that landable as small, code-only commits,
the DT needs to carry the link index ahead of time.
Bump #pcs-cells from 0 to 1 on every SerDes node in the four SoC DTSIs
and append the link cell to every pcs-handle reference across boards
and the SWITCH_PORT_* macros. Cell values match the existing wiring:
0 for single-link SerDes (10GBase-R, SGMII, fiber, single-link
USXGMII), 0..3 per SerDes for QSGMII and USXGMII-QX, 0..7 for the
RTL9311 octal USXGMII layout.
No code reads the new cell yet -- of_parse_phandle_with_args() in the
PCS driver already cooperates with cells = 0 or 1, and the DSA glue
uses of_parse_phandle() which ignores cells entirely. The change is
runtime-neutral on its own; it exists so the follow-up code patches
can be a few lines each instead of dragging a bridge counter into the
driver to invent slot numbers DT could have provided directly.
Link: https://github.com/openwrt/openwrt/pull/23539
Signed-off-by: Jonas Jelonek <jelonek.jonas@gmail.com>
In most drivers upstream use "ethernet-ports" instead of "ports"
in dts. Especially the upstream rtl9300 mdio driver uses this to
lookup the port/phy mapping. Do the same downstream. There is no
need to adapt the dsa driver because it scans the dts via
for_each_node_by_name(dn, "port").
Signed-off-by: Markus Stockhausen <markus.stockhausen@gmx.de>
Link: https://github.com/openwrt/openwrt/pull/22149
Signed-off-by: Hauke Mehrtens <hauke@hauke-m.de>
Remove all pseudo-PHYs and phy-handle properties from DTS of RTL838X
devices. RTL838X SerDes is now handled by PCS driver and thus not
treated as PHY anymore.
Signed-off-by: Jonas Jelonek <jelonek.jonas@gmail.com>
Link: https://github.com/openwrt/openwrt/pull/20876
Signed-off-by: Hauke Mehrtens <hauke@hauke-m.de>
After having moved the configuration code and sequences from PHY and
DSA drivers to the PCS driver, add the hooks in PCS driver and remove
calls in PHY and DSA drivers to let PCS driver setup the SerDes
entirely on its own.
Also add pcs-handle to device tree definitions for most of the switch
ports because, due to the refactoring of the SerDes configuration, this
is needed now for all SerDes-attached ports.
Signed-off-by: Jonas Jelonek <jelonek.jonas@gmail.com>
Link: https://github.com/openwrt/openwrt/pull/20876
Signed-off-by: Hauke Mehrtens <hauke@hauke-m.de>
Now that MDIO and DSA driver only look for pcs-handle drop all
usages of the sds property.
Signed-off-by: Markus Stockhausen <markus.stockhausen@gmx.de>
Link: https://github.com/openwrt/openwrt/pull/20148
Signed-off-by: Robert Marko <robimarko@gmail.com>
For all switch ports where the assigned SerDes is known, add the new
pcs-handle to the dts. Leave the existing <sds> assignments to the
PHYs as is because the driver has not yet been updated.
Signed-off-by: Markus Stockhausen <markus.stockhausen@gmx.de>
Link: https://github.com/openwrt/openwrt/pull/20111
Signed-off-by: Robert Marko <robimarko@gmail.com>
The mdio controller got its own dts node with a dedicated bus node.
Until now it still searches the phy nodes in the ethernet node.
Change the driver so it searches the nodes at the right location.
For this to work move the phy nodes in all dts/dtsi over to the new
bus node. Use the following replacement rule:
Replace old full declaration
ðernet0 {
mdio-bus {
...
};
};
and old abbreviated declaration
&mdio {
...
};
simply with the new declaration
&mdio_bus0 {
...
};
Signed-off-by: Markus Stockhausen <markus.stockhausen@gmx.de>
Link: https://github.com/openwrt/openwrt/pull/19986
Signed-off-by: Hauke Mehrtens <hauke@hauke-m.de>
Use the new INTERNAL_PHY_SDS() helper to describe the SFP ports. With
this change the driver now knows that ports 24/26 are driven by serdes
4/5.
For the RTL838x devices this is currently only an additional information
for the mdio bus. It is not evaluated further because everything is
hardcoded.
REMARK! The original commit c829bc1f2c ("realtek: Add support for
Netgear S350 series switches GS308T and GS310TP") says that the SFP
ports are untested. Looking at device internal pictures from
https://techinfodepot.shoutwiki.com/wiki/Netgear_GS310TP there are no
external phys for the SFP ports. So fix port description.
Signed-off-by: Markus Stockhausen <markus.stockhausen@gmx.de>
Link: https://github.com/openwrt/openwrt/pull/18851
Signed-off-by: Robert Marko <robimarko@gmail.com>
Some devices have both the color/function and label property defined.
The label can be constructed from the former properties, making it
redundant.
Signed-off-by: Sander Vanheule <sander@svanheule.net>
By switching to the new RTL8231 driver in commit b7af54d5c1 ("realtek:
Simple conversions to RTL8231 MFD driver"), the bootloader state of the
RTL8231's pins is now maintained. As the bootloader de-asserts the PoE
enable signal, this means PoE output is no longer available.
Add a gpio-hog with high output, restoring the line value from when the
pin was configured (by default) as an input with a pull-up resistor.
This will hard-enable the PoE output, but the individual ports can still
be administratively disabled by realtek-poe or a similar tool.
Signed-off-by: Sander Vanheule <sander@svanheule.net>
There is no need to keep a version specific dts directory.
Rename the folder to its standard location.
Signed-off-by: Markus Stockhausen <markus.stockhausen@gmx.de>
This patch adds "dts-5.10" directory to use backported drivers.
There are several specification changes in the new drivers, so there
are some compatibility issues in using dts/dtsi files for 5.4.
The old DTS files are moved to "dts-5.4", so their corresponding
kernel version is obvious as well.
Signed-off-by: INAGAKI Hiroshi <musashino.open@gmail.com>
[change "dts" to "dts-5.4", adjust Makefile]
Signed-off-by: Adrian Schmutzler <freifunk@adrianschmutzler.de>
The Netgear GS308T v1 is an 8 port gigabit switch. The GS310TP v1 is an 8
port POE+ gigabit switch with 2 SFP Ports (currently untested).
The GS308T v1 and GS310TP v1 are quite similar to the Netgear GS1xx
devices already supported. Theses two devices use the same Netgear
firmware and are very similar to there corresponding GS1xx devices. For
this reason they share a large portion of the device tree with the GS108T
and GS110TP with exception of the uimage magic and model and compatible
values.
All of the above feature a dual firmware layout, referred to as Image0
and Image1 in the Netgear firmware.
In order to manipulate the PoE+ on the GS310TP v1 , one needs the
rtl83xx-poe package
Specifications (GS308T)
----------------------
* RTL8380M SoC, 1 MIPS 4KEc core @ 500MHz
* 128MB DDR3-1600 DRAM (Winbond W631GG8MB-12)
* 32MB 3v NOR SPI Flash (Winbond W25Q256JVFQ)
* RTL8231 GPIO extender to control the LEDs and the reset button
* 8 x 10/100/1000BASE-T ports, internal PHY (RTL8218B)
* UART (115200 8N1) via unpopulated standard 0.1" pin header marked J1
* Power is supplied via a 12V 1A barrel connector
Specifications (GS310TP)
----------------------
* RTL8380M SoC, 1 MIPS 4KEc core @ 500MHz
* Nuvoton M0516LDN for controlling PoE
* 128MB DDR3-1600 DRAM (Winbond W631GG8MB-12)
* 32MB 3v NOR SPI Flash (Winbond W25Q256JVFQ)
* RTL8231 GPIO extender to control the LEDs and the reset button
* 8 x 10/100/1000BASE-T PoE+ ports, 2 x Gigabit SFP ports,
internal PHY (RTL8218B)
* UART (115200 8N1) via unpopulated standard 0.1" pin header marked J1
* Power is supplied via a 54V 1.25A barrel connector
Both devices have UART pinout
-----------
J1 | [o]ooo
^ ||`------ GND
| |`------- RX [TX out of the serial adapter]
| `-------- TX [RX into the serial adapter]
`---------- Vcc (3V3) [the square pin]
The through holes are filled with PB-free solder which melts at 375C.
They can also be drilled using a 0.9mm bit.
Installation
------------
Instructions are identical to those for the similar Negear devices
and apply both to the GS308T v1 and GS310TP v1 as well.
-------------------
Boot initramfs image from U-Boot
--------------------------------
1. Press the Escape key at the `Hit Esc key to stop autoboot` prompt
2. Init network with `rtk network on` command
3. Load image with `tftpboot 0x8f000000
openwrt-realtek-generic-netgear_gs308t-v1-initramfs-kernel.bin` command
4. Boot the image with `bootm` command
The switch defaults to IP 192.168.1.1 and tries to fetch the image via
TFTP from 192.168.1.111.
Updating the installed firmware
-------------------------------
The OpenWRT ramdisk image can be flashed directly from the Netgear UI.
The Image0 slot should be used in order to enable sysupgrade.
As with similar switches, changing the active boot partition can be
accomplished in U-Boot as follows:
1. Press the Escape key at the `Hit Esc key to stop autoboot` prompt
2. Run `setsys bootpartition {0|1}` to select the boot partition
3. Run `savesys` followed by `boota` to proceed with the boot process
Signed-off-by: Raylynn Knight <rayknight@me.com>
