A SerDes can host multiple PCS links: QSGMII binds four ports to one
SerDes, USXGMII variants up to eight. Today pcs-handle references the
SerDes as a whole, with no way to express which link inside the SerDes
a port wants. The driver gets away with this because it carries its own
port->link bookkeeping and the link slot is implicit in DSA's port
iteration order -- functional, but the wiring information lives nowhere
in DT.
The upcoming fwnode_pcs migration moves PCS lookup to the generic
fwnode provider API, which disambiguates multiple instances per fwnode
via phandle cells. To make that landable as small, code-only commits,
the DT needs to carry the link index ahead of time.
Bump #pcs-cells from 0 to 1 on every SerDes node in the four SoC DTSIs
and append the link cell to every pcs-handle reference across boards
and the SWITCH_PORT_* macros. Cell values match the existing wiring:
0 for single-link SerDes (10GBase-R, SGMII, fiber, single-link
USXGMII), 0..3 per SerDes for QSGMII and USXGMII-QX, 0..7 for the
RTL9311 octal USXGMII layout.
No code reads the new cell yet -- of_parse_phandle_with_args() in the
PCS driver already cooperates with cells = 0 or 1, and the DSA glue
uses of_parse_phandle() which ignores cells entirely. The change is
runtime-neutral on its own; it exists so the follow-up code patches
can be a few lines each instead of dragging a bridge counter into the
driver to invent slot numbers DT could have provided directly.
Link: https://github.com/openwrt/openwrt/pull/23539
Signed-off-by: Jonas Jelonek <jelonek.jonas@gmail.com>
In most drivers upstream use "ethernet-ports" instead of "ports"
in dts. Especially the upstream rtl9300 mdio driver uses this to
lookup the port/phy mapping. Do the same downstream. There is no
need to adapt the dsa driver because it scans the dts via
for_each_node_by_name(dn, "port").
Signed-off-by: Markus Stockhausen <markus.stockhausen@gmx.de>
Link: https://github.com/openwrt/openwrt/pull/22149
Signed-off-by: Hauke Mehrtens <hauke@hauke-m.de>
Remove all pseudo-PHYs and phy-handle properties from DTS of RTL838X
devices. RTL838X SerDes is now handled by PCS driver and thus not
treated as PHY anymore.
Signed-off-by: Jonas Jelonek <jelonek.jonas@gmail.com>
Link: https://github.com/openwrt/openwrt/pull/20876
Signed-off-by: Hauke Mehrtens <hauke@hauke-m.de>
Align GS1900-10HP dts with other realtek devices to reduce the risk of device
specific regressions with the upcoming driver cleanup/rewrite.
Signed-off-by: Bjørn Mork <bjorn@mork.no>
Link: https://github.com/openwrt/openwrt/pull/20228
Signed-off-by: Robert Marko <robimarko@gmail.com>
Now that MDIO and DSA driver only look for pcs-handle drop all
usages of the sds property.
Signed-off-by: Markus Stockhausen <markus.stockhausen@gmx.de>
Link: https://github.com/openwrt/openwrt/pull/20148
Signed-off-by: Robert Marko <robimarko@gmail.com>
Zyxel labels their switch revisions A1, B1, ... and not v1, v2, ...
Rename the devices as such in OpenWrt to match the labels. Of note:
the first (A1) revision is never labeled as such on the label, just
in the web UI. Provide compatibles for seamless sysupgrade.
For a recent overview of Zyxel GS1900 series revisions, see the
table linked in https://forum.openwrt.org/t//57875/3874.
Signed-off-by: Stijn Segers <foss@volatilesystems.org>
Link: https://github.com/openwrt/openwrt/pull/20118
Signed-off-by: Robert Marko <robimarko@gmail.com>
