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Commit Graph

12 Commits

Author SHA1 Message Date
Jonas Jelonek
43562f97e7
realtek: dts: add link index cell to pcs-handle phandles
A SerDes can host multiple PCS links: QSGMII binds four ports to one
SerDes, USXGMII variants up to eight. Today pcs-handle references the
SerDes as a whole, with no way to express which link inside the SerDes
a port wants. The driver gets away with this because it carries its own
port->link bookkeeping and the link slot is implicit in DSA's port
iteration order -- functional, but the wiring information lives nowhere
in DT.

The upcoming fwnode_pcs migration moves PCS lookup to the generic
fwnode provider API, which disambiguates multiple instances per fwnode
via phandle cells. To make that landable as small, code-only commits,
the DT needs to carry the link index ahead of time.

Bump #pcs-cells from 0 to 1 on every SerDes node in the four SoC DTSIs
and append the link cell to every pcs-handle reference across boards
and the SWITCH_PORT_* macros. Cell values match the existing wiring:
0 for single-link SerDes (10GBase-R, SGMII, fiber, single-link
USXGMII), 0..3 per SerDes for QSGMII and USXGMII-QX, 0..7 for the
RTL9311 octal USXGMII layout.

No code reads the new cell yet -- of_parse_phandle_with_args() in the
PCS driver already cooperates with cells = 0 or 1, and the DSA glue
uses of_parse_phandle() which ignores cells entirely. The change is
runtime-neutral on its own; it exists so the follow-up code patches
can be a few lines each instead of dragging a bridge counter into the
driver to invent slot numbers DT could have provided directly.

Link: https://github.com/openwrt/openwrt/pull/23539
Signed-off-by: Jonas Jelonek <jelonek.jonas@gmail.com>
2026-05-31 12:52:40 +02:00
Jonas Jelonek
322f8e6771 realtek: dts: rtl93xx: use PHY_* macros for Zyxel XGS1X10/1250
Replace the verbose ethernet-phy node definitions with the PHY_C45 and
PHY_C45_PAIR_ORDER macros to drop boilerplate.

Signed-off-by: Jonas Jelonek <jelonek.jonas@gmail.com>
Link: https://github.com/openwrt/openwrt/pull/23118
Signed-off-by: Hauke Mehrtens <hauke@hauke-m.de>
2026-05-01 12:41:49 +02:00
Jonas Jelonek
0136c48bd5 realtek: dts: rtl93xx: replace LED magic values with macros
Replace the raw bitmask values for led_set entries with the
RTL93XX_LED_SET_* macros from macros.dtsi to make the LED configuration
self-explanatory.

Signed-off-by: Jonas Jelonek <jelonek.jonas@gmail.com>
Link: https://github.com/openwrt/openwrt/pull/23118
Signed-off-by: Hauke Mehrtens <hauke@hauke-m.de>
2026-05-01 12:41:49 +02:00
Jonas Jelonek
858dfdd832 realtek: dts: rtl93xx: use SWITCH_PORT_SFP for ports
Make use of the SWITCH_PORT_SFP macro to simplify and make the DTS of
several devices cleaner.

Signed-off-by: Jonas Jelonek <jelonek.jonas@gmail.com>
Link: https://github.com/openwrt/openwrt/pull/23118
Signed-off-by: Hauke Mehrtens <hauke@hauke-m.de>
2026-05-01 12:41:49 +02:00
Mieczyslaw Nalewaj
3e42e349d4
treewide: strip trailing whitespace
Strip trailing whitespace in all code:
find . -type f | grep "\.c$" | xargs sed -i 's/[ \t]\+$//'
find . -type f | grep "\.h$" | xargs sed -i 's/[ \t]\+$//'
find . -type f | grep "\.dts$" | xargs sed -i 's/[ \t]\+$//'
find . -type f | grep "\.dtsi$" | xargs sed -i 's/[ \t]\+$//'

Signed-off-by: Mieczyslaw Nalewaj <namiltd@yahoo.com>
Link: https://github.com/openwrt/openwrt/pull/22840
Signed-off-by: Christian Marangi <ansuelsmth@gmail.com>
2026-04-08 10:05:53 +02:00
Jonas Jelonek
cfe573350b realtek: dts: use SWITCH_PORT_LED for XGS1250-12
Switch the common DTS for Zyxel XGS1250-12 variants to the recently
added SWITCH_PORT_LED macro to reduce boilerplate and make the DTS
cleaner. As a side effect, this also assign labels to the port nodes so
they can be referenced by the variant-specific device tree sources.

Signed-off-by: Jonas Jelonek <jelonek.jonas@gmail.com>
Link: https://github.com/openwrt/openwrt/pull/22690
Signed-off-by: Robert Marko <robimarko@gmail.com>
2026-03-31 12:54:57 +02:00
Markus Stockhausen
c1804cbc71 realtek: dts: cleanup of ethernet link speed
Realtek switches have a very simple network adapter for the SOC.
They can ship packets via DMA without further offloading features.
Even on the RTL931x devices they can barely reach 50MB/s. In the
dts there is a mix of 1G/10G definitions. To be consistent and
better reflect the performance set the link speed to 1000.
This is only cosmetic.

Signed-off-by: Markus Stockhausen <markus.stockhausen@gmx.de>
Link: https://github.com/openwrt/openwrt/pull/22639
Signed-off-by: Hauke Mehrtens <hauke@hauke-m.de>
2026-03-30 15:00:31 +02:00
Markus Stockhausen
63729a8d6e realtek: dts: replace ports by ethernet-ports
In most drivers upstream use "ethernet-ports" instead of "ports"
in dts. Especially the upstream rtl9300 mdio driver uses this to
lookup the port/phy mapping. Do the same downstream. There is no
need to adapt the dsa driver because it scans the dts via
for_each_node_by_name(dn, "port").

Signed-off-by: Markus Stockhausen <markus.stockhausen@gmx.de>
Link: https://github.com/openwrt/openwrt/pull/22149
Signed-off-by: Hauke Mehrtens <hauke@hauke-m.de>
2026-03-01 14:19:36 +01:00
Markus Stockhausen
7e39a2d485 realtek: mdio: derive phy smi-bus from parent node
The dts for RTL93xx devices has duplicate data about the
smi bus of a phy node. The parent node declares the number
of the bus and the realtek,smi-address attribute does the
same.

Remove the bus part from the realtek,smi-address attribute
and lookup the bus from the parent node. While we are here
remove all realtek,smi-address attributes where phy id
matches the bus address. The driver will use that as a
fallback.

Signed-off-by: Markus Stockhausen <markus.stockhausen@gmx.de>
Link: https://github.com/openwrt/openwrt/pull/21438
Signed-off-by: Hauke Mehrtens <hauke@hauke-m.de>
2026-01-21 23:32:54 +01:00
Markus Stockhausen
7bfa1fa83b realtek: rename smi-address dts property
The rtl9300,smi-address property was first developed for the RTL930x
targets. So it got a device specific prefix. Nowadays it is used for
RTL931x targets too. Convert it to our gerneric realtek prefix.

find ./realtek -type f -exec sed -i 's/rtl9300,smi-address/realtek,smi-address/g' {} +

Signed-off-by: Markus Stockhausen <markus.stockhausen@gmx.de>
Link: https://github.com/openwrt/openwrt/pull/21343
Signed-off-by: Robert Marko <robimarko@gmail.com>
2026-01-02 18:05:02 +01:00
Jonas Jelonek
623180a422 realtek: rtl93xx: remove pseudo-PHYs and phy-handle from SFP ports
RTL93XX reached the point where the SerDes' are no longer treated as
regular PHYs. Instead, they are managed by the dedicated PCS driver.
Thus, all device tree definitions should follow this change.

Remove the pseudo-PHYs for the SerDes (so far usually defined with macro
INTERNAL_PHY) and corresponding 'phy-handle's from all SFP ports. This
removes a long-lasting confusion from our Realtek driver(s).

Signed-off-by: Jonas Jelonek <jelonek.jonas@gmail.com>
Link: https://github.com/openwrt/openwrt/pull/20577
Signed-off-by: Robert Marko <robimarko@gmail.com>
2025-11-02 16:32:10 +01:00
Thomas Martitz
133c91823c realtek: rtl930x: add XGS1250-12 B1 device
The A1 and B1 devices are largely the same. The differences
seem to be:
- RTL8218D (A1) vs RTL8218E (B1) PHY for the eight 1 Gbps TP ports
- Aquantia (A1) vs RTL8261N (B1) PHY for the three 10 Gbps TP ports

RTL8218D/E share the same driver and support was added already by
commit c8c187f0f0 ("realtek: add support for RTL8218E").

The RTL8261N is also already supported but it's located at
different addresses compared to the A1 device. This requires
the device tree to be split. As a result, the devices are require
different images.

I found the smi addresses on the forum:
https://forum.openwrt.org/t/support-for-rtl838x-based-managed-switches/57875/3622
And I can conform on my B1 device that this is working.

Co-developed-by: Mathias Kresin <dev@kresin.me>
Signed-off-by: Thomas Martitz <thomas.martitz@mailbox.org>
Link: https://github.com/openwrt/openwrt/pull/20150
Signed-off-by: Hauke Mehrtens <hauke@hauke-m.de>
2025-10-07 00:25:02 +02:00