A SerDes can host multiple PCS links: QSGMII binds four ports to one
SerDes, USXGMII variants up to eight. Today pcs-handle references the
SerDes as a whole, with no way to express which link inside the SerDes
a port wants. The driver gets away with this because it carries its own
port->link bookkeeping and the link slot is implicit in DSA's port
iteration order -- functional, but the wiring information lives nowhere
in DT.
The upcoming fwnode_pcs migration moves PCS lookup to the generic
fwnode provider API, which disambiguates multiple instances per fwnode
via phandle cells. To make that landable as small, code-only commits,
the DT needs to carry the link index ahead of time.
Bump #pcs-cells from 0 to 1 on every SerDes node in the four SoC DTSIs
and append the link cell to every pcs-handle reference across boards
and the SWITCH_PORT_* macros. Cell values match the existing wiring:
0 for single-link SerDes (10GBase-R, SGMII, fiber, single-link
USXGMII), 0..3 per SerDes for QSGMII and USXGMII-QX, 0..7 for the
RTL9311 octal USXGMII layout.
No code reads the new cell yet -- of_parse_phandle_with_args() in the
PCS driver already cooperates with cells = 0 or 1, and the DSA glue
uses of_parse_phandle() which ignores cells entirely. The change is
runtime-neutral on its own; it exists so the follow-up code patches
can be a few lines each instead of dragging a bridge counter into the
driver to invent slot numbers DT could have provided directly.
Link: https://github.com/openwrt/openwrt/pull/23539
Signed-off-by: Jonas Jelonek <jelonek.jonas@gmail.com>
Replace the verbose ethernet-phy node definitions with the PHY_C45 and
PHY_C45_PAIR_ORDER macros to drop boilerplate.
Signed-off-by: Jonas Jelonek <jelonek.jonas@gmail.com>
Link: https://github.com/openwrt/openwrt/pull/23118
Signed-off-by: Hauke Mehrtens <hauke@hauke-m.de>
Replace the raw bitmask values for led_set entries with the
RTL93XX_LED_SET_* macros from macros.dtsi to make the LED configuration
self-explanatory.
Signed-off-by: Jonas Jelonek <jelonek.jonas@gmail.com>
Link: https://github.com/openwrt/openwrt/pull/23118
Signed-off-by: Hauke Mehrtens <hauke@hauke-m.de>
Make use of the SWITCH_PORT_SFP macro to simplify and make the DTS of
several devices cleaner.
Signed-off-by: Jonas Jelonek <jelonek.jonas@gmail.com>
Link: https://github.com/openwrt/openwrt/pull/23118
Signed-off-by: Hauke Mehrtens <hauke@hauke-m.de>
Realtek switches have a very simple network adapter for the SOC.
They can ship packets via DMA without further offloading features.
Even on the RTL931x devices they can barely reach 50MB/s. In the
dts there is a mix of 1G/10G definitions. To be consistent and
better reflect the performance set the link speed to 1000.
This is only cosmetic.
Signed-off-by: Markus Stockhausen <markus.stockhausen@gmx.de>
Link: https://github.com/openwrt/openwrt/pull/22639
Signed-off-by: Hauke Mehrtens <hauke@hauke-m.de>
Commit d52f7a4ca5 ("realtek: dts: new SWITCH_PORT_LED() macro") introduced
a new macro to simplify switch port definitions and introduces usage of
it for Zyxel XGS1X10-12 devices. However, this change added a DTS syntax
issue because:
> SWITCH_PORT_LED(...);
produces
> port@XX { ... };;
because the macro already includes a trailing semicolon. The DT compiler
doesn't like this so it fails with syntax error. Fix this by dropping the
trailing semicolons after macro usages.
Fixes: d52f7a4ca5 ("realtek: dts: new SWITCH_PORT_LED() macro")
Signed-off-by: Jonas Jelonek <jelonek.jonas@gmail.com>
Link: https://github.com/openwrt/openwrt/pull/22614
Signed-off-by: Robert Marko <robimarko@gmail.com>
Several devices (including the upcoming DGS-1250) need a fully
featured port definition that includes:
- port number
- label
- led-set
- pcs-handle
- phy-handle
- phy-mode
Provide a new macro for that and make the Zyxel XGS-1210 series
the first consumer of it.
Signed-off-by: Markus Stockhausen <markus.stockhausen@gmx.de>
Link: https://github.com/openwrt/openwrt/pull/22591
Signed-off-by: Robert Marko <robimarko@gmail.com>
The Zyxel XGS1x10 DTS overzealously tries to avoid redundancies. For
this the phy24/phy25 definitions were split into a common and a device
specific part. Understanding how these phys are defined is therefore
a little bit tricky. Add a little bit of redundancy to make the
definitions easier to read and understand in a single location.
Signed-off-by: Markus Stockhausen <markus.stockhausen@gmx.de>
Link: https://github.com/openwrt/openwrt/pull/22236
Signed-off-by: Robert Marko <robert.marko@sartura.hr>
In most drivers upstream use "ethernet-ports" instead of "ports"
in dts. Especially the upstream rtl9300 mdio driver uses this to
lookup the port/phy mapping. Do the same downstream. There is no
need to adapt the dsa driver because it scans the dts via
for_each_node_by_name(dn, "port").
Signed-off-by: Markus Stockhausen <markus.stockhausen@gmx.de>
Link: https://github.com/openwrt/openwrt/pull/22149
Signed-off-by: Hauke Mehrtens <hauke@hauke-m.de>
The dts for RTL93xx devices has duplicate data about the
smi bus of a phy node. The parent node declares the number
of the bus and the realtek,smi-address attribute does the
same.
Remove the bus part from the realtek,smi-address attribute
and lookup the bus from the parent node. While we are here
remove all realtek,smi-address attributes where phy id
matches the bus address. The driver will use that as a
fallback.
Signed-off-by: Markus Stockhausen <markus.stockhausen@gmx.de>
Link: https://github.com/openwrt/openwrt/pull/21438
Signed-off-by: Hauke Mehrtens <hauke@hauke-m.de>
Switch the mdio bus topology for devices that have their phys
attached to bus 1-3. This does not have any impact because
the mdio driver was completly redisgned
With this commit the bus id is stored twice. Once in the (new)
bus and in the (old) realtek,smi-address property. E.g.
&mdio_bus1 {
reg = <1>; <<< bus id
phy24: ethernet-phy@24 {
reg = <26>;
compatible = "ethernet-phy-ieee802.3-c22";
realtek,smi-address = <1 2>; <<< bus & address id
};
};
This redundancy will be removed later.
Signed-off-by: Markus Stockhausen <markus.stockhausen@gmx.de>
Link: https://github.com/openwrt/openwrt/pull/21438
Signed-off-by: Hauke Mehrtens <hauke@hauke-m.de>
SGMII only works correctly on this device if inband auto-negotiation is
enabled. Configure the PHY for SGMII and in-band mode in the device tree
to make this happen.
For 2.5G link speeds the PHY will still switch to 2500Base-X without AN.
The same configuration also works on RTL8226, so it is fine to apply
this change to the A1 revision of XGS1010-12/XGS1210-12 as well.
Signed-off-by: Jan Hoffmann <jan@3e8.eu>
Link: https://github.com/openwrt/openwrt/pull/21605
Signed-off-by: Robert Marko <robimarko@gmail.com>
The rtl9300,smi-address property was first developed for the RTL930x
targets. So it got a device specific prefix. Nowadays it is used for
RTL931x targets too. Convert it to our gerneric realtek prefix.
find ./realtek -type f -exec sed -i 's/rtl9300,smi-address/realtek,smi-address/g' {} +
Signed-off-by: Markus Stockhausen <markus.stockhausen@gmx.de>
Link: https://github.com/openwrt/openwrt/pull/21343
Signed-off-by: Robert Marko <robimarko@gmail.com>
This is a preparation for adding support for XGS1010-12, which is almost
identical to XGS1210-12, with some small differences (partition layout,
missing reset key).
In addition to moving the common parts to a new file, also simplify the
definition of the 2.5G PHYs to reduce duplication. With this change, the
revision-specific files only have to specify the SMI addresses.
Signed-off-by: Jan Hoffmann <jan@3e8.eu>
Link: https://github.com/openwrt/openwrt/pull/20469
Signed-off-by: Robert Marko <robimarko@gmail.com>
