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openwrt/target/linux/realtek/dts/rtl8393_hpe_1920.dtsi
Jonas Jelonek 43562f97e7
realtek: dts: add link index cell to pcs-handle phandles 
A SerDes can host multiple PCS links: QSGMII binds four ports to one
SerDes, USXGMII variants up to eight. Today pcs-handle references the
SerDes as a whole, with no way to express which link inside the SerDes
a port wants. The driver gets away with this because it carries its own
port->link bookkeeping and the link slot is implicit in DSA's port
iteration order -- functional, but the wiring information lives nowhere
in DT.

The upcoming fwnode_pcs migration moves PCS lookup to the generic
fwnode provider API, which disambiguates multiple instances per fwnode
via phandle cells. To make that landable as small, code-only commits,
the DT needs to carry the link index ahead of time.

Bump #pcs-cells from 0 to 1 on every SerDes node in the four SoC DTSIs
and append the link cell to every pcs-handle reference across boards
and the SWITCH_PORT_* macros. Cell values match the existing wiring:
0 for single-link SerDes (10GBase-R, SGMII, fiber, single-link
USXGMII), 0..3 per SerDes for QSGMII and USXGMII-QX, 0..7 for the
RTL9311 octal USXGMII layout.

No code reads the new cell yet -- of_parse_phandle_with_args() in the
PCS driver already cooperates with cells = 0 or 1, and the DSA glue
uses of_parse_phandle() which ignores cells entirely. The change is
runtime-neutral on its own; it exists so the follow-up code patches
can be a few lines each instead of dragging a bridge counter into the
driver to invent slot numbers DT could have provided directly.

Link: https://github.com/openwrt/openwrt/pull/23539
Signed-off-by: Jonas Jelonek <jelonek.jonas@gmail.com>
2026-05-31 12:52:40 +02:00

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// SPDX-License-Identifier: GPL-2.0-or-later OR MIT
#include "rtl839x.dtsi"
#include "rtl83xx_hpe_1920.dtsi"
#include <dt-bindings/leds/common.h>
/ {
aliases {
led-boot = &led_power;
led-failsafe = &led_power;
led-running = &led_power;
led-upgrade = &led_power;
};
leds {
compatible = "gpio-leds";
led_power: led-0 {
color = <LED_COLOR_ID_GREEN>;
function = LED_FUNCTION_POWER;
gpios = <&gpio0 9 GPIO_ACTIVE_HIGH>;
};
};
};
&mdio_bus0 {
PHY_C22(0, 0)
PHY_C22(1, 1)
PHY_C22(2, 2)
PHY_C22(3, 3)
PHY_C22(4, 4)
PHY_C22(5, 5)
PHY_C22(6, 6)
PHY_C22(7, 7)
PHY_C22(8, 8)
PHY_C22(9, 9)
PHY_C22(10, 10)
PHY_C22(11, 11)
PHY_C22(12, 12)
PHY_C22(13, 13)
PHY_C22(14, 14)
PHY_C22(15, 15)
PHY_C22(16, 16)
PHY_C22(17, 17)
PHY_C22(18, 18)
PHY_C22(19, 19)
PHY_C22(20, 20)
PHY_C22(21, 21)
PHY_C22(22, 22)
PHY_C22(23, 23)
};
&mdio_bus1 {
PHY_C22(24, 0)
PHY_C22(25, 1)
PHY_C22(26, 2)
PHY_C22(27, 3)
PHY_C22(28, 4)
PHY_C22(29, 5)
PHY_C22(30, 6)
PHY_C22(31, 7)
PHY_C22(32, 8)
PHY_C22(33, 9)
PHY_C22(34, 10)
PHY_C22(35, 11)
PHY_C22(36, 12)
PHY_C22(37, 13)
PHY_C22(38, 14)
PHY_C22(39, 15)
PHY_C22(40, 16)
PHY_C22(41, 17)
PHY_C22(42, 18)
PHY_C22(43, 19)
PHY_C22(44, 20)
PHY_C22(45, 21)
PHY_C22(46, 22)
PHY_C22(47, 23)
};
&switch0 {
ethernet-ports {
#address-cells = <1>;
#size-cells = <0>;
SWITCH_PORT_SDS(0, 1, 0, 0, qsgmii)
SWITCH_PORT_SDS(1, 2, 0, 1, qsgmii)
SWITCH_PORT_SDS(2, 3, 0, 2, qsgmii)
SWITCH_PORT_SDS(3, 4, 0, 3, qsgmii)
SWITCH_PORT_SDS(4, 5, 1, 0, qsgmii)
SWITCH_PORT_SDS(5, 6, 1, 1, qsgmii)
SWITCH_PORT_SDS(6, 7, 1, 2, qsgmii)
SWITCH_PORT_SDS(7, 8, 1, 3, qsgmii)
SWITCH_PORT_SDS(8, 9, 2, 0, qsgmii)
SWITCH_PORT_SDS(9, 10, 2, 1, qsgmii)
SWITCH_PORT_SDS(10, 11, 2, 2, qsgmii)
SWITCH_PORT_SDS(11, 12, 2, 3, qsgmii)
SWITCH_PORT_SDS(12, 13, 3, 0, qsgmii)
SWITCH_PORT_SDS(13, 14, 3, 1, qsgmii)
SWITCH_PORT_SDS(14, 15, 3, 2, qsgmii)
SWITCH_PORT_SDS(15, 16, 3, 3, qsgmii)
SWITCH_PORT_SDS(16, 17, 4, 0, qsgmii)
SWITCH_PORT_SDS(17, 18, 4, 1, qsgmii)
SWITCH_PORT_SDS(18, 19, 4, 2, qsgmii)
SWITCH_PORT_SDS(19, 20, 4, 3, qsgmii)
SWITCH_PORT_SDS(20, 21, 5, 0, qsgmii)
SWITCH_PORT_SDS(21, 22, 5, 1, qsgmii)
SWITCH_PORT_SDS(22, 23, 5, 2, qsgmii)
SWITCH_PORT_SDS(23, 24, 5, 3, qsgmii)
SWITCH_PORT_SDS(24, 25, 6, 0, qsgmii)
SWITCH_PORT_SDS(25, 26, 6, 1, qsgmii)
SWITCH_PORT_SDS(26, 27, 6, 2, qsgmii)
SWITCH_PORT_SDS(27, 28, 6, 3, qsgmii)
SWITCH_PORT_SDS(28, 29, 7, 0, qsgmii)
SWITCH_PORT_SDS(29, 30, 7, 1, qsgmii)
SWITCH_PORT_SDS(30, 31, 7, 2, qsgmii)
SWITCH_PORT_SDS(31, 32, 7, 3, qsgmii)
SWITCH_PORT_SDS(32, 33, 8, 0, qsgmii)
SWITCH_PORT_SDS(33, 34, 8, 1, qsgmii)
SWITCH_PORT_SDS(34, 35, 8, 2, qsgmii)
SWITCH_PORT_SDS(35, 36, 8, 3, qsgmii)
SWITCH_PORT_SDS(36, 37, 9, 0, qsgmii)
SWITCH_PORT_SDS(37, 38, 9, 1, qsgmii)
SWITCH_PORT_SDS(38, 39, 9, 2, qsgmii)
SWITCH_PORT_SDS(39, 40, 9, 3, qsgmii)
SWITCH_PORT_SDS(40, 41, 10, 0, qsgmii)
SWITCH_PORT_SDS(41, 42, 10, 1, qsgmii)
SWITCH_PORT_SDS(42, 43, 10, 2, qsgmii)
SWITCH_PORT_SDS(43, 44, 10, 3, qsgmii)
SWITCH_PORT_SDS(44, 45, 11, 0, qsgmii)
SWITCH_PORT_SDS(45, 46, 11, 1, qsgmii)
SWITCH_PORT_SDS(46, 47, 11, 2, qsgmii)
SWITCH_PORT_SDS(47, 48, 11, 3, qsgmii)
port@52 {
ethernet = <&ethernet0>;
reg = <52>;
phy-mode = "internal";
fixed-link {
speed = <1000>;
full-duplex;
};
};
};
};
&port0 {
nvmem-cells = <&macaddr_factory 2>;
nvmem-cell-names = "mac-address";
};
&port1 {
nvmem-cells = <&macaddr_factory 3>;
nvmem-cell-names = "mac-address";
};
&port2 {
nvmem-cells = <&macaddr_factory 4>;
nvmem-cell-names = "mac-address";
};
&port3 {
nvmem-cells = <&macaddr_factory 5>;
nvmem-cell-names = "mac-address";
};
&port4 {
nvmem-cells = <&macaddr_factory 6>;
nvmem-cell-names = "mac-address";
};
&port5 {
nvmem-cells = <&macaddr_factory 7>;
nvmem-cell-names = "mac-address";
};
&port6 {
nvmem-cells = <&macaddr_factory 8>;
nvmem-cell-names = "mac-address";
};
&port7 {
nvmem-cells = <&macaddr_factory 9>;
nvmem-cell-names = "mac-address";
};
&port8 {
nvmem-cells = <&macaddr_factory 10>;
nvmem-cell-names = "mac-address";
};
&port9 {
nvmem-cells = <&macaddr_factory 11>;
nvmem-cell-names = "mac-address";
};
&port10 {
nvmem-cells = <&macaddr_factory 12>;
nvmem-cell-names = "mac-address";
};
&port11 {
nvmem-cells = <&macaddr_factory 13>;
nvmem-cell-names = "mac-address";
};
&port12 {
nvmem-cells = <&macaddr_factory 14>;
nvmem-cell-names = "mac-address";
};
&port13 {
nvmem-cells = <&macaddr_factory 15>;
nvmem-cell-names = "mac-address";
};
&port14 {
nvmem-cells = <&macaddr_factory 16>;
nvmem-cell-names = "mac-address";
};
&port15 {
nvmem-cells = <&macaddr_factory 17>;
nvmem-cell-names = "mac-address";
};
&port16 {
nvmem-cells = <&macaddr_factory 18>;
nvmem-cell-names = "mac-address";
};
&port17 {
nvmem-cells = <&macaddr_factory 19>;
nvmem-cell-names = "mac-address";
};
&port18 {
nvmem-cells = <&macaddr_factory 20>;
nvmem-cell-names = "mac-address";
};
&port19 {
nvmem-cells = <&macaddr_factory 21>;
nvmem-cell-names = "mac-address";
};
&port20 {
nvmem-cells = <&macaddr_factory 22>;
nvmem-cell-names = "mac-address";
};
&port21 {
nvmem-cells = <&macaddr_factory 23>;
nvmem-cell-names = "mac-address";
};
&port22 {
nvmem-cells = <&macaddr_factory 24>;
nvmem-cell-names = "mac-address";
};
&port23 {
nvmem-cells = <&macaddr_factory 25>;
nvmem-cell-names = "mac-address";
};
&port24 {
nvmem-cells = <&macaddr_factory 26>;
nvmem-cell-names = "mac-address";
};
&port25 {
nvmem-cells = <&macaddr_factory 27>;
nvmem-cell-names = "mac-address";
};
&port26 {
nvmem-cells = <&macaddr_factory 28>;
nvmem-cell-names = "mac-address";
};
&port27 {
nvmem-cells = <&macaddr_factory 29>;
nvmem-cell-names = "mac-address";
};
&port28 {
nvmem-cells = <&macaddr_factory 30>;
nvmem-cell-names = "mac-address";
};
&port29 {
nvmem-cells = <&macaddr_factory 31>;
nvmem-cell-names = "mac-address";
};
&port30 {
nvmem-cells = <&macaddr_factory 32>;
nvmem-cell-names = "mac-address";
};
&port31 {
nvmem-cells = <&macaddr_factory 33>;
nvmem-cell-names = "mac-address";
};
&port32 {
nvmem-cells = <&macaddr_factory 34>;
nvmem-cell-names = "mac-address";
};
&port33 {
nvmem-cells = <&macaddr_factory 35>;
nvmem-cell-names = "mac-address";
};
&port34 {
nvmem-cells = <&macaddr_factory 36>;
nvmem-cell-names = "mac-address";
};
&port35 {
nvmem-cells = <&macaddr_factory 37>;
nvmem-cell-names = "mac-address";
};
&port36 {
nvmem-cells = <&macaddr_factory 38>;
nvmem-cell-names = "mac-address";
};
&port37 {
nvmem-cells = <&macaddr_factory 39>;
nvmem-cell-names = "mac-address";
};
&port38 {
nvmem-cells = <&macaddr_factory 40>;
nvmem-cell-names = "mac-address";
};
&port39 {
nvmem-cells = <&macaddr_factory 41>;
nvmem-cell-names = "mac-address";
};
&port40 {
nvmem-cells = <&macaddr_factory 42>;
nvmem-cell-names = "mac-address";
};
&port41 {
nvmem-cells = <&macaddr_factory 43>;
nvmem-cell-names = "mac-address";
};
&port42 {
nvmem-cells = <&macaddr_factory 44>;
nvmem-cell-names = "mac-address";
};
&port43 {
nvmem-cells = <&macaddr_factory 45>;
nvmem-cell-names = "mac-address";
};
&port44 {
nvmem-cells = <&macaddr_factory 46>;
nvmem-cell-names = "mac-address";
};
&port45 {
nvmem-cells = <&macaddr_factory 47>;
nvmem-cell-names = "mac-address";
};
&port46 {
nvmem-cells = <&macaddr_factory 48>;
nvmem-cell-names = "mac-address";
};
&port47 {
nvmem-cells = <&macaddr_factory 49>;
nvmem-cell-names = "mac-address";
};
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