Certain versions of the VF2 bootloader require the presence of a
vf2_uEnv.txt in the boot partition to properly load a non-SDK kernel.
Add this file during the SD-card generation.
Known VF2 bootloader versions exhibiting this behaviour are:
U-Boot 2021.10 (Mar 31 2025 - 22:49:46 +0800), Build: jenkins-github_visionfive2_6.12-11
Signed-off-by: Zoltan HERPAI <wigyori@uid0.hu>
The VF2 boards store their ubootenv on /dev/mtd1 which is a SPI flash
partition. Add support for reading this partition in uboot-envtools,
and add the package into the VF2 image.
Signed-off-by: Zoltan HERPAI <wigyori@uid0.hu>
Upstream 2b81db8a7f4475e141a8ffd7cc745ed9f15962df introduced several new
symbols. This commit adds them and also applies alphabetical order via
./scripts/kconfig.pl target/linux/generic/config-6.12
Signed-off-by: John Audia <therealgraysky@proton.me>
Link: https://github.com/openwrt/openwrt/pull/22276
Signed-off-by: Robert Marko <robimarko@gmail.com>
Release previously allocated memory and OF node before return.
Signed-off-by: Shiji Yang <yangshiji66@outlook.com>
Link: https://github.com/openwrt/openwrt/pull/22276
Signed-off-by: Robert Marko <robimarko@gmail.com>
RTL93xx devices can no longer find the switch node in the DTS.
Commit 4c92254 ("relocate/retype switch node") refactored the
switch node definition to better align with upstream. Sadly
the redefinition for RTL93xx devices failed.
- RTL83xx: use "switch0: ethernet-switch"
- RTL93xx: use "switch0: switch@1b000000"
Follow up commit 8b969f7 ("drop realtek,smi-address property)
changed the dts lookup sequence for mdio initialization. On
RTL93xx devices it cannot find the switchnode via
of_get_child_by_name(dev->of_node->parent, "ethernet-switch")
Fix the switch node type for RTL93xx
Fixes: 8b969f7 ("drop realtek,smi-address property)
Signed-off-by: Markus Stockhausen <markus.stockhausen@gmx.de>
Link: https://github.com/openwrt/openwrt/pull/22557
Signed-off-by: Robert Marko <robimarko@gmail.com>
During RX calibration we use a vth_min value of 0 while the SDK always
uses a value of 1 [1]. While we do not know right now which effect this
really has, sync this to the SDK. In worst case we might have an
insufficient calibration result at the moment which usually might be
fine.
[1] 82af3a36b7/sources/rtk-dms1250/src/dal/longan/dal_longan_sds.c (L173)
Suggested-by: Bevan Weiss <bevan.weiss@gmail.com>
Signed-off-by: Jonas Jelonek <jelonek.jonas@gmail.com>
Link: https://github.com/openwrt/openwrt/pull/22450
Signed-off-by: Robert Marko <robimarko@gmail.com>
The order within the FGCAL code is not optimal. Right now, there's
output printed even in successful cases (which doesn't really help) and
a value is read although it isn't used if the run succeeds. To fix both,
move that below the success loop exit so it's just printed in
non-success case where the information might be helpful.
Suggested-by: Bevan Weiss <bevan.weiss@gmail.com>
Signed-off-by: Jonas Jelonek <jelonek.jonas@gmail.com>
Link: https://github.com/openwrt/openwrt/pull/22450
Signed-off-by: Robert Marko <robimarko@gmail.com>
Simplify some register writes being different for even and odd SerDes by
removing if-else and use ternary operator instead. This makes code
shorter and more readable.
Signed-off-by: Jonas Jelonek <jelonek.jonas@gmail.com>
Link: https://github.com/openwrt/openwrt/pull/22450
Signed-off-by: Robert Marko <robimarko@gmail.com>
Comparing our calibration check with the one in the SDK ([1]), one can
see some discrepancies for which there are no apparent reasons. SGMII
and 1000Base-X are handled equal to XSGMII although they aren't in the
SDK and have different symbol error registers. USXGMII and 10GBase-R are
fine, but other modes are explicitly handled with failure then.
Restructure this by keeping XSGMII alone with its dedicated check (as
the SDK does) and handle all other modes differently. Though the SDK
just skips symbol error check for modes like SGMII, 1000Base-X,
2500Base-X, it was found to be ok to perform a simple check for them
too. Since we have also a default case in the symbol error read
implementation now, we can cover all other modes with default case here
too. As a side-effect, this removes the confusing and probably wrong
failure stating calibration has failed although just the checks were
insufficient.
Signed-off-by: Jonas Jelonek <jelonek.jonas@gmail.com>
Link: https://github.com/openwrt/openwrt/pull/22450
Signed-off-by: Robert Marko <robimarko@gmail.com>
Our implementation waiting for RX idle signal of a 10G SerDes deviates
from what the SDK does. While we timeout after 100 reads and thus cannot
really control the real time, the SDK times out after 10ms. Adjust that
accordingly by switching the timeout to ktime_* functions with a 10ms
timeout as per the SDK.
While at it, improve the overall style of the function a bit.
Suggested-by: Markus Stockhausen <markus.stockhausen@gmx.de>
Signed-off-by: Jonas Jelonek <jelonek.jonas@gmail.com>
Link: https://github.com/openwrt/openwrt/pull/22450
Signed-off-by: Robert Marko <robimarko@gmail.com>
Fix the symbol error read implementation to be usable for other modes
too. While we handle other modes as 'not supported', the SDK has a
generic read used in the 'default' case. Do the same so we can have
proper 2500Base-X support here and avoid confusing error messages.
Signed-off-by: Jonas Jelonek <jelonek.jonas@gmail.com>
Link: https://github.com/openwrt/openwrt/pull/22450
Signed-off-by: Robert Marko <robimarko@gmail.com>
Instead of performing a dedicated register read we can rely on the mode
that is passed via a parameter to the function. The code flow ensures
that this is the same value in this place.
Signed-off-by: Jonas Jelonek <jelonek.jonas@gmail.com>
Link: https://github.com/openwrt/openwrt/pull/22450
Signed-off-by: Robert Marko <robimarko@gmail.com>
Part of the calibration procedure contains some weird and harebrained
piece of code where a specific register write is guarded by a check for
the SerDes mode, otherwise an error is printed. But right after this
if-else block, the exact same write is applied anyway. Remove this
brain-dead piece of code with something meaningful, i.e. reference code
from the SDK [1]. Over there, more writes are applied and a proper check
is in place.
While at it, add some another comment to the code. While it is
honourable to have code developed by someone quite some time ago that
works, it's discouraged to just have code without any explanation
especially if it differs from the SDK.
Signed-off-by: Jonas Jelonek <jelonek.jonas@gmail.com>
Link: https://github.com/openwrt/openwrt/pull/22450
Signed-off-by: Robert Marko <robimarko@gmail.com>
Calibration for RTL930x uses multiple iterations for several checks.
While this is fine and needed, it shouldn't be allowed to run forever in
trust that at some point there will always be a "valid" value causing a
loop exit. This has occured a couple of times, causing the driver to
loop forever in case something doesn't run as expected.
To avoid this (and in general as a good practice) limit the affected
loop to a rough estimate of 10 iterations instead of running possibly
forever. The estimate is based on the fact that under normal conditions
it usually takes 1 or 2 to iterations to succeed, more is likely never
to succeed but 10 gives some reasonable headroom.
Signed-off-by: Jonas Jelonek <jelonek.jonas@gmail.com>
Link: https://github.com/openwrt/openwrt/pull/22450
Signed-off-by: Robert Marko <robimarko@gmail.com>
Cleanup some comments in the code by reducing them to the essential and
putting them behind a line in favor of above. Also simplify some output
prints for the same purpose.
Signed-off-by: Jonas Jelonek <jelonek.jonas@gmail.com>
Link: https://github.com/openwrt/openwrt/pull/22450
Signed-off-by: Robert Marko <robimarko@gmail.com>
Every devices of mpc85xx was switched to DSA.
Swconfig can be removed.
Signed-off-by: Pawel Dembicki <paweldembicki@gmail.com>
Link: https://github.com/openwrt/openwrt/pull/22161
Signed-off-by: Robert Marko <robimarko@gmail.com>
Convert the P2020RDB DTS to DSA for the VSC7385 switch, add port
labels and fixed-link. Update board network defaults, preinit iface,
and compat version, and include the DSA switch kmod in the image.
Signed-off-by: Pawel Dembicki <paweldembicki@gmail.com>
Link: https://github.com/openwrt/openwrt/pull/22161
Signed-off-by: Robert Marko <robimarko@gmail.com>
A phy node in the dts has two properties:
- reg: the (overall) address of the phy
- realtek,smi-address: the address of the phy on its bus
This notation does not align with upstream. reg should be the address
of the phy on its bus. But where to get the overall address that is
needed for register writes to the hardware?
Luckily the mdio driver and the hardware design sync the ports and
phys (overall) addresses. Thus derive missing data from the dts port
nodes (below ethernet-ports). To realize this
- carve out the port mapping into a separate function to align with
the upstream driver.
- do more sanity checks and catch more inconsistencies
- raise more/better errors via dev_err_probe()
With this commit all dts files must be rewritten as follows:
- if phy has no realtek,smi-address leave it as is
- if phy has realtek,smi-address, write that value into the reg
property and drop realtek,smi-address.
Remark: This commit might bring some confusion about the phyXX and
phy@YY and <reg=YY> naming convention. To be somehow consistent with
the current port/phy identifiers from now on the dts will have:
- phyXX: where XX matches the port number
- phy@YY: where YY is the phy address on the mdio bus
- <reg=YY>: where YY is the phy address on the mdio bus
Signed-off-by: Markus Stockhausen <markus.stockhausen@gmx.de>
Link: https://github.com/openwrt/openwrt/pull/22236
Signed-off-by: Robert Marko <robert.marko@sartura.hr>
The switch node is currently located outside of the switchcore@1b000000
tree. This makes it hard to find when referencing from other nodes in
this tree. Make it a subnode of switchcore and "retype" it to
ethernet-switch like upstream does.
This is not perfectly aligned as upstream just mixes the switchcore and
the ethernet-switch node into one. But this will be future work for
downstream.
Signed-off-by: Markus Stockhausen <markus.stockhausen@gmx.de>
Link: https://github.com/openwrt/openwrt/pull/22236
Signed-off-by: Robert Marko <robert.marko@sartura.hr>
The Zyxel XGS1x10 DTS overzealously tries to avoid redundancies. For
this the phy24/phy25 definitions were split into a common and a device
specific part. Understanding how these phys are defined is therefore
a little bit tricky. Add a little bit of redundancy to make the
definitions easier to read and understand in a single location.
Signed-off-by: Markus Stockhausen <markus.stockhausen@gmx.de>
Link: https://github.com/openwrt/openwrt/pull/22236
Signed-off-by: Robert Marko <robert.marko@sartura.hr>
NN6000v1 Specifications:
SoC: Qualcomm IPQ6000 1.2GHz
RAM: K4B4G1646E-BCMA 512MiB x2 = 1 GiB
Flash: FORESEE 256GB eMMC
ETH: QCA8075 (2x LAN, 1x WAN)
WLAN1: QCN5022 2.4GHz AX 2x2
WLAN2: QCN5052 5GHz AX 2x2
Power: DC 12V
Button: Reset, Wps
USB: 1x 3.0
NN6000v2 Specifications:
SoC: Qualcomm IPQ6000 1.2GHz
RAM: MT41K512M16VRN-107 IT:P 1GiB x2 = 2 GiB
Flash: FORESEE 256GB eMMC
ETH: QCA8075 (4x LAN, 1x WAN)
WLAN1: QCN5022 2.4GHz AX 2x2
WLAN2: QCN5052 5GHz AX 2x2
Power: DC 12V
Button: Reset, Wps
USB: 1x 3.0
Install via UART:
1. Download the initramfs image, rename it to
initramfs.itb, host it with the tftp server.
2. Interrupt U-Boot and run these commands:
tftpboot initramfs.itb
bootm
3. After openwrt boots up, use scp or luci web
to upload sysupgrade.bin to upgrade.
Install via Uboot WebUI:
- Only work when you flash a custom uboot with webui
- Push the reset button for 5 seconds, then use broswer to
access http://192.168.1.1/, then upload factory.bin.
Signed-off-by: Fire Chen <firedevel@icloud.com>
Link: https://github.com/openwrt/openwrt/pull/21787
Signed-off-by: Robert Marko <robert.marko@sartura.hr>
NVMEM on MMC was added in dts but the corresponding option was not added
to the config.
Fixes: ee5999c ("treewide: linksys: use nvmem MAC for hw_mac_addr")
Signed-off-by: Rosen Penev <rosenp@gmail.com>
Link: https://github.com/openwrt/openwrt/pull/22539
Signed-off-by: Robert Marko <robert.marko@sartura.hr>
The issue described in the patch has been fixed by commit
604355e8c4 ("kernel: fix fraglist GRO on linux 6.12")
Signed-off-by: Shiji Yang <yangshiji66@outlook.com>
Link: https://github.com/openwrt/openwrt/pull/22525
Signed-off-by: Robert Marko <robert.marko@sartura.hr>
The initial mt76x8 kernel config file was inherited from mt7620
sub-target. However, This SoC series doesn't support any external
PHY. We can disable CONFIG_ICPLUS_PHY symbol to reduce kernel size.
Signed-off-by: Shiji Yang <yangshiji66@outlook.com>
Link: https://github.com/openwrt/openwrt/pull/22519
Signed-off-by: Robert Marko <robimarko@gmail.com>
Backport more upstream patch to include all the fixes pushed upstream and
add all the preliminary patch for multi-serdes support.
While at it also move 2 patch in the 6xx numbering to the 000-1xx backport
numbering to keep things tidy.
All the affected patch manually and automatically refreshed.
Signed-off-by: Lorenzo Bianconi <lorenzo@kernel.org>
[ add comment, renumber patch, add more patch, fix PCS patch ]
Link: https://github.com/openwrt/openwrt/pull/22479
Signed-off-by: Christian Marangi <ansuelsmth@gmail.com>
Backport new field_prep()/get() particularly useful to handle case where a
bitmask is not const and FIELD_PREP can't be used. This permit to replace
manual shift with these macro. (also needed to permit backport of some
patch without modification)
Backport reworked patch that drop the local field_prep()/get() macro in
favor of the global one.
Link: https://github.com/openwrt/openwrt/pull/22479
Signed-off-by: Christian Marangi <ansuelsmth@gmail.com>
Renumber ASoC and PCS patch to 2xx and 3xx numbering to leave space for
more backport patch in the 000-1xx numbering.
Link: https://github.com/openwrt/openwrt/pull/22479
Signed-off-by: Christian Marangi <ansuelsmth@gmail.com>
These targets seems to be left over, so changed as other targets
covered by commit d35d92a .
Signed-off-by: Edward Chow <equu@openmail.cc>
Link: https://github.com/openwrt/openwrt/pull/22510
Signed-off-by: Robert Marko <robimarko@gmail.com>
This commit adds support for RTL9607C/RTL8198D clocks to the existing
clk-rtl83xx driver. Setting clock rates is not supported due to
lack of knowledge on this topic at the moment. Clocks for CPU1, SRAM
and SPI can also be calculated but not included in this commit.
Since the registers, calculations are widely different to RTL83XX it
was decide to have different clk_ops for RTL960X.
The code was partly based on naseef's work with some changes to
integrate it into the clk-rtl83xx driver.
Tested-by: Ahmed Naseef <naseefkm@gmail.com>
Signed-off-by: Rustam Adilov <adilov@tutamail.com>
Link: https://github.com/openwrt/openwrt/pull/22080
Signed-off-by: Robert Marko <robimarko@gmail.com>
Currently, devices having two cpu ports to the switch managed by swconfig,
especally those with qca955x, line tplink archer c7 v2 and linksys ea4500 v3,
use vlan on different cpu port to separate networks by default. (e.g. eth1.1
for lan, eth0.2 for wan)
However, untagging to these vlans cpu ports, and limiting vlans in the switch
on these devices could effectively offload the expense to process vlan tag from
cpu to the switch, and increase the throughput of lan <-> wan ipoe routing.
Tested on my tplink tl-wdr4900 v2, where ucidef_add_switch "switch0"
"0u@eth1" "2:lan" "3:lan" "4:lan" "5:lan" "6u@eth0" "1:wan" finally generates
on /etc/config/network:
config device
option name 'br-lan'
option type 'bridge'
list ports 'eth1'
config interface 'lan'
option device 'br-lan'
option proto 'static'
list ipaddr '192.168.1.1/24'
option ip6assign '60'
config interface 'wan'
option device 'eth0'
option proto 'dhcp'
config interface 'wan6'
option device 'eth0'
option proto 'dhcpv6'
config switch
option name 'switch0'
option reset '1'
option enable_vlan '1'
config switch_vlan
option device 'switch0'
option vlan '1'
option ports '2 3 4 5 0'
config switch_vlan
option device 'switch0'
option vlan '2'
option ports '1 6'
and the throughput of lan <-> wan ipoe routing with software flow offload
increases from around
[850 Mbps](https://openwrt.org/toh/tp-link/archer-c5-c7-wdr7500#nat_performance)
to 900 Mbps.
Signed-off-by: Edward Chow <equu@openmail.cc>
Link: https://github.com/openwrt/openwrt/pull/19444
Signed-off-by: Robert Marko <robimarko@gmail.com>
These devices use the binding + eeprom-swap. Turns out the reason swap
is needed is because the binding wrongly swaps the data on big endian
hosts. NVMEM doesn't do this and thus just works.
Signed-off-by: Rosen Penev <rosenp@gmail.com>
Link: https://github.com/openwrt/openwrt/pull/22207
Signed-off-by: Robert Marko <robimarko@gmail.com>
A size of 600 is incomplete in that calibration data is not included,
resulting in low TX power.
Fixes: 64dae105 ("ramips: mt76x8: add support for Yuncore CPE200")
Signed-off-by: Rosen Penev <rosenp@gmail.com>
Link: https://github.com/openwrt/openwrt/pull/22459
Signed-off-by: Robert Marko <robimarko@gmail.com>
The dtsi used handles a bunch of non-DBDC platforms where the
assignments are correct. The 3040-a1 is different as there are 3 instead
of 2 wifi interfaces and WAN needs to be incremented by 1.
Remove userspace wifi assignmwent which was needed before per band nvmem
was supported.
Signed-off-by: Rosen Penev <rosenp@gmail.com>
Link: https://github.com/openwrt/openwrt/pull/21977
Signed-off-by: Robert Marko <robimarko@gmail.com>
While rebasing, a typo was made where the ';;' terminator was omitted in
the 02_network script. Add it to restore script functionality.
Fixes: e210d994fa ("airoha: an7581: add Nokia Valyrian support")
Signed-off-by: Christian Marangi <ansuelsmth@gmail.com>
- Update network port names based on the shell
- Fix boot log errors:
OF: /soc/pcie@11280000/pcie@0,0: Missing device_type
- Match vendor firmware Ethernet and wireless MAC addresses
LAN MAC 50:xx:xx:xx:xx:60
WAN MAC 50:xx:xx:xx:xx:61
2G MAC 50:xx:xx:xx:xx:63
5G MAC 50:xx:xx:xx:xx:65
Fixes: 7d79346581 ("mediatek: filogic: add support for Tenda BE12 Pro")
Signed-off-by: Chukun Pan <amadeus@jmu.edu.cn>
Link: https://github.com/openwrt/openwrt/pull/22060
Signed-off-by: Chuanhong Guo <gch981213@gmail.com>
Add support for Nokia Valyrian based on Airoha AN7581 SoC.
Device specification
--------------------
SoC Type: Airoha AN7581
RAM: 2x DDR4 Nanya NT5AD256M16E4-JR (1GB)
Flash: eMMC Macronix MX52LM08A11XVW (1GB)
Ethernet: 3x gigabit via AN7581, 1x 10g via AS21x1x, 1x SFP cage
Wi-Fi: MT7996 - BE19000
LEDs: 11 LED via 2x 74HC595 shift register
Button: Reset, WPS, WiFi
USB ports: 1x 2.0
Miscellaneous: 1x Power Monitor via RTQ6059, 2x FXS port
Device is unfused and is originally flashed with Airoha SDK bootloader
that require signed images.
Bootloader is username/password protected and use the leaked auth combo
that can be found online.
From the bootloadet instruction on how to flash custom bootloader are:
1. mmc erase 0 0x800
2. tftpboot 192.168.1.10:airoha/an7581/openwrt-airoha-an7581-nokia_valyrian-preloader.bin
3. mmc write $loadaddr 0x4 0xfc
4. tftpboot 192.168.1.10:airoha/an7581/openwrt-airoha-an7581-nokia_valyrian-bl31-uboot.fip
5. mmc write $loadaddr 0x100 0x700
It's also possible to use the Emergency Recovery procedure:
From powered OFF device:
1. Keep the reset button pressed (middle button)
2. Power on the device
3. Notice the "Press x" prompt
4. Press x
5. Notice the "C" char waiting for XMODEM load
6. Load the preloader binary with XMODEM protocol
7. Notice the "Press x to load BL31 + U-Boot FIP"
8. Press x
9. Notice the "C" char waiting for XMODEM load
10. Load the fip binary with XMODEM protocol
11. You are now in U-Boot loaded from serial
12. Follow normal procedure to flash bootloader
Due to BOOTROM limitation. the device can't have a standard GPT table
implementation. Because of this fixed-partitions are used to handle this.
U-Boot still doesn't have support for this (it's planned) and currently to flash
and load and image it's needed to write and read from static address in eMMC.
The GPT partition table follow Prpl guidelines with dual partition table with
kernel and rootfs split.
The address for kernel is 0xb00000 and the address for rootfs is 0x1b00000.
Link: https://github.com/openwrt/openwrt/pull/21761
Signed-off-by: Christian Marangi <ansuelsmth@gmail.com>
Set nand flash for KN-1910
Sysupgrade or any other method i tried (asu, owut) not working without it. Tested with a local build.
Signed-off-by: Esat Yiğithan GÖKTOPRAK <eygoktoprak@gmail.com>
Link: https://github.com/openwrt/openwrt/pull/22311
Signed-off-by: Hauke Mehrtens <hauke@hauke-m.de>
The bootcount init script is missing the executable bit (644 instead of 755),
causing the script to not be executable:
/etc/preinit: line 44: /etc/init.d/bootcount: Permission denied
Fixes: c3b8108a2b ("ramips: Add support for Xiaomi MiWiFi 3A")
Signed-off-by: Oliver Sedlbauer <os@dev.tdt.de>
Link: https://github.com/openwrt/openwrt/pull/22446
Signed-off-by: Hauke Mehrtens <hauke@hauke-m.de>
The MIPS code assigns the clock node based on the device tree node name.
This name was renamed with kernel 6.12.58 and v6.6.117. Adapt our out of
tree device tree files to this rename to fix loading the STP GPIO
driver.
Without this fix the driver fails like this:
```
[ 0.320000] gpio-stp-xway 1e100bb0.stp: Failed to get clock
[ 0.330000] gpio-stp-xway 1e100bb0.stp: probe with driver gpio-stp-xway failed with error -2
```
Link: https://git.kernel.org/linus/b0d04fe6a633ada2c7bc1b5ddd011cbd85961868
Fixes: https://github.com/openwrt/openwrt/issues/21697
Co-Authored-By: Shiji Yang <yangshiji66@outlook.com>
Link: https://github.com/openwrt/openwrt/pull/22444
Signed-off-by: Hauke Mehrtens <hauke@hauke-m.de>
Certain targets for an7581 and an7583 referred to kmod-pwm-airoha;
however in the target modules makefile the module is referred to
as kmod-pwm-an7581, causing buildbot to fail.
Change the name of kmod-pwm-an7581 to kmod-pwm-airoha to resolve this.
Signed-off-by: Kenneth Kasilag <kenneth@kasilag.me>
Link: https://github.com/openwrt/openwrt/pull/22445
Signed-off-by: Robert Marko <robimarko@gmail.com>
W1700K fan script is missing the #!/bin/sh /etc/rc.common shebang and
requires execution bits set. Also, set the fallback to hwmon 3 instead
of 5, since the new RTL PHY driver was not merged.
Signed-off-by: Andrew LaMarche <andrewjlamarche@gmail.com>
Link: https://github.com/openwrt/openwrt/pull/22391
Signed-off-by: Robert Marko <robimarko@gmail.com>
Note that for working G.hn support some packages need to be extracted from the Devolo firmware.
Signed-off-by: Julius Schwartzenberg <julius.schwartzenberg@eclipso.eu>
Link: https://github.com/openwrt/openwrt/pull/22123
Signed-off-by: Hauke Mehrtens <hauke@hauke-m.de>
Developers no longer maintain this driver. And it has been replaced
by the new upstream implementation. It's time to say goodbye.
Signed-off-by: Shiji Yang <yangshiji66@outlook.com>
Link: https://github.com/openwrt/openwrt/pull/22214
Signed-off-by: Hauke Mehrtens <hauke@hauke-m.de>
This is the generic PWM framework driver for Mediatek SoC. Now
this module is ready for MT7628.
Signed-off-by: Shiji Yang <yangshiji66@outlook.com>
Link: https://github.com/openwrt/openwrt/pull/22214
Signed-off-by: Hauke Mehrtens <hauke@hauke-m.de>
The upstream MediaTek PWM driver requires these clock sources to
work properly.
Signed-off-by: Shiji Yang <yangshiji66@outlook.com>
Link: https://github.com/openwrt/openwrt/pull/22214
Signed-off-by: Hauke Mehrtens <hauke@hauke-m.de>
When running `make kernel_menuconfig`, CPU_BIG_ENDIAN is selected by
default, resulting in a non-bootable image. Add CPU_LITTLE_ENDIAN to
avoid that.
Signed-off-by: Qingfang Deng <dqfext@gmail.com>
Link: https://github.com/openwrt/openwrt/pull/22282
Signed-off-by: Hauke Mehrtens <hauke@hauke-m.de>
The device dts files were moved to the dedicated directory in commit
a66e30631c ("qualcommax: move Device DTS to dedicated DTS directory"),
which resulted in a merge conflict.
Fixes: d755c49f7a ("qualcommax: ipq60xx: rename TP-Link EAP623-Outdoor HD v1 compatible")
Signed-off-by: Shiji Yang <yangshiji66@outlook.com>
Link: https://github.com/openwrt/openwrt/pull/22433
Signed-off-by: Robert Marko <robimarko@gmail.com>
This commit adds support for RTL9607C / RTL8198D thermal controller.
Based on the Realtek SDK code.
Signed-off-by: Rustam Adilov <adilov@tutamail.com>
Link: https://github.com/openwrt/openwrt/pull/22081
Signed-off-by: Hauke Mehrtens <hauke@hauke-m.de>
The RTL8226 PHYs in Zyxel XGS1010-10 and XGS1210-10 rev A1 have swapped
MDI lanes. Specify this in the device tree, so the driver can configure
it. With this change, the PHYs no longer require initialization by the
bootloader.
Signed-off-by: Jan Hoffmann <jan@3e8.eu>
Link: https://github.com/openwrt/openwrt/pull/21261
Signed-off-by: Hauke Mehrtens <hauke@hauke-m.de>
The PHY supports swapping the MDI pairs (ABCD->DCBA) to simplify board
layout. On devices making use of this, it needs to be configured in the
driver, otherwise the PHY won't work properly.
Signed-off-by: Jan Hoffmann <jan@3e8.eu>
Link: https://github.com/openwrt/openwrt/pull/21261
Signed-off-by: Hauke Mehrtens <hauke@hauke-m.de>
The dsa irq handler works always in the same way for all SoCs.
- Read register ISR_PORT_LINK_STS_CHG to determine the ports that
triggered the irq.
- Write the read value back to the register to confirm the irq
- Read link status via MAC_LINK_STS
- Trigger dsa_port_phylink_mac_change() for each changed port
Currently each SoC has its own implementation. Drop that in
favour of a generic implementation that makes use of the existing
bit register read/write helpers.
Signed-off-by: Markus Stockhausen <markus.stockhausen@gmx.de>
Link: https://github.com/openwrt/openwrt/pull/22273
Signed-off-by: Hauke Mehrtens <hauke@hauke-m.de>
This register will be needed to provide a generic irq handler. Add
it to the configuration structure of the driver.
Signed-off-by: Markus Stockhausen <markus.stockhausen@gmx.de>
Link: https://github.com/openwrt/openwrt/pull/22273
Signed-off-by: Hauke Mehrtens <hauke@hauke-m.de>
Some 10G optics showed random "module transmit fault indicated" due to I2C
read errors on ONTi ONT-S508CL-8S/XikeStor SKS8300-8X switches. The same
modules work with the original firmware and on other Linux based devices.
There seems to be some differences in how we talk to those modules using
I2C in OpenWRT. To fix this this patch adds support for 50kHz I2C speed on
SFPs and enables that for XikeStor/Onti devices. Since SFPs only transmit
very few bytes this should not have any real downsides.
This patch configures I2C to use 50kHz clock in the DTS for the affected
devices. For it to work it requires a change in the RTL9300 I2C driver.
This can be safely merged without the kernel change (but will not work
in that case as it will fall back to 100kHz).
Signed-off-by: Jan Kantert <jan-openwrt@kantert.net>
Link: https://github.com/openwrt/openwrt/pull/22210
Signed-off-by: Hauke Mehrtens <hauke@hauke-m.de>
No functional changes intended.
Signed-off-by: Aleksander Jan Bajkowski <olek2@wp.pl>
Link: https://github.com/openwrt/openwrt/pull/22350
Signed-off-by: Hauke Mehrtens <hauke@hauke-m.de>
The main difference between EAP610, 623, and 625 is the device name,
support string, and the BDF package. Move the others to a common
Device/tplink_eap6xx-common in order to highlight the common aspects.
Signed-off-by: Alexandru Gagniuc <mr.nuke.me@gmail.com>
Link: https://github.com/openwrt/openwrt/pull/18804
Signed-off-by: Robert Marko <robimarko@gmail.com>
The EAP625 and EAP623 are extremely similar. The only difference in
the vendor's device tree is that EAP625 also enables USB and UART2.
Use the eap6xx dtsi instead of writing out a full devicetree.
The EAP623 uses the same RTL8211F as the 625 and 610. Since this is
a gigabit PHY, it is okay to change the ess mac mode from SGMII_PLUS
to SGMII. This is now consistent across all three devices.
Move the 'realtek,clkout-disable' and 'realtek,aldps-enable' PHY
properties to the common dtsi, as they work well on all three devices.
Reflect the remaining differences in the eap625 dts.
Signed-off-by: Alexandru Gagniuc <mr.nuke.me@gmail.com>
Link: https://github.com/openwrt/openwrt/pull/18804
Signed-off-by: Robert Marko <robimarko@gmail.com>
As I was looking at the differences between EAP610, 623, and 625
Outdoor, I realized that the quick-start guide of all of the devices
mentions a yellow and green LED. Thus rename the "amber" led to
"yellow", and adjust its color ID accordingly.
Signed-off-by: Alexandru Gagniuc <mr.nuke.me@gmail.com>
Link: https://github.com/openwrt/openwrt/pull/18804
Signed-off-by: Robert Marko <robimarko@gmail.com>
Originally, the .compatible string for EAP623-Outdoor HD tried to
shorten the "-outdoor" to "od". However, this naming was inconsistent
with the existing "eap610-outdoor". As "od" is not a common shorthand,
spell out the complete word: "eap623-outdoor-hd-v1".
Fixes: 5dbf93c8c5 ("ipq60xx: add support for TP-Link EAP623-Outdoor HD v1")
Signed-off-by: Alexandru Gagniuc <mr.nuke.me@gmail.com>
Link: https://github.com/openwrt/openwrt/pull/18804
Signed-off-by: Robert Marko <robimarko@gmail.com>
CI is currently failing due to these four patches.
Automatically refreshed with `make target/linux/refresh`.
Signed-off-by: Kenneth Kasilag <kenneth@kasilag.me>
Link: https://github.com/openwrt/openwrt/pull/22399
Signed-off-by: Robert Marko <robimarko@gmail.com>
Userspace handling is deprecated.
Since the u-boot ethaddr variable is quoted, we cannot use it.
Use mac-base instead to specify in dts.
Signed-off-by: Rosen Penev <rosenp@gmail.com>
Link: https://github.com/openwrt/openwrt/pull/14182
Signed-off-by: Robert Marko <robimarko@gmail.com>
Userspace handling is deprecated.
Signed-off-by: Rosen Penev <rosenp@gmail.com>
Link: https://github.com/openwrt/openwrt/pull/14182
Signed-off-by: Robert Marko <robimarko@gmail.com>
Userspace handling is deprecated.
Signed-off-by: Rosen Penev <rosenp@gmail.com>
Link: https://github.com/openwrt/openwrt/pull/14182
Signed-off-by: Robert Marko <robimarko@gmail.com>
Removes deprecated userspace handling.
Signed-off-by: Rosen Penev <rosenp@gmail.com>
Link: https://github.com/openwrt/openwrt/pull/14182
Signed-off-by: Robert Marko <robimarko@gmail.com>
- Fix RTL8261N 10GbE PHY `reset-deassert-us` from 100ms to 221ms to meet datasheet minimum SMI-ready timing (t7 >= 150ms), fixing intermittent boot stalls caused by MDIO bus instability
- Add missing WLAN toggle button (GPIO 34) present in stock firmware but absent from OpenWrt DTS
- Fix memory size from 1 GB to the actual 512 MB
Fix 1: The RTL8261N 10GbE PHY's `reset-deassert-us` was set to 100ms (100000us), but the **RTL8261N datasheet (Table 108, parameter t7)** specifies a minimum **SMI-ready time of 150ms** after nRESET release before the MDIO (SMI) bus can be used.
With only 100ms, the kernel attempts MDIO bus access before the RTL8261N's SMI interface is stable. Since the RTL8261N (mdio-bus:00) and the internal MT7988 2.5GbE PHY (mdio-bus:0f) share the same MDIO bus, a not-yet-ready RTL8261N disrupts all MDIO traffic, causing the 2.5GbE PHY firmware loading (`mt798x_2p5ge_phy_config_init`) to stall.
Observed symptoms on warm reboot:
- Sometimes `mt798x_2p5ge_phy_config_init` hangs for 5+ minutes or indefinitely
- RCU CPU stalls (`rcu: INFO: rcu_sched detected stalls on CPUs`)
- mt7996e WiFi chip message timeouts cascading to `chip full reset failed`
- System appears hung with only power LED blinking slowly
UART serial log evidence (warm reboot with 100ms):
```
[ 73.041756] rcu: INFO: rcu_sched self-detected stall on CPU
[ 73.048341] rcu: 2-....: (8 ticks this GP)
[ 73.061641] pc : mt798x_2p5ge_phy_config_init+0x258/0xbb0
[ 73.061653] lr : mt798x_2p5ge_phy_config_init+0x238/0xbb0
...
[ 334.771280] MediaTek MT7988 2.5GbE PHY mdio-bus:0f: Firmware date code: 2024/10/30
```
The 2.5GbE PHY firmware loading, which normally takes ~3 seconds, took **325 seconds** due to MDIO bus instability. In the worst case, the system never recovers.
GPL DTS uses 221ms (`reset-deassert-us = <221000>`), providing 71ms of margin above the 150ms datasheet minimum. All MediaTek MT7988 reference board DTS files in the GPL use this same 221ms value.
Fix 2: Missing WLAN button (GPIO 34)
The BE450 has a physical WLAN toggle button on GPIO 34, defined in the stock TP-Link GPL DTS but missing from the OpenWrt DTS. Without this definition, the button is non-functional under OpenWrt.
The pin name for GPIO 34 in the MT7988 pinctrl is `SPI2_MISO`, confirmed by the kernel pinctrl driver (`pinctrl-mt7988.c`: `MT7988_PIN(34, "SPI2_MISO")`) and the official devicetree binding (`mediatek,mt7988-pinctrl.yaml`).
Note: GPIO 34 is also used by the BE450's First U-Boot as a recovery button (web recovery 192.168.1.1). Registering it in the DTS ensures the kernel claims the pin.
Fix 3: Incorrect memory size in DTS
The OpenWrt DTS declares 1 GB (`0x40000000`) of RAM, but the BE450 has 512 MB (`0x20000000`).
Run tested.
Signed-off-by: Semih Baskan <strst.gs@gmail.com>
Link: https://github.com/openwrt/openwrt/pull/22386
Signed-off-by: Hauke Mehrtens <hauke@hauke-m.de>
The current CMU setup was just copied and slightly adjusted from the
SDK, lacks functionality and logic and doesn't cover all cases we need
(same in the SDK due to multiple reasons). The existing implementation
for RTL930x covers all that and can be reused for RTL931x. Previous
patches made this generic and now we can add the remaining missing
pieces to actually use it for RTL931x. This only includes
implementations for the few variant-specific actions within the
implementation, linking them properly and calling the CMU configuration.
Drop the old CMU code for RTL931x then since it's not needed anymore.
Signed-off-by: Jonas Jelonek <jelonek.jonas@gmail.com>
Link: https://github.com/openwrt/openwrt/pull/22198
Signed-off-by: Hauke Mehrtens <hauke@hauke-m.de>
Improve the RTL931x mapper to infer the CMU page from the hardware mode
by replace unneeded with useful comments, returning a better error code
and dropping irrelevant parts.
Signed-off-by: Jonas Jelonek <jelonek.jonas@gmail.com>
Link: https://github.com/openwrt/openwrt/pull/22198
Signed-off-by: Hauke Mehrtens <hauke@hauke-m.de>
Do some slight improvements to the generic CMU configuration for
RTL93xx. This covers several points:
- update comments to the current reality
- add fast path to avoid issues and unneeded calls
- use cached mode value instead of register read
Signed-off-by: Jonas Jelonek <jelonek.jonas@gmail.com>
Link: https://github.com/openwrt/openwrt/pull/22198
Signed-off-by: Hauke Mehrtens <hauke@hauke-m.de>
Generalize the RTL930x CMU configuration to support RTL931x as well.
Both implementations differ only in minor details, allowing them to
share common code and avoid duplication.
Affected functions are moved up in the code to the 93xx common area and
slightly renamed. Existing variant-specific functions are adjusted too
and assigned to the previously added SerDes operation hooks.
Signed-off-by: Jonas Jelonek <jelonek.jonas@gmail.com>
Link: https://github.com/openwrt/openwrt/pull/22198
Signed-off-by: Hauke Mehrtens <hauke@hauke-m.de>
Add new SerDes ops for CMU management to be able to share common
behavior of CMU configuration for RTL930x and RTL931x while still
covering variant specifics.
Signed-off-by: Jonas Jelonek <jelonek.jonas@gmail.com>
Link: https://github.com/openwrt/openwrt/pull/22198
Signed-off-by: Hauke Mehrtens <hauke@hauke-m.de>
Fix naming of several functions to better reflect what they are doing.
While at it, also improve the error handling a lot, changing the return
type from void to int and actually returning errors.
Signed-off-by: Jonas Jelonek <jelonek.jonas@gmail.com>
Link: https://github.com/openwrt/openwrt/pull/22198
Signed-off-by: Hauke Mehrtens <hauke@hauke-m.de>
Move resetting the CMU into the PLL configuration itself where the speed
is set. Since this operation is not dependent of the target SerDes and
only needs to be called if the speed changed, it fits better there.
Though the call was guarded with a 'speed_changed' before, this also
applies to actually changing the speed. This was done before anyway,
even if the speed value hasn't really changed.
Signed-off-by: Jonas Jelonek <jelonek.jonas@gmail.com>
Link: https://github.com/openwrt/openwrt/pull/22198
Signed-off-by: Hauke Mehrtens <hauke@hauke-m.de>
Add a mapper function to infer the to-be-selected PLL speed from the
desired SerDes hardware mode. This avoids having similar logic in each
CMU implementation.
Signed-off-by: Jonas Jelonek <jelonek.jonas@gmail.com>
Link: https://github.com/openwrt/openwrt/pull/22198
Signed-off-by: Hauke Mehrtens <hauke@hauke-m.de>
Split up PLL configuration of RTL930x in the two distinct actions of
configuring the PLL itself (aka setting its speed, etc.) and selecting
which PLL is used by a SerDes.
It was found that for both RTL930x and RTL931x, PLL configuration can be
combined while selecting the PLL a SerDes uses differs and needs to be
implemented variant-specific.
Signed-off-by: Jonas Jelonek <jelonek.jonas@gmail.com>
Link: https://github.com/openwrt/openwrt/pull/22198
Signed-off-by: Hauke Mehrtens <hauke@hauke-m.de>
Make use of the generic PLL type definition in the current CMU/PLL
configuration code for RTL930x. Assign explicit values to the fields of
the PLL type enum to tie these fields to the values that are used in
the register fields. This allows to simplify the code a bit.
Selecting the PLL to use for a SerDes shares some similarities between
RTL930x and RTL931x. While the location of the selector in the registers
is placed different, similar underlying bit semantics are used. This
allows to reuse the same plain values for both. RTL930x uses a force bit
and a selector bit, RTL931x at least uses the selector bit with the same
values for ring and LC PLL.
Signed-off-by: Jonas Jelonek <jelonek.jonas@gmail.com>
Link: https://github.com/openwrt/openwrt/pull/22198
Signed-off-by: Hauke Mehrtens <hauke@hauke-m.de>
Make use of the generic PLL speed definition in the current CMU/PLL
configuration code for RTL930x. Assign explicit values to the field of
the PLL speed enum to tie these fields to the values that are used in
the register fields. This allows to simplify the code a bit.
Setting the actual speed selector for RTL930x was found to be similar to
RTL931x despite of different values being used since the LSB is always 1.
According to the SDK this seems to be a force bit while the other bits
are the actual value/selector that is being forced. For RTL930x,
separate the speed selection to be able to use that as common behavior
for both variants later.
Signed-off-by: Jonas Jelonek <jelonek.jonas@gmail.com>
Link: https://github.com/openwrt/openwrt/pull/22198
Signed-off-by: Hauke Mehrtens <hauke@hauke-m.de>
Bring the PLL definitions into a proper shape. While there was already a
definition for the PLL type, a generic PLL speed definition was missing.
Introduce such a definition and adjust the naming of the existing PLL
type definition to have a better distinction and avoid conflicts. The
definitions can and should be used to make the CMU/PLL configuration
more generic and reduce the need for variant-specific definitions.
Signed-off-by: Jonas Jelonek <jelonek.jonas@gmail.com>
Link: https://github.com/openwrt/openwrt/pull/22198
Signed-off-by: Hauke Mehrtens <hauke@hauke-m.de>
The ethernet driver configures the SoC internal network card
on its own. There are no special serdes or other layers in
between. So there is no need for pcs handling in the driver.
Drop that.
Signed-off-by: Markus Stockhausen <markus.stockhausen@gmx.de>
Link: https://github.com/openwrt/openwrt/pull/22347
Signed-off-by: Robert Marko <robimarko@gmail.com>
These devices contain a single MAC address in the U-Boot environment.
Set it as eth0 and label MAC in device tree. To maintain the current
state, the 02_network script still sets individual port MAC addresses
and the bridge MAC address.
Signed-off-by: Markus Stockhausen <markus.stockhausen@gmx.de>
Link: https://github.com/openwrt/openwrt/pull/22302
Signed-off-by: Robert Marko <robimarko@gmail.com>
Allow to convert MAC adddresses for all devices to NVMEM in
the future.
Signed-off-by: Markus Stockhausen <markus.stockhausen@gmx.de>
Link: https://github.com/openwrt/openwrt/pull/22302
Signed-off-by: Robert Marko <robimarko@gmail.com>
The Cudy M3000 v1/v2 seem to have mostly identical hardware.
The M3000 v1 OpenWrt images work on the M3000 v2 (excluding
the v2 parts with a different PHY). Cudy also distributes one
firmware image that supports both routers.
Rename the human-readable device variant to "v1/v2" to match this.
Don't change the compatible property as that hooks into the
attended sysupgrade process.
The recent flash and PHY changes don't seem to be related to the v1/v2
split. There exist M3000 v2 with the Realtek PHY, see e.g.
https://github.com/openwrt/openwrt/pull/21584#issuecomment-3864992555
Signed-off-by: Jakub Vaněk <linuxtardis@gmail.com>
Link: https://github.com/openwrt/openwrt/pull/22259
Signed-off-by: Hauke Mehrtens <hauke@hauke-m.de>
The hardware is very close the the Cudy M3000 v1 (see commit
20e4a18feb). However, the Motorcomm YT8821 PHY is tricky
to support because of a MDIO address collision within the router.
Specification:
- MT7981BA CPU: dual-core ARM Cortex-A53 @ 1.3 GHz
- 256 MiB RAM
- 128 MiB SPI NAND
- Ethernet:
- 1x 1GbE LAN port driven by the internal MT7981 PHY
- 1x 2.5GbE WAN port driven by the Motorcomm YT8821
- WiFi:
- MT7981BA 2.4 GHz WiFi with 2x2:2 MIMO
- MT7981BA 5 GHz WiFi with 2x3:2 MIMO
- Buttons: Reset, WPS
- LED: 1x combined red/white
How to know if you have the a router with the YT8821 PHY:
- Boot the router into the vendor's firmware. Go to Diagnostic Tools
-> System Log. Try searching for "rtl8221b".
- If there are some matches, you have the Cudy M3000 router with
the Realtek PHY and you should NOT use the device defined in this
commit. Instead, you should use the device defined in
mt7981b-cudy-m3000-v1.dts.
- If there are no matches, try searching for "yt8821". If that
matches something, you have the Cudy M3000 with the Motorcomm PHY
and you should use this device tree
(mt7981b-cudy-m3000-v2-yt8821.dts).
- If even the yt8821 string did not match anything, then something
is wrong. Rebooting the router might help (the system log would
be refreshed).
Installation via the Cudy web UI:
- Download the signed intermediary firmware from
https://drive.google.com/drive/folders/1BKVarlwlNxf7uJUtRhuMGUqeCa5KpMnj
- Flash the intermediary firmware using the Cudy web UI
- Connect a PC/laptop to the "1Gbps LAN" port
- Open http://192.168.1.1 in your browser, log in
(the password should be empty)
- Flash your desired OpenWrt firmware via LuCI
- The router should reboot into the desired firmware
How to access UART (citing from 20e4a18feb):
- remove rubber ring on the bottom
- remove screws
- pull up the cylinder, maybe help by push on an ethernet socket
with a screwdriver
- remove the (3) screws holding the board in the frame
- remove the board from the frame to get to the screws for the
silver, flat heat shield
- remove the (3) screws holding the heat shield
- solder UART pins to the back of the board
- make sure to have the pins point out on side with the black,
finned heat spread
- the markings for the pins are going to be below the silver heat
shield
- Vcc is not needed
- the UART parameters are 115200 baud, 8n1
Installation via UART (citing from 20e4a18feb):
- attach an Ethernet cable to the "1Gbps LAN" port on the router
- hold the reset button while powering the router
- press CTRL-C or wait for the timeout to get to the U-Boot prompt
- prepare a TFTP server on the network to supply ..-initramfs-kernel.bin
- use 'tftpboot 0x46000000 ..-initramfs-kernel.bin' in the U-Boot
shell to pull the image (change the file name accordingly)
- boot the image using 'bootm 0x46000000'
- push the ..-sysupgrade to the router using your preferred method
- perform the upgrade with 'sysupgrade -n'
Signed-off-by: Jakub Vaněk <linuxtardis@gmail.com>
Link: https://github.com/openwrt/openwrt/pull/22259
Signed-off-by: Hauke Mehrtens <hauke@hauke-m.de>
The KSZ9477 driver was added to the cortexa53 kernel to support the
Gateworks Venice product family which has a board with this switch. Now
that the kmod-dsa-ksz9477 driver is available as a package remove the
static configuration ad add the package.
This resolves an issue caused by having the switch driver static and the
PHY driver as a module such that the PHY driver was not registered early
enough to be used causing some errata to not be worked around.
Signed-off-by: Tim Harvey <tharvey@gateworks.com>
Link: https://github.com/openwrt/openwrt/pull/22120
Link: https://github.com/openwrt/openwrt/pull/22257
Signed-off-by: Robert Marko <robimarko@gmail.com>
In generic, there's a backport from 6.14 that makes this change. Do so
in downstream locations as well.
Signed-off-by: Rosen Penev <rosenp@gmail.com>
Link: https://github.com/openwrt/openwrt/pull/21167
Signed-off-by: Robert Marko <robimarko@gmail.com>
Restore the lost band label.
Fixes: 502ac21e8f ("ipq40xx: drop redundant label with new LED color/function format")
Signed-off-by: Tomasz Maciej Nowak <tmn505@gmail.com>
SFP I2C buses for ports 1 and 3 were swapped as order changed on production
boards.
So, swap them around to fix SFP 1 and 3 failed to read EEPROM errors.
Fixes: 29b3d929a6 ("microchipsw: lan969x: add Novarq Tactical 1000")
Signed-off-by: Robert Marko <robert.marko@sartura.hr>
I wrongly added the wifi devices to the pcie nodes and not the bridge
nodes as they were not present at the time.
Fixes: 58056df ("bcm53xx: backport nvmem mac for meraki mr26")
Signed-off-by: Rosen Penev <rosenp@gmail.com>
Link: https://github.com/openwrt/openwrt/pull/22369
Signed-off-by: Robert Marko <robimarko@gmail.com>
Remove source-only from an7581.
Signed-off-by: Andrew LaMarche <andrewjlamarche@gmail.com>
Link: https://github.com/openwrt/openwrt/pull/17869
Signed-off-by: Christian Marangi <ansuelsmth@gmail.com>
Most, if not all Airoha devices will have LEDs and buttons. Add them to
default packages.
Signed-off-by: Andrew LaMarche <andrewjlamarche@gmail.com>
Link: https://github.com/openwrt/openwrt/pull/17869
Signed-off-by: Christian Marangi <ansuelsmth@gmail.com>
Add uboot-envtools to default packages to facilitate modifying the
u-boot environment.
Signed-off-by: Andrew LaMarche <andrewjlamarche@gmail.com>
Link: https://github.com/openwrt/openwrt/pull/17869
Signed-off-by: Christian Marangi <ansuelsmth@gmail.com>
This commit adds support for Gemtek (Centurylink/Lumen/Quantum Fiber)
W1700K.
Device specification
--------------------
SoC Type: Airoha AN7581
RAM: ESMT M16U8G16512A (2GB)
Flash: Winbond 25N04KVZEIR (512MB)
Ethernet: 2x gigabit via AN7581, 2x 10g via RTL8261N
Wi-Fi: MT7996 - BE19000
LEDs: 1 LED, power/status
Button: Reset
USB ports: None
Bootloader: U-Boot 2014.04-rc1 (Jun 12 2024 - 08:14:34) AXON 2.0
Fan: 1x controlled by Nuvoton NCT7511Y
This device is pretty useless with the stock firmware as it requires an
account to completely set it up. Additionally, the vendor bootloader is
signed and uses Airoha/Mediatek's BBT/BMT for bad block management on
the flash. It does not support UBI, thus kernel updates are subject to
BMT/BBT which OpenWrt does not support. In turn, if a kernel update
happens and a block is marked bad in the process, the device will fail
to boot and will need to be recovered via serial.
The workaround is to chainload U-Boot in place of the kernel, as it
should not need frequent updates and thus should not cause BBT/BMT to
misbehave and soft-brick the device. Upstream U-Boot supports loading
a FIT image from UBI, so we create a UBI partition for the new u-boot
env, FIT image and factory data. This way, bad blocks are managed by UBI
instead, which will not soft-brick the device should a block be marked
bad during a normal OpenWrt update. Users wishing to update U-Boot can
do so, but should be prepared to recover if a block goes bad.
Because the device is not useful with stock firmware, this is a one-way
ticket for most users and reverting will not be documented.
The following steps can be used to install OpenWrt on the W1700K.
Connect to serial console. There is a Torx T10 screw underneath the QR
code printed onto the label. Then, pry between the gray and white
plastic, starting by the ports on the back. There are clips arount the
entire device. Starting closest to the screw next to the UART header,
TX - GND - VCC - N/A - RX. The bootloader can be interrupted by
pressing any key.
Configuring Vendor Bootloader and Installing U-Boot Chainloader:
The bootloader's default bootcmd will only run a signed image. However,
we can still bootm our own image from flash.
NOTE: The vendor's ethernet drivers are flaky. You may have to reboot
and try the tftpboot part several times for it to work.
- setenv one flash read 0x600000 0x1000000 \$loadaddr
- setenv two "; bootm"
- setenv bootcmd "$one$two"
- setenv one
- setenv two
- saveenv
- setenv serverip 192.168.1.10; setenv ipaddr 192.168.1.1; tftpboot
0x89000000 openwrt-airoha-an7581-gemtek_w1700k-ubi-chainload-uboot.itb
- flash erase 0x600000 0x100000
- flash write 0x600000 0x100000 0x89000000
- reset
The device will now reboot into the U-Boot chainloader.
Loading the W1700K UBI Installer:
The installer can be downloaded at
https://github.com/hurrian/w1700k-ubi-installer/releases
- Boot the installer via the TFTP option in the U-Boot menu. This
process is automatic, though you may be prompted to answer some
questions.
- Once it is done, you may upgrade to your preferred build.
- For more information: https://github.com/hurrian/w1700k-ubi-installer
For those wishing to explore the stock firmware:
Rooting Stock FW (for making backups, recommended):
- Boot the router and watch serial console until presented with failsafe
mode. Enter it (f + enter).
- mount_root
- Change the root password (passwd).
- Open /etc/config/axon_platform_manager and set sshServerEnable,
localAccessEnable and remoteAccessEnable to 1.
- Search for "SSH". You'll find a long string with 3 matches such as
Enabled%25252c1%25252cSSH%Drop. Change any instances of "Disabled"
preceding SSH to "Enabled" and any instances of "Drop" to "Accept"
that follow SSH. Same for "Local SSH" and "Remote SSH".
- Set /etc/config/dropbear to:
config dropbear
option PasswordAuth 'on'
option RootPasswordAuth 'on'
option Port '22'
- Reboot.
- Connect 10g WAN port to existing network and SSH in with the password
you set.
- SSH into rooted stock fw.
Signed-off-by: Andrew LaMarche <andrewjlamarche@gmail.com>
Link: https://github.com/openwrt/openwrt/pull/17869
Signed-off-by: Christian Marangi <ansuelsmth@gmail.com>
In the transition to nvmem-layout and subsequent disabling of non layout
u-boot-env, this device was left out.
Transition to nvmem-layout to fix the mac address.
Signed-off-by: Rosen Penev <rosenp@gmail.com>
Link: https://github.com/openwrt/openwrt/pull/22263
Signed-off-by: Christian Marangi <ansuelsmth@gmail.com>
Userspace handling is deprecated.
These are identical to NBG6617, which was tested as working.
Signed-off-by: Rosen Penev <rosenp@gmail.com>
Link: https://github.com/openwrt/openwrt/pull/22263
Signed-off-by: Christian Marangi <ansuelsmth@gmail.com>
Userspace handling is deprecated.
UBI nvmwem has been supported for quite a while now.
Signed-off-by: Rosen Penev <rosenp@gmail.com>
Link: https://github.com/openwrt/openwrt/pull/22263
Signed-off-by: Christian Marangi <ansuelsmth@gmail.com>
When NVMEM is not ready, of_get_mac_address fails. Handle this.
Signed-off-by: Rosen Penev <rosenp@gmail.com>
Link: https://github.com/openwrt/openwrt/pull/22305
Signed-off-by: Christian Marangi <ansuelsmth@gmail.com>
When NVMEM is not ready, of_get_mac_address fails. Handle this.
Signed-off-by: Rosen Penev <rosenp@gmail.com>
Link: https://github.com/openwrt/openwrt/pull/22305
Signed-off-by: Christian Marangi <ansuelsmth@gmail.com>
RTL838x devices cannot reboot if the flash controller is driven in
4 byte mode. Unitl fdc3776 ("realtek: pcs: fix PLL_CML_CTRL for
serdes 0/1") this bit was luckily cleared by a coding error. Since
then the device cannot be rebooted anymore.
Looking at the SDK one can see that this bit is reset short before
the reboot happens. But we might need that in critical situations
where there is no chance to do it right in time. As the RTL838x
always ran with the bit disabled restore the old behaviour. This
time implement it as a documented quirk so it does not get lost.
Fixes: fdc3776 ("realtek: pcs: fix PLL_CML_CTRL for serdes 0/1")
Signed-off-by: Markus Stockhausen <markus.stockhausen@gmx.de>
Link: https://github.com/openwrt/openwrt/pull/22334
Signed-off-by: Robert Marko <robimarko@gmail.com>
Disable airoha-flow-stats for an7583 since it is not currently supported
by the firmware image.
Signed-off-by: Lorenzo Bianconi <lorenzo@kernel.org>
Link: https://github.com/openwrt/openwrt/pull/22341
Signed-off-by: Christian Marangi <ansuelsmth@gmail.com>
The Realtek DSA driver accesses the DTS at two locations.
- rtldsa_ethernet_loaded(): to check if ethernet driver is active
- rtl83xx_mdio_probe(): to create ports and link to pcs/phy
The first function does not directly search for the ethernet driver
but looks it up through the switch port nodes. Avoid future issues
and simply search all nodes that have a "ethernet" link to the
network driver.
While we are here add a missing put_device() to keep reference
counters clean.
Signed-off-by: Markus Stockhausen <markus.stockhausen@gmx.de>
Link: https://github.com/openwrt/openwrt/pull/22235
Signed-off-by: Hauke Mehrtens <hauke@hauke-m.de>
rteth_930x_create_tx_header() and rteth_931x_create_tx_header() do
basically the same. Only exception is, that one function can handle
ports beyond 32 and the other not. Merge them into one.
Signed-off-by: Markus Stockhausen <markus.stockhausen@gmx.de>
Link: https://github.com/openwrt/openwrt/pull/22228
Signed-off-by: Hauke Mehrtens <hauke@hauke-m.de>
MAC setting uses hard to read duplicated code. Additionally it
evaluates the unwanted family_id attribute. Provide the list
of MAC address registers in the configuration structure and use
a loop to fill those.
Signed-off-by: Markus Stockhausen <markus.stockhausen@gmx.de>
Link: https://github.com/openwrt/openwrt/pull/22217
Signed-off-by: Hauke Mehrtens <hauke@hauke-m.de>
There is a workaround in the transmit path for the RTL838x SoCs. This
is basically an open coded read_poll_timeout() and makes the code hard
to read. Additionally the magic trigger calculation is not easy to
understand.
Simplify things by using kernel standards and a better macro.
Signed-off-by: Markus Stockhausen <markus.stockhausen@gmx.de>
Link: https://github.com/openwrt/openwrt/pull/22217
Signed-off-by: Hauke Mehrtens <hauke@hauke-m.de>
Some 10G optics showed random "module transmit fault indicated" due to I2C
read errors on ONTi ONT-S508CL-8S/XikeStor SKS8300-8X switches. The same
modules work with the original firmware and on other Linux based devices.
There seems to be some differences in how we talk to those modules using
I2C in OpenWRT. To fix this this patch adds support for 50kHz I2C speed on
SFPs and enables that for XikeStor/Onti devices. Since SFPs only transmit
very few bytes this should not have any real downsides.
This patch adds support in the i2c driver for 50kHz and 2.5MHz. In a
second PR I will configure 50kHz in the DTS for the affected devices.
Signed-off-by: Jan Kantert <jan-openwrt@kantert.net>
Link: https://github.com/openwrt/openwrt/pull/22209
Signed-off-by: Hauke Mehrtens <hauke@hauke-m.de>
LACP frequently changes active/backup links. driver must also handle
dp->lag_tx_enabled.
This should only affect egress LAG table, ingress should not be touched.
To test, connect a known working 802.3ad compatible switch (Mikrotik).
Configure bond with 802.3ad on openwrt as well as mikrotik.
Observer active/backup links on openwrt with
```
for iface in <list of bond participants>; do
ip -d link show $iface
done
```
This should show ACTIVE/BACKUP status which must be synchronized with
the partner's ACTIVE/BACKUP status if LACP is working correctly.
Backup interface must not be chosen by the distribution algorithm to
transmit egress packet
At the moment, we have two parties involved in the selection of active LAG TX
ports:
- the bonding/DSA code which informs about activated/deactivated ports using
.port_lag_change
- the HW which is deactivating ports based on the link state see
RTL93XX_TRK_CTRL_LINK_DOWN_AVOID
In our case, the software is supposed to manage everything
Co-developed-by: Sven Eckelmann <se@simonwunderlich.de>
Signed-off-by: Sven Eckelmann <se@simonwunderlich.de>
Signed-off-by: Harshal Gohel <hg@simonwunderlich.de>
Link: https://github.com/openwrt/openwrt/pull/21740
Signed-off-by: Hauke Mehrtens <hauke@hauke-m.de>
With this commit it is possible to create 802.3ad compatible bond
interface that is interoperable with other 802.3ad compatible switches.
Each trunk group can have maximum of 8 ports as members.
Hardware also supports trunking with stacked switches, however it is not
handled here and the driver only configures the local trunk.
rtl930x and rtl931x has minimal differences in trunk/lag
Co-developed-by: Sven Eckelmann <se@simonwunderlich.de>
Signed-off-by: Sven Eckelmann <se@simonwunderlich.de>
Signed-off-by: Harshal Gohel <hg@simonwunderlich.de>
Link: https://github.com/openwrt/openwrt/pull/21740
Signed-off-by: Hauke Mehrtens <hauke@hauke-m.de>
rtl93xx has two distribution algorithm slots that are shared among
multiple trunks.
Each of this slot can be configured to handle L2 and/or L3 packets
Hardware can also be configured to support layer3+4 but that is not
802.3ad compliant. With this commmit I want to focus on getting
layer2 and layer2+3 initialized in two slots.
When a new LAG group is created, depending on the xmit_hash_policy
configuration a slot will be configured in LAG table entry
SPA and VLAN bits made the switch to always choose same link for all
connections which completely dismisses point of Link aggregation.
So avoid these and stick to SMAC + DMAC for L2 packets and
SMAC + DMAC + SIP + DIP for L3 packets
Co-developed-by: Sven Eckelmann <se@simonwunderlich.de>
Signed-off-by: Sven Eckelmann <se@simonwunderlich.de>
Signed-off-by: Jan Fuchs <jf@simonwunderlich.de>
Signed-off-by: Harshal Gohel <hg@simonwunderlich.de>
Link: https://github.com/openwrt/openwrt/pull/21740
Signed-off-by: Hauke Mehrtens <hauke@hauke-m.de>
rtl93xx hardware supports trunk fdb entries. That requires driver to
translate port-fdb entry to trunk fdb entry if the port is part of a
LAG.
There is no standard way of indicating fdb entries for bond interfaces.
One can use debugfs interface l2_table to dump all the entries stored in
the hardware. Trunk FDB entries are now displayed properly with trunk ID
and participating ports
Co-developed-by: Sven Eckelmann <se@simonwunderlich.de>
Signed-off-by: Sven Eckelmann <se@simonwunderlich.de>
Signed-off-by: Harshal Gohel <hg@simonwunderlich.de>
Link: https://github.com/openwrt/openwrt/pull/21740
Signed-off-by: Hauke Mehrtens <hauke@hauke-m.de>
rtl9310 and rtl9300 have two slots for configuration of packet distribution
algorithm that can be assigned to multiple LAG groups. They also have the
same field descriptions
Co-developed-by: Sven Eckelmann <se@simonwunderlich.de>
Signed-off-by: Sven Eckelmann <se@simonwunderlich.de>
Signed-off-by: Harshal Gohel <hg@simonwunderlich.de>
Link: https://github.com/openwrt/openwrt/pull/21740
Signed-off-by: Hauke Mehrtens <hauke@hauke-m.de>
It is not helpful at the moment to expose all the SoC specific details to
the common code when it actually only needed to add ports to a LAG. Just
have a simple interface for now.
Support returning errors while setting distribution algorithm
Move setting algomask to rtl83xx specific routine and out of common lag_add
because algomasks will be handled differently on rtl93xx
Co-developed-by: Sven Eckelmann <se@simonwunderlich.de>
Signed-off-by: Sven Eckelmann <se@simonwunderlich.de>
Signed-off-by: Harshal Gohel <hg@simonwunderlich.de>
Link: https://github.com/openwrt/openwrt/pull/21740
Signed-off-by: Hauke Mehrtens <hauke@hauke-m.de>
Hardware
========
SoC: Qualcomm IPQ4018
ETH: Qualcomm QCA8075 (2 x RJ-45)
WDG: OnSemi SCT706
RAM: Micron MT41K128M16JT-125 (256MB)
NOR: Infineon S25FL512S (64MB)
Installation
============
1. Create a ramboot-able image with the command
{ dd if=/dev/zero bs=32 count=1 2>/dev/null; \
cat openwrt-ipq40xx-generic-huawei_ap4050dn-initramfs-uImage.itb; \
} > ramboot.bin`
2. Start a TFTP server in the folder with the ramboot.bin.
3. Plug in a USB-RJ45 serial adapter to the CONSOLE port of the device
and start a serial console session with
9600 baud, no parity, 1 stop bit.
4. Plug in either 12V power or PoE to the device.
5. On the prompt `Press f or F to stop Auto-Boot in 3 seconds`,
press `f` to enter the Huawei U-Boot command line
6. Enter a new password for the u-boot command line
7. In the command line, run these commands to ramboot OpenWrt:
setenv serverip <IPv4 address of TFTP server>
setenv ipaddr <IPv4 address for this AP>
setenv rambootfile ramboot.bin
run ramboot
8. In OpenWrt, set up the network and then `scp` the files
`u-boot-huawei_ap4050dn/uImage` and
`openwrt-ipq40xx-generic-huawei_ap4050dn-squashfs-sysupgrade.bin`
into `/tmp/`
9. To backup the original firmware, run the following:
cat /dev/mtd12 /dev/mtd13 > huawei_ap4050dn_fw_backup.bin.bin
10. Run the following commands to flash u-boot and OpenWrt to the device:
mtd erase uboot
mtd write /tmp/uImage uboot
sysupgrade -n /tmp/openwrt-ipq40xx-generic-huawei_ap4050dn-squashfs-sysupgrade.bin
11. The device should now boot OpenWrt! (sometimes the boot process takes a bit
longer due to the watchdog resetting the device before the watchdog driver runs)
Signed-off-by: Marco von Rosenberg <marcovr@selfnet.de>
'CONFIG_NET_AIROHA_FLOW_STATS=y' currently breaks NPU
offload for AN7581+MT7996, so disable it for now.
Signed-off-by: Kenneth Kasilag <kenneth@kasilag.me>
Link: https://github.com/openwrt/openwrt/pull/22300
Signed-off-by: Christian Marangi <ansuelsmth@gmail.com>
Introduce the capability to read the firmware binary names from device-tree
using the firmware-name property if available.
This is a preliminary patch to enable NPU offloading for MT7996 (Eagle)
chipset since it requires a different binary with respect to the one
used for MT7992 on the EN7581 SoC.
Signed-off-by: Lorenzo Bianconi <lorenzo@kernel.org>
Link: https://github.com/openwrt/openwrt/pull/22289
Signed-off-by: Christian Marangi <ansuelsmth@gmail.com>
Initialize NPU Block Ack memory region if reserved via DTS.
Block Ack memory region is used by NPU MT7996 (Eagle) offloading.
Signed-off-by: Lorenzo Bianconi <lorenzo@kernel.org>
Link: https://github.com/openwrt/openwrt/pull/22289
Signed-off-by: Christian Marangi <ansuelsmth@gmail.com>
Add pending patch for improving Huawei MA5671a SFP fixup, which allows
communicating with the module even if the fiber isn't connected.
Link: https://github.com/openwrt/openwrt/pull/22283
Signed-off-by: Álvaro Fernández Rojas <noltari@gmail.com>
Even though these are disabled, dtc still warns on missing reg and
ranges.
Add them. No real difference as it's disabled anyway.
Signed-off-by: Rosen Penev <rosenp@gmail.com>
Link: https://github.com/openwrt/openwrt/pull/20990
Signed-off-by: Robert Marko <robimarko@gmail.com>
Bump compat version to 3.0 for TP-Link RE355 v1, RE450 v1 and RE450 v2.
Was missed for 25.12; users upgrading from older images need sysupgrade -F.
Signed-off-by: Ivan Diaz <diaz.it@icloud.com>
Link: https://github.com/openwrt/openwrt/pull/22185
Signed-off-by: Robert Marko <robimarko@gmail.com>
Misaligned rootfs_data caused config loss on sysupgrade. Set BLOCKSIZE
:= 4k for proper JFFS2 alignment. Add DEVICE_COMPAT_MESSAGE for
sysupgrade -F requirement.
Signed-off-by: Ivan Diaz <diaz.it@icloud.com>
Link: https://github.com/openwrt/openwrt/pull/22185
Signed-off-by: Robert Marko <robimarko@gmail.com>
Rename Device/tplink_rex5x-v1 to tplink_rex5x. Make RE355 v1, RE450 v1,
and RE450 v2 inherit from it, removing duplicated fields from RE450 v2.
Signed-off-by: Ivan Diaz <diaz.it@icloud.com>
Link: https://github.com/openwrt/openwrt/pull/22185
Signed-off-by: Robert Marko <robimarko@gmail.com>
Refresh kernel patches with make target/linux/refresh for each target.
Signed-off-by: Jonas Jelonek <jelonek.jonas@gmail.com>
Link: https://github.com/openwrt/openwrt/pull/22206
Signed-off-by: Robert Marko <robimarko@gmail.com>
The single user of the downstream gpio-cascade driver has been switched
to use the upstream gpio-line-mux driver. Thus, we can drop the former
now.
Signed-off-by: Jonas Jelonek <jelonek.jonas@gmail.com>
Link: https://github.com/openwrt/openwrt/pull/22206
Signed-off-by: Robert Marko <robimarko@gmail.com>
The GPIO cascade driver is a downstream-only driver and the Buffalo
WZR-HP-G300NH is its only user for now. Recently, a similar and
independently developed driver 'gpio-line-mux `which serves the same
purpose was accepted upstream and backported here. Use that instead the
downstream driver.
Signed-off-by: Jonas Jelonek <jelonek.jonas@gmail.com>
Link: https://github.com/openwrt/openwrt/pull/22206
Signed-off-by: Robert Marko <robimarko@gmail.com>
Backport the upstream 'gpio-line-mux' driver which allows to provide a
1-to-many mapping between one physical GPIO and multiple virtual GPIOs,
based on a multiplexer.
For this purpose, there's been a dedicated downstream driver
'gpio-cascade' which is mostly the same, but wasn't upstreamed in the
end. Independently developed, the 'gpio-line-mux' driver was upstreamed
to solve the exact same problem occuring on Realtek-based Zyxel XS1930
switches. Support for those is being worked on, but the hardware uses a
similar quirk for SFP signals. The signals 'RX_LOS', 'MOD_ABS' and
'TX_FAULT' do not have dedicated GPIOs each but all use a single GPIO
which is multiplexed. Depending on the multiplexer state the GPIO line is
connected to one of the signals.
Since the SFP driver needs single GPIOs for the single signals, this
adapter drivers fills the gap to make both work together.
Signed-off-by: Jonas Jelonek <jelonek.jonas@gmail.com>
Link: https://github.com/openwrt/openwrt/pull/22206
Signed-off-by: Robert Marko <robimarko@gmail.com>
Add ubi nvmem driver, required to load nvmem entries from ubi volumes
Signed-off-by: Dirk Buchwalder <buchwalder@posteo.de>
Link: https://github.com/openwrt/openwrt/pull/22151
Signed-off-by: Christian Marangi <ansuelsmth@gmail.com>
Enable fitblk driver, required to parse the fit image and set-up the rootfs volume
Signed-off-by: Dirk Buchwalder <buchwalder@posteo.de>
Link: https://github.com/openwrt/openwrt/pull/22151
Signed-off-by: Christian Marangi <ansuelsmth@gmail.com>
Due to issues surrounding the implementation of the vendor BMT/BBT
on Airoha, upstream ATF + uboot has switched to UBI flash partitions.
However, some devices shipped on this platform are bootloader locked,
and thus it is impossible to replace ATF + uboot.
During testing for the Gemtek W1700K (#17869), sysupgrades from Linux
(which is unaware of the underlying BMT/BBT) would occasionally write
data into blocks which were remapped by the vendor uboot when it was
read on the following reboot, causing a soft brick.
An acceptable workaround [1],[2] was discussed where an intermediate
uboot would be written by the vendor uboot (which is aware of Airoha
BMT/BBT). This chainloader would then ignore the regions of flash
used by the vendor uboot, and store all relevant data inside of UBI.
UBI would then be used to handle bad block management. As the vendor
ATF + uboot do not read or interact with the UBI region, we would avoid
unwanted remaps from BMT/BBT.
This commit introduces support for building such a chainloader, by
packaging u-boot and DTS into a FIT image; to be flashed like a kernel.
Configuration for the Gemtek W1700K is provided as an example of how the
chainloader is used.
[1] https://github.com/openwrt/openwrt/pull/17869#discussion_r2836066746
[2] https://github.com/openwrt/openwrt/pull/17869#discussion_r2838395671
Signed-off-by: Kenneth Kasilag <kenneth@kasilag.me>
[ move FIP_COMPRESS to Build/Compile, wrap some long lines ]
Link: https://github.com/openwrt/openwrt/pull/22151
Signed-off-by: Christian Marangi <ansuelsmth@gmail.com>
Add a backport patch of realtek ecc driver which has been accepted
upstream. It enables us to make use of devices with NAND that have
OOB size larger than 64 and utilize Realtek ECC engine in OpenWrt.
Signed-off-by: Rustam Adilov <adilov@tutamail.com>
Link: https://github.com/openwrt/openwrt/pull/22243
Signed-off-by: Robert Marko <robimarko@gmail.com>
The attributes "is2G5" and "is10G" are set but never used. Drop them.
Signed-off-by: Markus Stockhausen <markus.stockhausen@gmx.de>
Link: https://github.com/openwrt/openwrt/pull/22255
Signed-off-by: Robert Marko <robimarko@gmail.com>
Adapt the prefix of the port structure.
Signed-off-by: Markus Stockhausen <markus.stockhausen@gmx.de>
Link: https://github.com/openwrt/openwrt/pull/22255
Signed-off-by: Robert Marko <robimarko@gmail.com>
pcs is currently a standalone array for the pcs of each port.
Convert it to an attribute of the port structure and thus move
it where it belongs.
Signed-off-by: Markus Stockhausen <markus.stockhausen@gmx.de>
Link: https://github.com/openwrt/openwrt/pull/22255
Signed-off-by: Robert Marko <robimarko@gmail.com>
Enable Kernel Address Space Layout Randomization (KASLR) on the MT7622
platform. Note that this requires the bootloader to provide the kaslr-seed!
Signed-off-by: Daniel Golle <daniel@makrotopia.org>
Enable Kernel Address Space Layout Randomization (KASLR) on the MT7622
platform. Note that this requires the bootloader to provide the kaslr-seed!
Signed-off-by: Daniel Golle <daniel@makrotopia.org>
Replace the downstream mtk-rng-v2 driver which was acquires random bytes
from TF-A via SMC. A new approach is needed as TF-A for MT7986 has
changed and now requires to use SMC instead of directly accessing the
TRNG via MMIO. However, we can't know whether we are on old or new TF-A,
many devices (like the BananaPi BPi-R3) allow updating TF-A BL3 in the
field, so it may be of the old or new type, and the RNG driver will have
to figure it out somehow.
This currently means that MT7986 with newer TF-A has broken/non-working
HWRNG in Linux:
root@OpenWrt:~# hexdump -C /dev/hwrng
hexdump: /dev/hwrng: I/O error
Fix this by creating a new combined driver which replaces the previous
mtk-rng-v2 driver, and is able to auto-detect which convention to use
on MT7986.
Signed-off-by: Daniel Golle <daniel@makrotopia.org>
The MeshPoint.One was disabled during the DSA migration with the
comment "Missing DSA Setup". However, this device inherits its
entire network configuration from 8dev Jalapeno via the
Device/8dev_jalapeno-common template, and shares the same DSA
network setup in 02_network.
The Jalapeno has been working with DSA since the migration. All
MeshPoint.One board support files (DTS, network config, LED config)
are already in place and reference the same QCA8072 switch
configuration as the Jalapeno.
Hardware: Qualcomm IPQ4018, QCA8072 switch, same as 8dev Jalapeno.
Tested: Built firmware from current main branch, boots and network
functions correctly.
Signed-off-by: Valent Turkovic <valent@meshpointone.com>
Link: https://github.com/openwrt/openwrt/pull/22258
Signed-off-by: Robert Marko <robimarko@gmail.com>
Some MT7621 devices also have I2C peripherals.
Signed-off-by: Shiji Yang <yangshiji66@outlook.com>
Link: https://github.com/openwrt/openwrt/pull/22213
Signed-off-by: Robert Marko <robimarko@gmail.com>
rtldsa_get_mib_desc() is always well defined and only looks into
the configuration structure. Drop it and use direct data assignment
where needed. While we are here drop all NULL checks because
mib_desc is never unset.
Signed-off-by: Markus Stockhausen <markus.stockhausen@gmx.de>
Link: https://github.com/openwrt/openwrt/pull/22219
Signed-off-by: Robert Marko <robimarko@gmail.com>
The device specific mib descriptors are located in dsa.c and
rtldsa_get_mib_desc() selects the right decriptor for the caller
based on family_id from the private structure. That makes not
much sense and is not wanted
Move the descriptors into their corresponding files and link
them directly to the config structure. Simplify the selector
by directly returning the linked data.
Signed-off-by: Markus Stockhausen <markus.stockhausen@gmx.de>
Link: https://github.com/openwrt/openwrt/pull/22219
Signed-off-by: Robert Marko <robimarko@gmail.com>
The "ports" node was renamed. Update driver to match device-tree.
Cc: Markus Stockhausen <markus.stockhausen@gmx.de>
Fixes: 63729a8d6e ("realtek: dts: replace ports by ethernet-ports")
Signed-off-by: Bjørn Mork <bjorn@mork.no>
Link: https://github.com/openwrt/openwrt/pull/22242
Signed-off-by: Robert Marko <robimarko@gmail.com>
This access point is a ‘friend’ of the T56 supplied by Odido but with DDR3 RAM and with two Ethernet 2.5 (GPY211)
The flash procedure is similar to other Zyxel T56/EX5600/EX5601
If you need backup please use the T56 guide
Please refer to https://openwrt.org/inbox/toh/zyxel/wx5600-t0 for detailed flash informations
Specifications:
SOC: MT7986b
RAM: 512MB
Flash: 512 MB SPI NAND
Ports: 2 LAN 2.5Gbps (GPY211C)
WIFI: MT7976GN + MT7976AN
LED: 3 bicolor LED - 1 monocolor LED
Buttons: Reset and WPS
We can install all with U-boot and mtk_uartboot.
Load Uboot:
```
./mtk_uartboot -a -p ./mt7986-ram-ddr3-bl2.bin -s /dev/ttyUSB0 -f openwrt-mediatek-filogic-zyxel_wx5600-t0-ubootmod-bl31-uboot.fip
```
**WARNING: Please use a GBIT ethernet or force it on system**
**WARNING: Please use only LAN2 port in Uboot**
Press 0 on Bootmenu
```
mtd erase ubi
run ubi_format
bootmenu
```
Load and write BL2 and U-boot:
```
8
7
```
Load and write recovery and production
```
6
5
```
Signed-off-by: Valerio 'ftp21' Mancini <ftp21@ftp21.eu>
Co-authored-by: Hal Martin <halmartin@gmail.com>
Link: https://github.com/openwrt/openwrt/pull/18364
Signed-off-by: Christian Marangi <ansuelsmth@gmail.com>
This STC8 microcontroller is used on a range of Hasivo managed switches.
It typically performs some fan/thermal control, and also has some
discrete IO hanging off of it.
The fan/thermal control is still somewhat unknown at this stage, but the
LED / gpio control has been determined as being two I2C registers which
need to be written to with a 'typical' Hasivo 0x40 execute mask set, to
change values.
Rather than having this expose the LED functionality / thermal control
directly, just represent it as an mfd, with some configurable OR'ing of
an execute-bit to certain registers (execute-bit-regs). This way different
STC8 arrangements can hopefully be handled by devicetree configs rather
than needing new driver code.
Signed-off-by: Bevan Weiss <bevan.weiss@gmail.com>
Link: https://github.com/openwrt/openwrt/pull/21578
Signed-off-by: Hauke Mehrtens <hauke@hauke-m.de>
Add the unnamed partition between rwfs and reservearea to fully describe
the flash layout.
Signed-off-by: Ahmed Naseef <naseefkm@gmail.com>
Link: https://github.com/openwrt/openwrt/pull/22195
Signed-off-by: Hauke Mehrtens <hauke@hauke-m.de>
The 2.4 GHz and 5 GHz WiFi eeprom cell references were assigned to the
wrong PCIe slots. Swap them so slot0 (2.4 GHz) uses the eeprom at
0x1c0000 and slot1 (5 GHz) uses the eeprom at 0x40000. Fix the eeprom
cell lengths to match the sizes expected by their respective drivers.
Fixes: be24a13ad5 ("econet: en7528: add PCIe and WiFi support")
Signed-off-by: Ahmed Naseef <naseefkm@gmail.com>
Link: https://github.com/openwrt/openwrt/pull/22195
Signed-off-by: Hauke Mehrtens <hauke@hauke-m.de>
The sys_led node in the device tree is wrong and doesn't work. On GPIO
23 nothing seems to be connected. The switch has a SYS LED but as with a
lot other Realtek switches, this LED is connected to the pin A0, which
can be driven as GPIO0 or system LED. The hardware-assisted behavior is
configured during boot by u-boot.
Though it is be possible to deactivate the hardware-assisted behavior
and give userspace control over the LED, it doesn't work for this
switch. XikeStor apparently decided to hook the SYS LED to some kind of
external watchdog. This one seems to expect a LOW signal on that line
periodically. This leaves room for two options:
1) keep behavior and let the LED blink as configured by u-boot
2) turn off LED completely
Option 2) is rather odd and may confuse users, thus it is better to keep
the behavior as-is for now. u-boot configures the LED to blink fast
which might be annoying. As soon as we have a way in the device tree to
specify different blinking frequencies as supported by the hardware,
this can be smoothened.
Signed-off-by: Jonas Jelonek <jelonek.jonas@gmail.com>
Link: https://github.com/openwrt/openwrt/pull/22211
Signed-off-by: Hauke Mehrtens <hauke@hauke-m.de>
The XikeStor SKS8310-8X has a monitoring IC LM75B from National
Instruments on board. This was missed when support for the device was
added. Add it now and also add the corresponding kmod to the device
packages.
Fixes: 62d50fb196 ("realtek: add support for XikeStor SKS8310-8X")
Signed-off-by: Jonas Jelonek <jelonek.jonas@gmail.com>
Link: https://github.com/openwrt/openwrt/pull/22211
Signed-off-by: Hauke Mehrtens <hauke@hauke-m.de>
Define an nvmem cell in the device tree of XikeStor SKS8310-8X to
reference that as a source for the MAC address of the switch (ports).
This eliminates the need for the userspace script to read and parse the
MAC address.
Signed-off-by: Jonas Jelonek <jelonek.jonas@gmail.com>
Link: https://github.com/openwrt/openwrt/pull/22211
Signed-off-by: Hauke Mehrtens <hauke@hauke-m.de>
rtmdio_probe() uses for_each_phy() to access dn[]. This will point
to initialized entries. No need to clear that array in advance.
Signed-off-by: Markus Stockhausen <markus.stockhausen@gmx.de>
Link: https://github.com/openwrt/openwrt/pull/22131
Signed-off-by: Hauke Mehrtens <hauke@hauke-m.de>
Get rid of the port variables. Use addr for phy address like
upstream kernel does for the whole phy/mdio subsystem.
Signed-off-by: Markus Stockhausen <markus.stockhausen@gmx.de>
Link: https://github.com/openwrt/openwrt/pull/22131
Signed-off-by: Hauke Mehrtens <hauke@hauke-m.de>
As with all the rest align the define to reflect that the
driver deals with phys.
Signed-off-by: Markus Stockhausen <markus.stockhausen@gmx.de>
Link: https://github.com/openwrt/openwrt/pull/22131
Signed-off-by: Hauke Mehrtens <hauke@hauke-m.de>
For some functions the mmd access parameter naming differs
from the rest of the driver. Convert remaining addr/reg
parameters to devnum/regnum.
Signed-off-by: Markus Stockhausen <markus.stockhausen@gmx.de>
Link: https://github.com/openwrt/openwrt/pull/22131
Signed-off-by: Hauke Mehrtens <hauke@hauke-m.de>
The driver covers phys and not ports. Adapt the iterator to
align with this naming convention. While we are here convert
some open coding to this iterator macro.
Signed-off-by: Markus Stockhausen <markus.stockhausen@gmx.de>
Link: https://github.com/openwrt/openwrt/pull/22131
Signed-off-by: Hauke Mehrtens <hauke@hauke-m.de>
The mdio driver is about phys and not about the (dsa) port number
of the cpu. This was a generic alias when all of this was part
of a big large mdio/ethernet driver. Give the cpu_port variable
a new name that better fits to the mdio context.
Signed-off-by: Markus Stockhausen <markus.stockhausen@gmx.de>
Link: https://github.com/openwrt/openwrt/pull/22131
Signed-off-by: Hauke Mehrtens <hauke@hauke-m.de>
In most drivers upstream use "ethernet-ports" instead of "ports"
in dts. Especially the upstream rtl9300 mdio driver uses this to
lookup the port/phy mapping. Do the same downstream. There is no
need to adapt the dsa driver because it scans the dts via
for_each_node_by_name(dn, "port").
Signed-off-by: Markus Stockhausen <markus.stockhausen@gmx.de>
Link: https://github.com/openwrt/openwrt/pull/22149
Signed-off-by: Hauke Mehrtens <hauke@hauke-m.de>
There are a number of pse chips already present in upstream Linux.
OpenWrt is starting to support a number of devices can contain various pse
chips. But having all the pse chip combinations defined at the target
level will result in bloat on images.
Present the current upstream Linux pse drivers as packages so that they
can be selectively included per board (rather than per target).
Signed-off-by: Bevan Weiss <bevan.weiss@gmail.com>
[Make it depend on REGULATOR_SUPPORT, and !SMALL_FLASH]
Link: https://github.com/openwrt/openwrt/pull/22172
Signed-off-by: Robert Marko <robimarko@gmail.com>
Add some additional Gateworks Venice boards to sysupgrade support.
Signed-off-by: Tim Harvey <tharvey@gateworks.com>
Link: https://github.com/openwrt/openwrt/pull/22202
Signed-off-by: Robert Marko <robimarko@gmail.com>
The device has 1 100MBit/s port. By default the PHY firmware is running
in 1GBit/s mode. The driver will try to load the 1GBit/s firmware and
fail if it is not there. Set the GPHY0 also to 100MBit/s mode.
The driver uses all nodes independent of the status attribute.
Do the same fix for AVM FRITZ!Box 7412 too.
Reported-by: Achelon in OpenWrt forum
Fixes: https://github.com/openwrt/openwrt/issues/21836
Link: https://github.com/openwrt/openwrt/pull/22188
Signed-off-by: Hauke Mehrtens <hauke@hauke-m.de>
So far we are only associating and using a VLAN profile ID of 0 to any
VLAN ID, VLAN profile ID 1 is unused. Therefore we can safely remove its
initialization, just like we don't initialize any of VLAN profile IDs
2 to 7 on rtl83xx/rtl930x or 2 to 15 on rtl931x.
Signed-off-by: Linus Lüssing <linus.luessing@c0d3.blue>
Link: https://github.com/openwrt/openwrt/pull/21872
Signed-off-by: Robert Marko <robimarko@gmail.com>
The special all-ports multicast portmasks table entry would be written
twice, redundantly as vlan_profile_setup() is called twice. Which is
unnecessary. Writing this reserved multicast portmask entry is
independent of a VLAN profile, therefore let's move this to a more
suitable position.
Signed-off-by: Linus Lüssing <linus.luessing@c0d3.blue>
Link: https://github.com/openwrt/openwrt/pull/21872
Signed-off-by: Robert Marko <robimarko@gmail.com>
Prepare portmasks, vlan profiles and vlans for changes
in upcoming patches by exporting them to debugfs for easier
debugging and monitoring.
Signed-off-by: Linus Lüssing <linus.luessing@c0d3.blue>
Link: https://github.com/openwrt/openwrt/pull/21872
Signed-off-by: Robert Marko <robimarko@gmail.com>
Advertise the default 'not set' of this CONFIG higher in the tree since
it's already referenced by several other targets, with a few more targets
missing this reference (which fails build to prompt for N/y/m).
Signed-off-by: Bevan Weiss <bevan.weiss@gmail.com>
Make use of the new fast_age() helpers for the RTL83xx targets.
For this:
- split the existing rtldsa_83xx_fast_age() into two device
specific functions. This removes a family_id check.
- change the callbacks in the config structures
Signed-off-by: Markus Stockhausen <markus.stockhausen@gmx.de>
Link: https://github.com/openwrt/openwrt/pull/22145
Signed-off-by: Robert Marko <robimarko@gmail.com>
The driver has a generic fast_age() function. Use it in the
dsa specific callback port_fast_age() for RTL93xx.
Signed-off-by: Markus Stockhausen <markus.stockhausen@gmx.de>
Link: https://github.com/openwrt/openwrt/pull/22145
Signed-off-by: Robert Marko <robimarko@gmail.com>
Fast ageing of L2 entries is supported by DSA with two callbacks.
- port_fast_age(): age out for one port
- port_vlan_fast_age(): age out for one vlan on one port
Independent from the SoC it always boils down to issue a command
to the L2_TBL_FLUSH_CTRL register. Nevertheless the current
implemententation is repeated multiple times and makes use of
the family_id.
As a first refactoring step provide generic fast_age() functions
for RTL930x and RTL931x by rearranging the existing definitions
of vlan_port_fast_age().
The logic is as follows:
- provide a SoC dependent function that works with or without VLAN.
When VLAN/VID = -1 only flush the specific port otherwise only
flush given VLAN on port.
- provide a port_fast_age() helper that calls the SoC specific
functions with VLAN = -1.
- provide a port_vlan_fast_age() helper that calls the SOC specific
functions and handing over the given VLAN.
Signed-off-by: Markus Stockhausen <markus.stockhausen@gmx.de>
Link: https://github.com/openwrt/openwrt/pull/22145
Signed-off-by: Robert Marko <robimarko@gmail.com>
This is a preparation for the dsa fast_age() logic refactoring.
Rename two functions that will get removed later.
Signed-off-by: Markus Stockhausen <markus.stockhausen@gmx.de>
Link: https://github.com/openwrt/openwrt/pull/22145
Signed-off-by: Robert Marko <robimarko@gmail.com>
Remove defines and variables that are no longer used.
Signed-off-by: Markus Stockhausen <markus.stockhausen@gmx.de>
Link: https://github.com/openwrt/openwrt/pull/22156
Signed-off-by: Robert Marko <robimarko@gmail.com>
rteth_hw_receive() already has a loop that checks how much work
may be done. No need to repeat that in the caller too. While we
are here adapt the function prefix.
Signed-off-by: Markus Stockhausen <markus.stockhausen@gmx.de>
Link: https://github.com/openwrt/openwrt/pull/22156
Signed-off-by: Robert Marko <robimarko@gmail.com>
With latest refactoring irq activation and deactivation is side-by-side
in the code. This makes it easier to align these functions. Current
assumption is, that the ethernet irq is only called on one cpu and
napi handling does not interfere. So it should be totally fine to
run irq disabling (called from interrupt handler) without locks.
Nevertheless be defensive and add a lock(). So in the case the ethernet
irq is fired twice on two cpus (e.g. RTL931x) the code is on the
safe side.
Signed-off-by: Markus Stockhausen <markus.stockhausen@gmx.de>
Link: https://github.com/openwrt/openwrt/pull/22156
Signed-off-by: Robert Marko <robimarko@gmail.com>
Once again there is a family_id check. This time around the irq
reactivation in the receive path. For cleanup and better readability
add a helper directly besides its already existing counterpart
rteth_confirm_and_disable_irqs(). With that drop unneeded defines.
Signed-off-by: Markus Stockhausen <markus.stockhausen@gmx.de>
Link: https://github.com/openwrt/openwrt/pull/22156
Signed-off-by: Robert Marko <robimarko@gmail.com>
This reverts commit 9dbd45c187.
Compared to ralink,mtd-eeprom , the nvmewm binding ends up byteswapping
the data on big endian hosts. Meaning on big endian, the nvmwem binding
is equivalent to:
ralink,mtd-eeprom +
ralink,eeprom-wrap
Revert as a result since there's no eeprom-swap here.
Signed-off-by: Rosen Penev <rosenp@gmail.com>
Link: https://github.com/openwrt/openwrt/pull/22192
Signed-off-by: Robert Marko <robimarko@gmail.com>
CONFIG_REGULATOR_QCOM_LABIBB is being disabled by targets manually, so
instead lets disable it in generic config.
Signed-off-by: Robert Marko <robimarko@gmail.com>
Instead of disabling CONFIG_REGULATOR_QCOM_SPMI manually per target,
lets simply disable it in generic config.
Signed-off-by: Robert Marko <robimarko@gmail.com>
CONFIG_REGULATOR_QCOM_USB_VBUS showed up on Layerscape recently, and it
looks like multiple targets disable it manually, so simply disable it in
generic configuration instead.
Signed-off-by: Robert Marko <robimarko@gmail.com>
Enable and configure DMA contiguous memory allocator. Without this
CMA itself will be disabled.
Fixes: ae8bf1a26e ("imx: add imx8m support")
Signed-off-by: Tim Harvey <tharvey@gateworks.com>
Link: https://github.com/openwrt/openwrt/pull/21950
Signed-off-by: Robert Marko <robimarko@gmail.com>
The configuration for the dlink,dir-1360-a1 also changed the settings
for the devices defined on top of it. "lan1 lan2 lan3 lan4" "wan" is
the default configuration, no need to add it here.
Fixes: 7a8e2efed5 ("ramips: add support for D-Link DIR-1360 A1")
Reported-by: schmars in IRC
Link: https://github.com/openwrt/openwrt/pull/22179
Signed-off-by: Hauke Mehrtens <hauke@hauke-m.de>
Userspace handling is deprecated. Once mac-base goes upstream, the patch
itself can go upstream as well.
Signed-off-by: Rosen Penev <rosenp@gmail.com>
Link: https://github.com/openwrt/openwrt/pull/22058
Signed-off-by: Robert Marko <robimarko@gmail.com>
Use clock index macros defined in dt-bindings header to improve the
code readability.
Signed-off-by: Shiji Yang <yangshiji66@outlook.com>
Link: https://github.com/openwrt/openwrt/pull/22163
Signed-off-by: Robert Marko <robimarko@gmail.com>
The GPIO line connecting to the reset signals of the GS1900-24E(A1)'s
external ICs (RTL8218B phys and RTL8231 expander) cannot be asserted by
the MDIO subsystem, as the reset is shared between busses.
To prevent users from accidentally asserting the reset line, a GPIO hog
is created to permanently de-assert the signal, reliably keeping the
phys and GPIO expanders on.
Tested-by: Simon Fischer <simi.fischa@gmail.com>
Signed-off-by: Sander Vanheule <sander@svanheule.net>
The reset line wired to the RTL8231 on the GS1900 series may also
connect to other external ICs on the board. On the GS1900-24E, the
reset line is wired (via buffers) to the board's RTL8231 expanders and
the RTL8218 phys. As these external devices (phys) are on different
busses, the reset line shouldn't be specified on one bus or the other.
Drop the reset specification from the generic GPIO description, so it
can be added back on a per-device basis after confirming the behavior.
Link: https://github.com/openwrt/openwrt/issues/18620
Fixes: fd978c2e80b4 ("realtek: Enable Zyxel GS1900's RTL8231 reset line")
Signed-off-by: Sander Vanheule <sander@svanheule.net>
The DASAN H660GM-A GPON ONT exists in two hardware variants, one
distributed by ISPs and one sold directly by the manufacturer [1].
Split the single DTS into a shared dtsi and per-variant DTS files
with the correct GPIO mappings, flash layout, and LED definitions.
Variant comparison:
Feature | Airtel | Generic
---------------+---------------------------+-------------------------
Supplied by | Airtel Xstream Fiber | Retail
Flash | Micron MT29F2G01ABAGD | Micron MT29F1G01ABAFD
| 256 MB | 128 MB
Known P/N | DPW-G-P-66GMAZ-A3 | DPW:G-P-660GMAY-G0
| (some units unlabelled) | DPW:G-P-660GMAY-G3
WPS LED | Yes | No
WLAN button | No | Yes
USB LED | No | Yes
LAN LEDs | Green only | Green + Amber
[1] https://dasanns.com/en/solution/detail.php?mode=view&cat_no=32&offset=&idx=122
Tested-by: Arif Rahman Hakim <arif2785id@gmail.com>
Signed-off-by: Ahmed Naseef <naseefkm@gmail.com>
Link: https://github.com/openwrt/openwrt/pull/22095
Signed-off-by: Hauke Mehrtens <hauke@hauke-m.de>
On MT7620-class platforms (CONFIG_NET_RALINK_MT7620) we observe sporadic
wrong-jump-targets, kernel oopses, hanging, corrupted backtraces or even
"half-written" instructions when the compiler emits a direct 'jal imm26'
call.
This is triggered in:
- the small random helpers inside get_random_u32_below(), and
- the blkcg_maybe_throttle_current() call in resume_user_mode_work().
This patch forces those two call sites to use an indirect call via
a volatile function pointer (load into register + jalr) when building
for MT7620, avoiding embedding a 26-bit immediate jump target.
Additionally, on MT7620 builds the exec path in fs/exec.c is modified:
- skip arch_align_stack() + PAGE_ALIGN() in setup_arg_pages()
because the micro-randomization (< PAGE_SIZE) implemented by many
ports (including MT7620) is negated immediately by PAGE_ALIGN().
Skipping the redundant PAGE_ALIGN() reduces exposure to the
problematic code pattern.
These changes are targeted workarounds for MT7620; behavioral logic is unchanged.
Signed-off-by: Mieczyslaw Nalewaj <namiltd@yahoo.com>
Link: https://github.com/openwrt/openwrt/pull/20553
Signed-off-by: Robert Marko <robimarko@gmail.com>
Instead of redifining the DEVICE_PACKAGES, make sure to expand the list
so yafut is included by default as well.
Fixes: 42cd486787 ("ath79: remove kmod-ath9k and wpad from Mikrotik RB750r2")
Signed-off-by: Robert Marko <robimarko@gmail.com>
The KSZ9477 driver was added to the cortexa53 kernel to support the
Gateworks Venice product family which has a board with this switch. Now
that the kmod-dsa-ksz9477 driver is available as a package remove the
static configuration ad add the package.
This resolves an issue caused by having the switch driver static and the
PHY driver as a module such that the PHY driver was not registered early
enough to be used causing some errata to not be worked around.
Signed-off-by: Tim Harvey <tharvey@gateworks.com>
Link: https://github.com/openwrt/openwrt/pull/22120
Signed-off-by: Robert Marko <robimarko@gmail.com>
The makefile recipe is wrong and a module compilation tries
to build each object individually. Fix that. This allows to
build the dsa driver as a module.
Suggested-by: Balázs Triszka <info@balika011.hu>
Signed-off-by: Markus Stockhausen <markus.stockhausen@gmx.de>
Link: https://github.com/openwrt/openwrt/pull/22121
Signed-off-by: Robert Marko <robimarko@gmail.com>
The ethernet driver has a hard link to the dsa driver. Especially
the setup_tc() function must be available when the driver loads.
Decouple it by using a dsa callback recipe.
Suggested-by: Balázs Triszka <info@balika011.hu>
Signed-off-by: Markus Stockhausen <markus.stockhausen@gmx.de>
Link: https://github.com/openwrt/openwrt/pull/22121
Signed-off-by: Robert Marko <robimarko@gmail.com>
We do not want to rely on the soc_info structure. But at the moment
it is still referenced in several places. Add an EXPORT() to it.
So drivers that need access to this structure can be build as modules.
Suggested-by: Balázs Triszka <info@balika011.hu>
Signed-off-by: Markus Stockhausen <markus.stockhausen@gmx.de>
Link: https://github.com/openwrt/openwrt/pull/22121
Signed-off-by: Robert Marko <robimarko@gmail.com>
The RB750r2 (HEXLite) does not have wifi and those packages bloat the image
by a significant amount. When building a custom image with WireGuard and
booting that from initramfs, there wasn't enough space left in tmpfs to
upload and flash the squashfs image. Investigating what packages I could
remove, I discovered these unneeded ones.
Signed-off-by: Eicke Herbertz <wolletd@posteo.de>
Link: https://github.com/openwrt/openwrt/pull/22134
Signed-off-by: Robert Marko <robimarko@gmail.com>
Given that Linksys is the same brand and probably use the same OEM, it
stands to reason all devinfo hw_mac_addr implementations are the same.
Signed-off-by: Rosen Penev <rosenp@gmail.com>
Link: https://github.com/openwrt/openwrt/pull/22092
Signed-off-by: Robert Marko <robimarko@gmail.com>
Userspace handling is deprecated. NVMEM allows more flexibility in terms
of exotic setups while keeping correct MAC addresses.
env-size taken from file in uboot-envtools.
Signed-off-by: Rosen Penev <rosenp@gmail.com>
Link: https://github.com/openwrt/openwrt/pull/22107
Signed-off-by: Robert Marko <robimarko@gmail.com>
Userspace handling is deprecated. NVMEM allows flexibility in terms of
exotic setups by avoiding random MAC addresses.
u-boot env-size taken from the entry in uboot-envtools
Signed-off-by: Rosen Penev <rosenp@gmail.com>
Link: https://github.com/openwrt/openwrt/pull/22107
Signed-off-by: Robert Marko <robimarko@gmail.com>
Backport patches from upstream linux and mtk-openwrt-feeds to fix
MT7981 register offset issue and correct MT798x IES register config.
Signed-off-by: Shiji Yang <yangshiji66@outlook.com>
Link: https://github.com/openwrt/openwrt/pull/21423
Signed-off-by: Hauke Mehrtens <hauke@hauke-m.de>
The banana pi r4 comes with 2 sfp+ ports running at 10gbps
Readd support for aquantia sfp+ modules that was removed by
57a127c9e7Closes: #19878
Signed-off-by: Felix Baumann <felix.bau@gmx.de>
Link: https://github.com/openwrt/openwrt/pull/19884
Signed-off-by: Hauke Mehrtens <hauke@hauke-m.de>
Avoid a family_id check and derive the values from the cpu port.
Signed-off-by: Markus Stockhausen <markus.stockhausen@gmx.de>
Link: https://github.com/openwrt/openwrt/pull/22068
Signed-off-by: Hauke Mehrtens <hauke@hauke-m.de>
Place it where it belongs.
Signed-off-by: Markus Stockhausen <markus.stockhausen@gmx.de>
Link: https://github.com/openwrt/openwrt/pull/22068
Signed-off-by: Hauke Mehrtens <hauke@hauke-m.de>
Place it where it belongs.
Signed-off-by: Markus Stockhausen <markus.stockhausen@gmx.de>
Link: https://github.com/openwrt/openwrt/pull/22068
Signed-off-by: Hauke Mehrtens <hauke@hauke-m.de>
Two different irq handlers exist for RTL83xx and RTL93xx. Basically
they do always the same.
- Check transmit interrupts (not needed anymore)
- Check rx overflow interrupts (not needed anymore)
- Determine rx interrupts and queues that must be processed.
- In case of RTL839x check for L2 interrupts
With all the recent refactoring their logic is more or less the
same. Merge them into one handler. For better readability add a
helper that determines the work (aka rings) that needs to be
processed.
Signed-off-by: Markus Stockhausen <markus.stockhausen@gmx.de>
Link: https://github.com/openwrt/openwrt/pull/22023
Signed-off-by: Hauke Mehrtens <hauke@hauke-m.de>
There is a wrong port assignment for the 4 SFP+ ports
on that device. Additionally the transmit polarity
change option was missed. Fix that.
Fixes: f88135b ("realtek: add support for Linksys LGS352C")
Signed-off-by: Markus Stockhausen <markus.stockhausen@gmx.de>
Link: https://github.com/openwrt/openwrt/pull/22119
Signed-off-by: Robert Marko <robimarko@gmail.com>
RTL931x organizes MACs into 12 groups (one per SerDes) that must be
explicitly enabled before link establishment. Without initialization,
link may fail or packets may be corrupted, especially in USXGMII/XSGMII
modes. This is the case for devices which lack initialization by the
bootloader.
Simply enable all MACs in all groups by writing 0xffffffff to the
registers. Unused MACs and reserved bits are harmless, avoiding complex
logic to always set only needed MACs.
This is placed in the PCS driver since the MAC groups are assigned per
SerDes and the DSA driver lacks SerDes awareness (on purpose)
Signed-off-by: Jonas Jelonek <jelonek.jonas@gmail.com>
Link: https://github.com/openwrt/openwrt/pull/22088
Signed-off-by: Robert Marko <robimarko@gmail.com>
Hardware:
- SoC: RTL9313
- Memory: 512MB
- Flash: SPI-NOR 32MB (GigaDevice GD25Q256EFIR)
- Ethernet: 12x 1/2.5/10 Gbps (SFP+)
- LED/Keys (GPIO): 1x/1x
- UART: "Console" port on the front panel
- type: RS-232C
- connector: RJ-45
- settings: 9600n8 / 115200n8
- Watchdog: Diodes PT7A7514WE
- Monitoring: LM75A
- Power: 100-240 VAC 50/60 Hz C13/C14
Important notes:
---------------
* the device uses 9600 Baud by default but this extremely slows down the
device when using the serial console. OpenWrt is configured to use
115200 Baud. If you need to enter the bootloader, you need to use 9600
Baud.
* PT7A7514WE watchdog is fed through hardware-assisted SYS_LED. However,
the bootloader seems to deactivate that again during autoboot. There's
a quirk in early arch setup for this.
* a kernel binary "nos.img" needs to be stored into JFFS2 filesystem
using 4KiB erase block instead of 64KiB.
* V1 is the version with the 19"-sized case. As of 2026, there's a newer
version with a narrow case.
Flash instructions using initramfs image:
-----------------------------------------
(mostly taken from 0dc0b98295)
1. Prepare TFTP server with an IP address in 192.168.2.0/24.
2. Connect your PC to Port 1 on SKS8300-12X.
3. Power on SKS8300-12X and interrupt autoboot by Ctrl + B.
4. Login to the vendor CLI by Ctrl + F and "diagshell_unipoe_env" as password.
5. Switch baudrate to 115200 by running a command and then reconnect
with different settings:
baudrate 115200
6. Switch to U-Boot CLI by "debug_unish_env".
7. Enable Port 1 with the following commands:
rtk 10g 0 fiber1g # (or fiber10g if 10GBase-*R)
rtk ext-devInit 0 # init RTL8231 that holds SFP GPIOs
rtk ext-pinSet 2 0 # set tx-disable of port 1 to LOW
8. Transfer initramfs image via TFTP and boot it:
tftpboot 0x82000000 <serverip>:<image name>
bootm 0x82000000
9. On the initramfs image, backup the stock firmware if needed.
10. Upload (or download) sysupgrade image to the device.
11. Erase "firmware" partition to cleanup JFFS2 of stock FW:
mtd erase firmware
12. Perform sysupgrade with the sysupgrade image.
13. Wait until the flash completes and the system reboots into OpenWrt.
Reverting to stock firmware:
----------------------------
(taken from 0dc0b98295)
1. Prepare OpenWrt SDK to use the mkfs.jffs2 tool contained in it
Note: the official mkfs.jffs2 tool in mtd-utils doesn't support 4KiB
erase size and not usable for SKS8300-8X
2. Create a directory for working
3. Download official firmware for SKS8300-8X from XikeStor's official
website
4. Rename the downloaded firmware to "nos.img" and place it to the
working directory
5. Create a JFFS2 filesystem binary with the working directory
/path/to/mkfs.jffs2 -p -b -U -v -e 4KiB -x lzma \
-o nos.img.jffs2 -d /path/to/working/dir/
6. Upload the created JFFS2 filesystem binary to the device
7. Erase the "firmware" partition
mtd erase firmware
8. Write the JFFS2 filesystem binary to the "firmware" partition
mtd write /path/to/nos.img.jffs2 firmware
9. After writing, reboot the device by power cycle
Signed-off-by: Jonas Jelonek <jelonek.jonas@gmail.com>
Link: https://github.com/openwrt/openwrt/pull/21922
Signed-off-by: Hauke Mehrtens <hauke@hauke-m.de>
Make xikestor-nosimg a common recipe in the Makefile to allow usage for
other subtargets too, not only rtl930x.
Signed-off-by: Jonas Jelonek <jelonek.jonas@gmail.com>
Link: https://github.com/openwrt/openwrt/pull/21922
Signed-off-by: Hauke Mehrtens <hauke@hauke-m.de>
On some XikeStor switches (SKS8300-8X, SKS8300-12X), the SYS_LED/GPIO0 is
used to feed an external PT7A7514WE watchdog. While this was no issue on
SKS8300-8X, the bootloader on the SKS8300-12X seems to deactivate the
automatic feeding on purpose by setting the pin function of to GPIO0
instead of SYS_LED. This kills the periodic signal generated on that pin.
This causes the kernel to just stop quite early and reset the system
entirely.
Because this happens very early, it doesn't work to define this as a
pinctrl entry or GPIO hog. The drivers aren't even loaded at that stage.
To work around the issue, we need to configure this in the arch-specific
early setup. An affected device needs to have a corresponding node in
the DTS that is picked up then.
Signed-off-by: Jonas Jelonek <jelonek.jonas@gmail.com>
Link: https://github.com/openwrt/openwrt/pull/21922
Signed-off-by: Hauke Mehrtens <hauke@hauke-m.de>
Use NVMEM in device tree to set the label and eth0 MAC address based on
the U-Boot environment.
Invididual port MAC addresses and bridge MAC are still handled in the
02_network script to maintain the current assignment.
Signed-off-by: Jan Hoffmann <jan@3e8.eu>
Link: https://github.com/openwrt/openwrt/pull/22055
Signed-off-by: Hauke Mehrtens <hauke@hauke-m.de>
This is a preparation to convert some more RTL838x devices to NVMEM.
Signed-off-by: Jan Hoffmann <jan@3e8.eu>
Link: https://github.com/openwrt/openwrt/pull/22055
Signed-off-by: Hauke Mehrtens <hauke@hauke-m.de>
Startup of mdio on a RTL8216 based device currently shows the
following warnings.
[1.948608] skip polling setup for unknown PHY 001ccaf3 on port 0
[1.968920] skip polling setup for unknown PHY 001ccaf3 on port 8
[1.989171] skip polling setup for unknown PHY 001ccaf3 on port 16
[2.009704] skip polling setup for unknown PHY 001ccaf3 on port 20
[2.030209] skip polling setup for unknown PHY 001ccaf3 on port 24
[2.052270] realtek-otto-serdes-mdio 1b000000.switchcore:mdio-serdes:
Realtek SerDes mdio bus initialized, 12 SerDes, 64 pages
Add the phy detection to the mdio bus so that polling setup works.
While we are here sort the phy ids alphabetically.
Signed-off-by: Markus Stockhausen <markus.stockhausen@gmx.de>
Link: https://github.com/openwrt/openwrt/pull/22109
Signed-off-by: Hauke Mehrtens <hauke@hauke-m.de>
This reverts commit 72f43ac220.
The NVMEM codepath does not perform automatic byte conversion. It can be
fixed but the upstream version is quite different from the local
mac80211 patch. Revert until mac80211 gets updated and the whole mess
can get squared away.
Signed-off-by: Rosen Penev <rosenp@gmail.com>
Link: https://github.com/openwrt/openwrt/pull/22091
Signed-off-by: Robert Marko <robimarko@gmail.com>
Make clearer which field belongs to which register. For this
sort the fields below the registers and use indentation.
Signed-off-by: Markus Stockhausen <markus.stockhausen@gmx.de>
Link: https://github.com/openwrt/openwrt/pull/22075
Signed-off-by: Robert Marko <robimarko@gmail.com>
PHY polling setup has found a home in the mdio driver. For RTL931x
there still exists a setup sequence for polling type (serdes/mdio)
in the DSA driver. Put it where it belongs.
Signed-off-by: Markus Stockhausen <markus.stockhausen@gmx.de>
Link: https://github.com/openwrt/openwrt/pull/22075
Signed-off-by: Robert Marko <robimarko@gmail.com>
Get rid of defines that are not used in the driver.
Signed-off-by: Markus Stockhausen <markus.stockhausen@gmx.de>
Link: https://github.com/openwrt/openwrt/pull/22100
Signed-off-by: Robert Marko <robimarko@gmail.com>
This define is used nowhere. Remove it.
Signed-off-by: Markus Stockhausen <markus.stockhausen@gmx.de>
Link: https://github.com/openwrt/openwrt/pull/22100
Signed-off-by: Robert Marko <robimarko@gmail.com>
The MAC_FORCE_MODE_CTRL register is only used for the CPU port.
No need to repeat the port register calculation for each usage.
Simply point to the cpu port register directly.
Signed-off-by: Markus Stockhausen <markus.stockhausen@gmx.de>
Link: https://github.com/openwrt/openwrt/pull/22100
Signed-off-by: Robert Marko <robimarko@gmail.com>
Fixed the compilation of kernel with the loadable modules support turned off
Signed-off-by: Maksim Dmitrichenko <dmitrmax@gmail.com>
Link: https://github.com/openwrt/openwrt/pull/22041
Signed-off-by: Robert Marko <robimarko@gmail.com>
Remove unneeded includes from setup.c and adapt comments.
Signed-off-by: Markus Stockhausen <markus.stockhausen@gmx.de>
Link: https://github.com/openwrt/openwrt/pull/22084
Signed-off-by: Robert Marko <robimarko@gmail.com>
Add missing CONFIG_LEDS_QCOM_LPG symbol.
Signed-off-by: Ahmed Naseef <naseefkm@gmail.com>
Link: https://github.com/openwrt/openwrt/pull/22096
Signed-off-by: Robert Marko <robimarko@gmail.com>
Commit 041ef9648d ("qualcommbe: move Device DTS to dedicated DTS
directory") introduced a dedicated DTS directory and set DEVICE_DTS_DIR
to ../dts as default. This broke the rdp433 device build since its DTS
resides in the kernel tree (applied via patches), not in the target dts
directory.
Fix this by overriding DEVICE_DTS_DIR for rdp433 to point to the kernel
DTS directory.
Fixes: 041ef9648d ("qualcommbe: move Device DTS to dedicated DTS directory")
Signed-off-by: Ahmed Naseef <naseefkm@gmail.com>
Link: https://github.com/openwrt/openwrt/pull/22096
Signed-off-by: Robert Marko <robimarko@gmail.com>
Due to confusing Documentation, the SPI and SLIC base clock and
register location for Airoha AN7583 SoC were wrong.
Fix them with new updated Documentation source to provide correct
clock support.
Fixes: c5b12fc02a ("airoha: Introduce support for Airoha AN7583 SoC")
Signed-off-by: Christian Marangi <ansuelsmth@gmail.com>
Reuse Device/FitImage recipe instead of open coding it and
drop duplicate KERNEL_INITRAMFS recipe for eDPU.
While at it, lets clean up the boot script to drop uneeded console
setting, earlycon etc.
Signed-off-by: Robert Marko <robert.marko@sartura.hr>
Move the Device/FitImage recipe to the generic image Makefile to avoid
duplicating it for other subtargets.
Will be used for uDPU/eDPU.
Signed-off-by: Robert Marko <robert.marko@sartura.hr>
This allows to drop a family condition check and in the future
allows to merge nowadays splitted functions. While we are here
replace a hardcoded 0xc value with the new value for better
readability.
Signed-off-by: Markus Stockhausen <markus.stockhausen@gmx.de>
Link: https://github.com/openwrt/openwrt/pull/21999
Signed-off-by: Robert Marko <robimarko@gmail.com>
There is enough info in the control and config structures to derive
the device specific counter freeing. No need to write two different
functions.
Signed-off-by: Markus Stockhausen <markus.stockhausen@gmx.de>
Link: https://github.com/openwrt/openwrt/pull/21999
Signed-off-by: Robert Marko <robimarko@gmail.com>
Get away with another family check.
Signed-off-by: Markus Stockhausen <markus.stockhausen@gmx.de>
Link: https://github.com/openwrt/openwrt/pull/21999
Signed-off-by: Robert Marko <robimarko@gmail.com>
During transmit the driver must adapt the packet length. The
hardware requires at least a memory space of ETH_ZLEN bytes
data plus four bytes for layer 2 FCS. This was calculated
(somehow) but skb->len never got updated and for the minimum
length a RTL838x specific workaround was in place. Clean up
the code and use skb_put_padto() so the length change gets
reflected in skb->len.
While we are here drop zeroing DSA tag because it will be
overwritten by hardware for FCS.
Signed-off-by: Markus Stockhausen <markus.stockhausen@gmx.de>
Link: https://github.com/openwrt/openwrt/pull/21999
Signed-off-by: Robert Marko <robimarko@gmail.com>
Switch from auto-scan PHY discovery to explicit DT-based registration
using fwnode_mdiobus_register_phy(). This is the standard approach used
by of_mdiobus_register() and most MDIO drivers.
Auto-scan (phy_mask-based) registration does not attach DT fwnode data
to PHY devices, which means DT properties like "pses" are never parsed.
As a result, PSE controllers referenced from PHY nodes are not linked,
and ethtool PSE commands (--show-pse, --set-pse) do not work.
Store the device_node for each PHY found during DT parsing, suppress
auto-scan by setting phy_mask to ~0, and register each PHY explicitly
after devm_mdiobus_register(). This allows fwnode_find_pse_control() to
resolve PSE references and also establishes proper fw_devlink supplier
relationships.
Additionally this fixes a bug where the RTL8221B is limited to
1G and below due to missing DTS references.
Fixes: 4e00306 ("realtek: mdio: use bus auto registration")
Signed-off-by: Carlo Szelinsky <github@szelinsky.de>
Link: https://github.com/openwrt/openwrt/pull/22019
Signed-off-by: Robert Marko <robimarko@gmail.com>
This commit adds support for the Cisco Meraki MR70/Go GR60.
The Meraki MR70 is a Cisco 802.11ac/WiFi 5 outdoor AP with 1 Ethernet port.
It can be powered by a 12V DC barrel jack (5.5x2.5mm, center positive)
or via 802.3af POE.
The Meraki Go GR60 (codename: Dungbeetle Omni) is identical to the MR70
(codename: Toe Biter Omni), so this document will refer to both devices
as the MR70.
MR70 hardware info:
* CPU: Qualcomm IPQ4029
* RAM: 256MB DDR3
* Storage: 128 MB (TSOP48 NAND, 3.3V)
* Networking: 1 Gigabit Ethernet
* WiFi: QCA4019 802.11b/g/n/ac
* Serial: Internal header (J10, 2.54mm, unpopulated)
This device ships with secure boot, and cannot be flashed without
external programmers (TSOP48 NAND and I2C EEPROM)!
Disassembly:
Note: This is an outdoor device that is ultrasonically welded and glued
to weather seal it. Disassembly will compromise the weather seal!
Start by removing the product label on the rear metal mounting plate.
There are four Torx T8 screws under the sticker, remove the screws and
the mounting plate. Remove the two Philips screws under the plate.
Using a chisel (or razor blade) and hammer, cut around the circumfrence
of the device. You need to cut through approximately 2mm of
ultrasonically welded plastic.
After cutting through the plastic, heat the device using a hair drier
(or similar) to soften the glue. A heatgun is NOT recommended as
it will damage the plastic. It is only required to heat the device until
warm (~40C-50C).
Using a plastic pry tool, insert it along the cut you made around
the edge and gently separate. Insert a guitar pick into the opening
while gently lifting the front to cut the glue. The device is glued around
the entire circumfrence.
Once you have removed the plastic front, remove the 4 Philips screws
holding down the main PCB. Release the two WiFi antennas by gently
bending the antenna PCBs to the middle of the unit and pulling up.
Lift the top of the PCB gently while pushing the Ethernet port into the
housing to release it. Turn the PCB over and remove the three Philips
screws holding the metal heat spreader.
The TSOP48 NAND flash (U9, S34ML01G200 or W29N01HV) is located
under the metal heat spreader.
To flash, you need to desolder the TSOP48 or use a 360 clip.
You also need to reprogram the I2C EEPROM (U20, Atmel 24c64). It is not
necessary to desolder the I2C EEPROM, a ch341a USB programmer and SOP-8
clip are inexpensive (~$10) and work well.
Installation:
The dumps to flash can be found in this repository:
https://github.com/halmartin/meraki-openwrt-docs/tree/main/mr70_gr60
The device has the following flash layout (offsets with OOB data):
```
0x000000000000-0x000000100000 : "sbl1"
0x000000100000-0x000000200000 : "mibib"
0x000000200000-0x000000300000 : "bootconfig"
0x000000300000-0x000000400000 : "qsee"
0x000000400000-0x000000500000 : "qsee_alt"
0x000000500000-0x000000580000 : "cdt"
0x000000580000-0x000000600000 : "cdt_alt"
0x000000600000-0x000000680000 : "ddrparams"
0x000000700000-0x000000900000 : "u-boot"
0x000000900000-0x000000b00000 : "u-boot-backup"
0x000000b00000-0x000000b80000 : "ART"
0x000000c00000-0x000007c00000 : "ubi"
```
* Dump your original NAND (if using nanddump, include OOB data).
* Decompress `u-boot.bin.gz` dump from the GitHub repository above (dump
contains OOB data) and overwrite the `u-boot` portion of NAND from
`0x738000`-`0x948000` (length `0x210000`). Offsets here include OOB data.
* Decompress `ubi.bin.gz` dump from the GitHub repository above (dump
contains OOB data) and overwrite the `ubi` portion of NAND from
`0xc60000-0x7fe0000` (length `0x7380000`). Offsets here include OOB data.
* Dump your original EEPROM. Change the byte at offset `0x49` to `0x1e`
(originally `0x2d` or `0x26`). Remember to re-write the EEPROM with the
modified data.
* This can be done on Linux via the following command:
`printf "\x1e" | dd of=/tmp/eeprom.bin bs=1 seek=$((0x49)) conv=notrunc`
**Note**: the device will not boot if you modify the board major number and
have not yet overwritten the `ubi` and `u-boot` regions of NAND.
* Resolder the NAND after overwriting the `u-boot` and `ubi` regions.
OpenWrt Installation:
* After flashing NAND and EEPROM with external programmers. Plug in an
Ethernet cable and power up the device.
* The new U-Boot build uses the space character `" "` (without quotes) to
interrupt boot.
* Interrupt U-Boot and `tftpboot` the OpenWrt initramfs image from your
tftp server
```
dhcp
setenv serverip <your_tftp>
tftpboot openwrt-ipq40xx-generic-meraki_mr70-initramfs-uImage.itb
```
* Once booted into the OpenWrt initramfs, created the `ART` ubivol with
the WiFi radio calibration from the mtd partition:
```
cat /dev/mtd10 > /tmp/ART.bin
ubiupdatevol /dev/ubi0_1 /tmp/ART.bin
```
* `scp` the `sysupgrade` image to
the device and run the normal `sysupgrade` procedure:
```
scp -O openwrt-ipq40xx-generic-meraki_mr70-squashfs-sysupgrade.bin root@192.168.1.1:/tmp/
ssh root@192.168.1.1 "sysupgrade -n /tmp/openwrt-ipq40xx-generic-meraki_mr70-squashfs-sysupgrade.bin"
```
* OpenWrt should now be installed on the device.
Signed-off-by: Hal Martin <hal.martin@gmail.com>
Link: https://github.com/openwrt/openwrt/pull/22050
Signed-off-by: Robert Marko <robimarko@gmail.com>
Underdog devices lack a red LED, use the blue LED for
failsafe mode.
Move all config except device name to underdog.dtsi, as
all known underdog devices (MR20/GR10, MR70/GR60) have identical
device tree.
Signed-off-by: Hal Martin <hal.martin@gmail.com>
Link: https://github.com/openwrt/openwrt/pull/22050
Signed-off-by: Robert Marko <robimarko@gmail.com>
The sgmiisys0 override uses
/delete-node/ mediatek,pnswap;
but mediatek,pnswap is a property, not a child node. The correct
directive would be /delete-property/. As a result, this statement never
had any effect and the property was never removed.
Drop the incorrect override.
Signed-off-by: Maxim Anisimov <maxim.anisimov.ua@gmail.com>
Link: https://github.com/openwrt/openwrt/pull/22046
Signed-off-by: Robert Marko <robimarko@gmail.com>
No code changes. Just some explanation how these devices
work with physical and logical memory.
Signed-off-by: Markus Stockhausen <markus.stockhausen@gmx.de>
Link: https://github.com/openwrt/openwrt/pull/22054
Signed-off-by: Robert Marko <robimarko@gmail.com>
NVMEM in UBI support has been present for a while. Use it to get the
MACs. Seems caldata needs to continue to be obtained through userspace.
This fixes label-mac-device as it needs a mac-address nvmem cell.
Signed-off-by: Rosen Penev <rosenp@gmail.com>
Link: https://github.com/openwrt/openwrt/pull/17068
Signed-off-by: Robert Marko <robimarko@gmail.com>
Follow the recent change where all DTS files were moved to a dedicated dir.
Fixes: 3a39f682df ("qualcommax: ipq50xx: add support for CMCC MR3000D-CI")
Signed-off-by: Robert Marko <robimarko@gmail.com>
