The upstream MediaTek PWM driver requires these clock sources to
work properly.
Signed-off-by: Shiji Yang <yangshiji66@outlook.com>
Link: https://github.com/openwrt/openwrt/pull/22214
Signed-off-by: Hauke Mehrtens <hauke@hauke-m.de>
When running `make kernel_menuconfig`, CPU_BIG_ENDIAN is selected by
default, resulting in a non-bootable image. Add CPU_LITTLE_ENDIAN to
avoid that.
Signed-off-by: Qingfang Deng <dqfext@gmail.com>
Link: https://github.com/openwrt/openwrt/pull/22282
Signed-off-by: Hauke Mehrtens <hauke@hauke-m.de>
The device dts files were moved to the dedicated directory in commit
a66e30631c ("qualcommax: move Device DTS to dedicated DTS directory"),
which resulted in a merge conflict.
Fixes: d755c49f7a ("qualcommax: ipq60xx: rename TP-Link EAP623-Outdoor HD v1 compatible")
Signed-off-by: Shiji Yang <yangshiji66@outlook.com>
Link: https://github.com/openwrt/openwrt/pull/22433
Signed-off-by: Robert Marko <robimarko@gmail.com>
This commit adds support for RTL9607C / RTL8198D thermal controller.
Based on the Realtek SDK code.
Signed-off-by: Rustam Adilov <adilov@tutamail.com>
Link: https://github.com/openwrt/openwrt/pull/22081
Signed-off-by: Hauke Mehrtens <hauke@hauke-m.de>
The RTL8226 PHYs in Zyxel XGS1010-10 and XGS1210-10 rev A1 have swapped
MDI lanes. Specify this in the device tree, so the driver can configure
it. With this change, the PHYs no longer require initialization by the
bootloader.
Signed-off-by: Jan Hoffmann <jan@3e8.eu>
Link: https://github.com/openwrt/openwrt/pull/21261
Signed-off-by: Hauke Mehrtens <hauke@hauke-m.de>
The PHY supports swapping the MDI pairs (ABCD->DCBA) to simplify board
layout. On devices making use of this, it needs to be configured in the
driver, otherwise the PHY won't work properly.
Signed-off-by: Jan Hoffmann <jan@3e8.eu>
Link: https://github.com/openwrt/openwrt/pull/21261
Signed-off-by: Hauke Mehrtens <hauke@hauke-m.de>
The dsa irq handler works always in the same way for all SoCs.
- Read register ISR_PORT_LINK_STS_CHG to determine the ports that
triggered the irq.
- Write the read value back to the register to confirm the irq
- Read link status via MAC_LINK_STS
- Trigger dsa_port_phylink_mac_change() for each changed port
Currently each SoC has its own implementation. Drop that in
favour of a generic implementation that makes use of the existing
bit register read/write helpers.
Signed-off-by: Markus Stockhausen <markus.stockhausen@gmx.de>
Link: https://github.com/openwrt/openwrt/pull/22273
Signed-off-by: Hauke Mehrtens <hauke@hauke-m.de>
This register will be needed to provide a generic irq handler. Add
it to the configuration structure of the driver.
Signed-off-by: Markus Stockhausen <markus.stockhausen@gmx.de>
Link: https://github.com/openwrt/openwrt/pull/22273
Signed-off-by: Hauke Mehrtens <hauke@hauke-m.de>
Some 10G optics showed random "module transmit fault indicated" due to I2C
read errors on ONTi ONT-S508CL-8S/XikeStor SKS8300-8X switches. The same
modules work with the original firmware and on other Linux based devices.
There seems to be some differences in how we talk to those modules using
I2C in OpenWRT. To fix this this patch adds support for 50kHz I2C speed on
SFPs and enables that for XikeStor/Onti devices. Since SFPs only transmit
very few bytes this should not have any real downsides.
This patch configures I2C to use 50kHz clock in the DTS for the affected
devices. For it to work it requires a change in the RTL9300 I2C driver.
This can be safely merged without the kernel change (but will not work
in that case as it will fall back to 100kHz).
Signed-off-by: Jan Kantert <jan-openwrt@kantert.net>
Link: https://github.com/openwrt/openwrt/pull/22210
Signed-off-by: Hauke Mehrtens <hauke@hauke-m.de>
No functional changes intended.
Signed-off-by: Aleksander Jan Bajkowski <olek2@wp.pl>
Link: https://github.com/openwrt/openwrt/pull/22350
Signed-off-by: Hauke Mehrtens <hauke@hauke-m.de>
The main difference between EAP610, 623, and 625 is the device name,
support string, and the BDF package. Move the others to a common
Device/tplink_eap6xx-common in order to highlight the common aspects.
Signed-off-by: Alexandru Gagniuc <mr.nuke.me@gmail.com>
Link: https://github.com/openwrt/openwrt/pull/18804
Signed-off-by: Robert Marko <robimarko@gmail.com>
The EAP625 and EAP623 are extremely similar. The only difference in
the vendor's device tree is that EAP625 also enables USB and UART2.
Use the eap6xx dtsi instead of writing out a full devicetree.
The EAP623 uses the same RTL8211F as the 625 and 610. Since this is
a gigabit PHY, it is okay to change the ess mac mode from SGMII_PLUS
to SGMII. This is now consistent across all three devices.
Move the 'realtek,clkout-disable' and 'realtek,aldps-enable' PHY
properties to the common dtsi, as they work well on all three devices.
Reflect the remaining differences in the eap625 dts.
Signed-off-by: Alexandru Gagniuc <mr.nuke.me@gmail.com>
Link: https://github.com/openwrt/openwrt/pull/18804
Signed-off-by: Robert Marko <robimarko@gmail.com>
As I was looking at the differences between EAP610, 623, and 625
Outdoor, I realized that the quick-start guide of all of the devices
mentions a yellow and green LED. Thus rename the "amber" led to
"yellow", and adjust its color ID accordingly.
Signed-off-by: Alexandru Gagniuc <mr.nuke.me@gmail.com>
Link: https://github.com/openwrt/openwrt/pull/18804
Signed-off-by: Robert Marko <robimarko@gmail.com>
Originally, the .compatible string for EAP623-Outdoor HD tried to
shorten the "-outdoor" to "od". However, this naming was inconsistent
with the existing "eap610-outdoor". As "od" is not a common shorthand,
spell out the complete word: "eap623-outdoor-hd-v1".
Fixes: 5dbf93c8c5 ("ipq60xx: add support for TP-Link EAP623-Outdoor HD v1")
Signed-off-by: Alexandru Gagniuc <mr.nuke.me@gmail.com>
Link: https://github.com/openwrt/openwrt/pull/18804
Signed-off-by: Robert Marko <robimarko@gmail.com>
CI is currently failing due to these four patches.
Automatically refreshed with `make target/linux/refresh`.
Signed-off-by: Kenneth Kasilag <kenneth@kasilag.me>
Link: https://github.com/openwrt/openwrt/pull/22399
Signed-off-by: Robert Marko <robimarko@gmail.com>
Userspace handling is deprecated.
Since the u-boot ethaddr variable is quoted, we cannot use it.
Use mac-base instead to specify in dts.
Signed-off-by: Rosen Penev <rosenp@gmail.com>
Link: https://github.com/openwrt/openwrt/pull/14182
Signed-off-by: Robert Marko <robimarko@gmail.com>
Userspace handling is deprecated.
Signed-off-by: Rosen Penev <rosenp@gmail.com>
Link: https://github.com/openwrt/openwrt/pull/14182
Signed-off-by: Robert Marko <robimarko@gmail.com>
Userspace handling is deprecated.
Signed-off-by: Rosen Penev <rosenp@gmail.com>
Link: https://github.com/openwrt/openwrt/pull/14182
Signed-off-by: Robert Marko <robimarko@gmail.com>
Removes deprecated userspace handling.
Signed-off-by: Rosen Penev <rosenp@gmail.com>
Link: https://github.com/openwrt/openwrt/pull/14182
Signed-off-by: Robert Marko <robimarko@gmail.com>
- Fix RTL8261N 10GbE PHY `reset-deassert-us` from 100ms to 221ms to meet datasheet minimum SMI-ready timing (t7 >= 150ms), fixing intermittent boot stalls caused by MDIO bus instability
- Add missing WLAN toggle button (GPIO 34) present in stock firmware but absent from OpenWrt DTS
- Fix memory size from 1 GB to the actual 512 MB
Fix 1: The RTL8261N 10GbE PHY's `reset-deassert-us` was set to 100ms (100000us), but the **RTL8261N datasheet (Table 108, parameter t7)** specifies a minimum **SMI-ready time of 150ms** after nRESET release before the MDIO (SMI) bus can be used.
With only 100ms, the kernel attempts MDIO bus access before the RTL8261N's SMI interface is stable. Since the RTL8261N (mdio-bus:00) and the internal MT7988 2.5GbE PHY (mdio-bus:0f) share the same MDIO bus, a not-yet-ready RTL8261N disrupts all MDIO traffic, causing the 2.5GbE PHY firmware loading (`mt798x_2p5ge_phy_config_init`) to stall.
Observed symptoms on warm reboot:
- Sometimes `mt798x_2p5ge_phy_config_init` hangs for 5+ minutes or indefinitely
- RCU CPU stalls (`rcu: INFO: rcu_sched detected stalls on CPUs`)
- mt7996e WiFi chip message timeouts cascading to `chip full reset failed`
- System appears hung with only power LED blinking slowly
UART serial log evidence (warm reboot with 100ms):
```
[ 73.041756] rcu: INFO: rcu_sched self-detected stall on CPU
[ 73.048341] rcu: 2-....: (8 ticks this GP)
[ 73.061641] pc : mt798x_2p5ge_phy_config_init+0x258/0xbb0
[ 73.061653] lr : mt798x_2p5ge_phy_config_init+0x238/0xbb0
...
[ 334.771280] MediaTek MT7988 2.5GbE PHY mdio-bus:0f: Firmware date code: 2024/10/30
```
The 2.5GbE PHY firmware loading, which normally takes ~3 seconds, took **325 seconds** due to MDIO bus instability. In the worst case, the system never recovers.
GPL DTS uses 221ms (`reset-deassert-us = <221000>`), providing 71ms of margin above the 150ms datasheet minimum. All MediaTek MT7988 reference board DTS files in the GPL use this same 221ms value.
Fix 2: Missing WLAN button (GPIO 34)
The BE450 has a physical WLAN toggle button on GPIO 34, defined in the stock TP-Link GPL DTS but missing from the OpenWrt DTS. Without this definition, the button is non-functional under OpenWrt.
The pin name for GPIO 34 in the MT7988 pinctrl is `SPI2_MISO`, confirmed by the kernel pinctrl driver (`pinctrl-mt7988.c`: `MT7988_PIN(34, "SPI2_MISO")`) and the official devicetree binding (`mediatek,mt7988-pinctrl.yaml`).
Note: GPIO 34 is also used by the BE450's First U-Boot as a recovery button (web recovery 192.168.1.1). Registering it in the DTS ensures the kernel claims the pin.
Fix 3: Incorrect memory size in DTS
The OpenWrt DTS declares 1 GB (`0x40000000`) of RAM, but the BE450 has 512 MB (`0x20000000`).
Run tested.
Signed-off-by: Semih Baskan <strst.gs@gmail.com>
Link: https://github.com/openwrt/openwrt/pull/22386
Signed-off-by: Hauke Mehrtens <hauke@hauke-m.de>
The current CMU setup was just copied and slightly adjusted from the
SDK, lacks functionality and logic and doesn't cover all cases we need
(same in the SDK due to multiple reasons). The existing implementation
for RTL930x covers all that and can be reused for RTL931x. Previous
patches made this generic and now we can add the remaining missing
pieces to actually use it for RTL931x. This only includes
implementations for the few variant-specific actions within the
implementation, linking them properly and calling the CMU configuration.
Drop the old CMU code for RTL931x then since it's not needed anymore.
Signed-off-by: Jonas Jelonek <jelonek.jonas@gmail.com>
Link: https://github.com/openwrt/openwrt/pull/22198
Signed-off-by: Hauke Mehrtens <hauke@hauke-m.de>
Improve the RTL931x mapper to infer the CMU page from the hardware mode
by replace unneeded with useful comments, returning a better error code
and dropping irrelevant parts.
Signed-off-by: Jonas Jelonek <jelonek.jonas@gmail.com>
Link: https://github.com/openwrt/openwrt/pull/22198
Signed-off-by: Hauke Mehrtens <hauke@hauke-m.de>
Do some slight improvements to the generic CMU configuration for
RTL93xx. This covers several points:
- update comments to the current reality
- add fast path to avoid issues and unneeded calls
- use cached mode value instead of register read
Signed-off-by: Jonas Jelonek <jelonek.jonas@gmail.com>
Link: https://github.com/openwrt/openwrt/pull/22198
Signed-off-by: Hauke Mehrtens <hauke@hauke-m.de>
Generalize the RTL930x CMU configuration to support RTL931x as well.
Both implementations differ only in minor details, allowing them to
share common code and avoid duplication.
Affected functions are moved up in the code to the 93xx common area and
slightly renamed. Existing variant-specific functions are adjusted too
and assigned to the previously added SerDes operation hooks.
Signed-off-by: Jonas Jelonek <jelonek.jonas@gmail.com>
Link: https://github.com/openwrt/openwrt/pull/22198
Signed-off-by: Hauke Mehrtens <hauke@hauke-m.de>
Add new SerDes ops for CMU management to be able to share common
behavior of CMU configuration for RTL930x and RTL931x while still
covering variant specifics.
Signed-off-by: Jonas Jelonek <jelonek.jonas@gmail.com>
Link: https://github.com/openwrt/openwrt/pull/22198
Signed-off-by: Hauke Mehrtens <hauke@hauke-m.de>
Fix naming of several functions to better reflect what they are doing.
While at it, also improve the error handling a lot, changing the return
type from void to int and actually returning errors.
Signed-off-by: Jonas Jelonek <jelonek.jonas@gmail.com>
Link: https://github.com/openwrt/openwrt/pull/22198
Signed-off-by: Hauke Mehrtens <hauke@hauke-m.de>
Move resetting the CMU into the PLL configuration itself where the speed
is set. Since this operation is not dependent of the target SerDes and
only needs to be called if the speed changed, it fits better there.
Though the call was guarded with a 'speed_changed' before, this also
applies to actually changing the speed. This was done before anyway,
even if the speed value hasn't really changed.
Signed-off-by: Jonas Jelonek <jelonek.jonas@gmail.com>
Link: https://github.com/openwrt/openwrt/pull/22198
Signed-off-by: Hauke Mehrtens <hauke@hauke-m.de>
Add a mapper function to infer the to-be-selected PLL speed from the
desired SerDes hardware mode. This avoids having similar logic in each
CMU implementation.
Signed-off-by: Jonas Jelonek <jelonek.jonas@gmail.com>
Link: https://github.com/openwrt/openwrt/pull/22198
Signed-off-by: Hauke Mehrtens <hauke@hauke-m.de>
Split up PLL configuration of RTL930x in the two distinct actions of
configuring the PLL itself (aka setting its speed, etc.) and selecting
which PLL is used by a SerDes.
It was found that for both RTL930x and RTL931x, PLL configuration can be
combined while selecting the PLL a SerDes uses differs and needs to be
implemented variant-specific.
Signed-off-by: Jonas Jelonek <jelonek.jonas@gmail.com>
Link: https://github.com/openwrt/openwrt/pull/22198
Signed-off-by: Hauke Mehrtens <hauke@hauke-m.de>
Make use of the generic PLL type definition in the current CMU/PLL
configuration code for RTL930x. Assign explicit values to the fields of
the PLL type enum to tie these fields to the values that are used in
the register fields. This allows to simplify the code a bit.
Selecting the PLL to use for a SerDes shares some similarities between
RTL930x and RTL931x. While the location of the selector in the registers
is placed different, similar underlying bit semantics are used. This
allows to reuse the same plain values for both. RTL930x uses a force bit
and a selector bit, RTL931x at least uses the selector bit with the same
values for ring and LC PLL.
Signed-off-by: Jonas Jelonek <jelonek.jonas@gmail.com>
Link: https://github.com/openwrt/openwrt/pull/22198
Signed-off-by: Hauke Mehrtens <hauke@hauke-m.de>
Make use of the generic PLL speed definition in the current CMU/PLL
configuration code for RTL930x. Assign explicit values to the field of
the PLL speed enum to tie these fields to the values that are used in
the register fields. This allows to simplify the code a bit.
Setting the actual speed selector for RTL930x was found to be similar to
RTL931x despite of different values being used since the LSB is always 1.
According to the SDK this seems to be a force bit while the other bits
are the actual value/selector that is being forced. For RTL930x,
separate the speed selection to be able to use that as common behavior
for both variants later.
Signed-off-by: Jonas Jelonek <jelonek.jonas@gmail.com>
Link: https://github.com/openwrt/openwrt/pull/22198
Signed-off-by: Hauke Mehrtens <hauke@hauke-m.de>
Bring the PLL definitions into a proper shape. While there was already a
definition for the PLL type, a generic PLL speed definition was missing.
Introduce such a definition and adjust the naming of the existing PLL
type definition to have a better distinction and avoid conflicts. The
definitions can and should be used to make the CMU/PLL configuration
more generic and reduce the need for variant-specific definitions.
Signed-off-by: Jonas Jelonek <jelonek.jonas@gmail.com>
Link: https://github.com/openwrt/openwrt/pull/22198
Signed-off-by: Hauke Mehrtens <hauke@hauke-m.de>
The ethernet driver configures the SoC internal network card
on its own. There are no special serdes or other layers in
between. So there is no need for pcs handling in the driver.
Drop that.
Signed-off-by: Markus Stockhausen <markus.stockhausen@gmx.de>
Link: https://github.com/openwrt/openwrt/pull/22347
Signed-off-by: Robert Marko <robimarko@gmail.com>
These devices contain a single MAC address in the U-Boot environment.
Set it as eth0 and label MAC in device tree. To maintain the current
state, the 02_network script still sets individual port MAC addresses
and the bridge MAC address.
Signed-off-by: Markus Stockhausen <markus.stockhausen@gmx.de>
Link: https://github.com/openwrt/openwrt/pull/22302
Signed-off-by: Robert Marko <robimarko@gmail.com>
Allow to convert MAC adddresses for all devices to NVMEM in
the future.
Signed-off-by: Markus Stockhausen <markus.stockhausen@gmx.de>
Link: https://github.com/openwrt/openwrt/pull/22302
Signed-off-by: Robert Marko <robimarko@gmail.com>
The Cudy M3000 v1/v2 seem to have mostly identical hardware.
The M3000 v1 OpenWrt images work on the M3000 v2 (excluding
the v2 parts with a different PHY). Cudy also distributes one
firmware image that supports both routers.
Rename the human-readable device variant to "v1/v2" to match this.
Don't change the compatible property as that hooks into the
attended sysupgrade process.
The recent flash and PHY changes don't seem to be related to the v1/v2
split. There exist M3000 v2 with the Realtek PHY, see e.g.
https://github.com/openwrt/openwrt/pull/21584#issuecomment-3864992555
Signed-off-by: Jakub Vaněk <linuxtardis@gmail.com>
Link: https://github.com/openwrt/openwrt/pull/22259
Signed-off-by: Hauke Mehrtens <hauke@hauke-m.de>
The hardware is very close the the Cudy M3000 v1 (see commit
20e4a18feb). However, the Motorcomm YT8821 PHY is tricky
to support because of a MDIO address collision within the router.
Specification:
- MT7981BA CPU: dual-core ARM Cortex-A53 @ 1.3 GHz
- 256 MiB RAM
- 128 MiB SPI NAND
- Ethernet:
- 1x 1GbE LAN port driven by the internal MT7981 PHY
- 1x 2.5GbE WAN port driven by the Motorcomm YT8821
- WiFi:
- MT7981BA 2.4 GHz WiFi with 2x2:2 MIMO
- MT7981BA 5 GHz WiFi with 2x3:2 MIMO
- Buttons: Reset, WPS
- LED: 1x combined red/white
How to know if you have the a router with the YT8821 PHY:
- Boot the router into the vendor's firmware. Go to Diagnostic Tools
-> System Log. Try searching for "rtl8221b".
- If there are some matches, you have the Cudy M3000 router with
the Realtek PHY and you should NOT use the device defined in this
commit. Instead, you should use the device defined in
mt7981b-cudy-m3000-v1.dts.
- If there are no matches, try searching for "yt8821". If that
matches something, you have the Cudy M3000 with the Motorcomm PHY
and you should use this device tree
(mt7981b-cudy-m3000-v2-yt8821.dts).
- If even the yt8821 string did not match anything, then something
is wrong. Rebooting the router might help (the system log would
be refreshed).
Installation via the Cudy web UI:
- Download the signed intermediary firmware from
https://drive.google.com/drive/folders/1BKVarlwlNxf7uJUtRhuMGUqeCa5KpMnj
- Flash the intermediary firmware using the Cudy web UI
- Connect a PC/laptop to the "1Gbps LAN" port
- Open http://192.168.1.1 in your browser, log in
(the password should be empty)
- Flash your desired OpenWrt firmware via LuCI
- The router should reboot into the desired firmware
How to access UART (citing from 20e4a18feb):
- remove rubber ring on the bottom
- remove screws
- pull up the cylinder, maybe help by push on an ethernet socket
with a screwdriver
- remove the (3) screws holding the board in the frame
- remove the board from the frame to get to the screws for the
silver, flat heat shield
- remove the (3) screws holding the heat shield
- solder UART pins to the back of the board
- make sure to have the pins point out on side with the black,
finned heat spread
- the markings for the pins are going to be below the silver heat
shield
- Vcc is not needed
- the UART parameters are 115200 baud, 8n1
Installation via UART (citing from 20e4a18feb):
- attach an Ethernet cable to the "1Gbps LAN" port on the router
- hold the reset button while powering the router
- press CTRL-C or wait for the timeout to get to the U-Boot prompt
- prepare a TFTP server on the network to supply ..-initramfs-kernel.bin
- use 'tftpboot 0x46000000 ..-initramfs-kernel.bin' in the U-Boot
shell to pull the image (change the file name accordingly)
- boot the image using 'bootm 0x46000000'
- push the ..-sysupgrade to the router using your preferred method
- perform the upgrade with 'sysupgrade -n'
Signed-off-by: Jakub Vaněk <linuxtardis@gmail.com>
Link: https://github.com/openwrt/openwrt/pull/22259
Signed-off-by: Hauke Mehrtens <hauke@hauke-m.de>
The KSZ9477 driver was added to the cortexa53 kernel to support the
Gateworks Venice product family which has a board with this switch. Now
that the kmod-dsa-ksz9477 driver is available as a package remove the
static configuration ad add the package.
This resolves an issue caused by having the switch driver static and the
PHY driver as a module such that the PHY driver was not registered early
enough to be used causing some errata to not be worked around.
Signed-off-by: Tim Harvey <tharvey@gateworks.com>
Link: https://github.com/openwrt/openwrt/pull/22120
Link: https://github.com/openwrt/openwrt/pull/22257
Signed-off-by: Robert Marko <robimarko@gmail.com>
In generic, there's a backport from 6.14 that makes this change. Do so
in downstream locations as well.
Signed-off-by: Rosen Penev <rosenp@gmail.com>
Link: https://github.com/openwrt/openwrt/pull/21167
Signed-off-by: Robert Marko <robimarko@gmail.com>
Restore the lost band label.
Fixes: 502ac21e8f ("ipq40xx: drop redundant label with new LED color/function format")
Signed-off-by: Tomasz Maciej Nowak <tmn505@gmail.com>
SFP I2C buses for ports 1 and 3 were swapped as order changed on production
boards.
So, swap them around to fix SFP 1 and 3 failed to read EEPROM errors.
Fixes: 29b3d929a6 ("microchipsw: lan969x: add Novarq Tactical 1000")
Signed-off-by: Robert Marko <robert.marko@sartura.hr>
I wrongly added the wifi devices to the pcie nodes and not the bridge
nodes as they were not present at the time.
Fixes: 58056df ("bcm53xx: backport nvmem mac for meraki mr26")
Signed-off-by: Rosen Penev <rosenp@gmail.com>
Link: https://github.com/openwrt/openwrt/pull/22369
Signed-off-by: Robert Marko <robimarko@gmail.com>
Remove source-only from an7581.
Signed-off-by: Andrew LaMarche <andrewjlamarche@gmail.com>
Link: https://github.com/openwrt/openwrt/pull/17869
Signed-off-by: Christian Marangi <ansuelsmth@gmail.com>
Most, if not all Airoha devices will have LEDs and buttons. Add them to
default packages.
Signed-off-by: Andrew LaMarche <andrewjlamarche@gmail.com>
Link: https://github.com/openwrt/openwrt/pull/17869
Signed-off-by: Christian Marangi <ansuelsmth@gmail.com>
Add uboot-envtools to default packages to facilitate modifying the
u-boot environment.
Signed-off-by: Andrew LaMarche <andrewjlamarche@gmail.com>
Link: https://github.com/openwrt/openwrt/pull/17869
Signed-off-by: Christian Marangi <ansuelsmth@gmail.com>
This commit adds support for Gemtek (Centurylink/Lumen/Quantum Fiber)
W1700K.
Device specification
--------------------
SoC Type: Airoha AN7581
RAM: ESMT M16U8G16512A (2GB)
Flash: Winbond 25N04KVZEIR (512MB)
Ethernet: 2x gigabit via AN7581, 2x 10g via RTL8261N
Wi-Fi: MT7996 - BE19000
LEDs: 1 LED, power/status
Button: Reset
USB ports: None
Bootloader: U-Boot 2014.04-rc1 (Jun 12 2024 - 08:14:34) AXON 2.0
Fan: 1x controlled by Nuvoton NCT7511Y
This device is pretty useless with the stock firmware as it requires an
account to completely set it up. Additionally, the vendor bootloader is
signed and uses Airoha/Mediatek's BBT/BMT for bad block management on
the flash. It does not support UBI, thus kernel updates are subject to
BMT/BBT which OpenWrt does not support. In turn, if a kernel update
happens and a block is marked bad in the process, the device will fail
to boot and will need to be recovered via serial.
The workaround is to chainload U-Boot in place of the kernel, as it
should not need frequent updates and thus should not cause BBT/BMT to
misbehave and soft-brick the device. Upstream U-Boot supports loading
a FIT image from UBI, so we create a UBI partition for the new u-boot
env, FIT image and factory data. This way, bad blocks are managed by UBI
instead, which will not soft-brick the device should a block be marked
bad during a normal OpenWrt update. Users wishing to update U-Boot can
do so, but should be prepared to recover if a block goes bad.
Because the device is not useful with stock firmware, this is a one-way
ticket for most users and reverting will not be documented.
The following steps can be used to install OpenWrt on the W1700K.
Connect to serial console. There is a Torx T10 screw underneath the QR
code printed onto the label. Then, pry between the gray and white
plastic, starting by the ports on the back. There are clips arount the
entire device. Starting closest to the screw next to the UART header,
TX - GND - VCC - N/A - RX. The bootloader can be interrupted by
pressing any key.
Configuring Vendor Bootloader and Installing U-Boot Chainloader:
The bootloader's default bootcmd will only run a signed image. However,
we can still bootm our own image from flash.
NOTE: The vendor's ethernet drivers are flaky. You may have to reboot
and try the tftpboot part several times for it to work.
- setenv one flash read 0x600000 0x1000000 \$loadaddr
- setenv two "; bootm"
- setenv bootcmd "$one$two"
- setenv one
- setenv two
- saveenv
- setenv serverip 192.168.1.10; setenv ipaddr 192.168.1.1; tftpboot
0x89000000 openwrt-airoha-an7581-gemtek_w1700k-ubi-chainload-uboot.itb
- flash erase 0x600000 0x100000
- flash write 0x600000 0x100000 0x89000000
- reset
The device will now reboot into the U-Boot chainloader.
Loading the W1700K UBI Installer:
The installer can be downloaded at
https://github.com/hurrian/w1700k-ubi-installer/releases
- Boot the installer via the TFTP option in the U-Boot menu. This
process is automatic, though you may be prompted to answer some
questions.
- Once it is done, you may upgrade to your preferred build.
- For more information: https://github.com/hurrian/w1700k-ubi-installer
For those wishing to explore the stock firmware:
Rooting Stock FW (for making backups, recommended):
- Boot the router and watch serial console until presented with failsafe
mode. Enter it (f + enter).
- mount_root
- Change the root password (passwd).
- Open /etc/config/axon_platform_manager and set sshServerEnable,
localAccessEnable and remoteAccessEnable to 1.
- Search for "SSH". You'll find a long string with 3 matches such as
Enabled%25252c1%25252cSSH%Drop. Change any instances of "Disabled"
preceding SSH to "Enabled" and any instances of "Drop" to "Accept"
that follow SSH. Same for "Local SSH" and "Remote SSH".
- Set /etc/config/dropbear to:
config dropbear
option PasswordAuth 'on'
option RootPasswordAuth 'on'
option Port '22'
- Reboot.
- Connect 10g WAN port to existing network and SSH in with the password
you set.
- SSH into rooted stock fw.
Signed-off-by: Andrew LaMarche <andrewjlamarche@gmail.com>
Link: https://github.com/openwrt/openwrt/pull/17869
Signed-off-by: Christian Marangi <ansuelsmth@gmail.com>
In the transition to nvmem-layout and subsequent disabling of non layout
u-boot-env, this device was left out.
Transition to nvmem-layout to fix the mac address.
Signed-off-by: Rosen Penev <rosenp@gmail.com>
Link: https://github.com/openwrt/openwrt/pull/22263
Signed-off-by: Christian Marangi <ansuelsmth@gmail.com>
Userspace handling is deprecated.
These are identical to NBG6617, which was tested as working.
Signed-off-by: Rosen Penev <rosenp@gmail.com>
Link: https://github.com/openwrt/openwrt/pull/22263
Signed-off-by: Christian Marangi <ansuelsmth@gmail.com>
Userspace handling is deprecated.
UBI nvmwem has been supported for quite a while now.
Signed-off-by: Rosen Penev <rosenp@gmail.com>
Link: https://github.com/openwrt/openwrt/pull/22263
Signed-off-by: Christian Marangi <ansuelsmth@gmail.com>
When NVMEM is not ready, of_get_mac_address fails. Handle this.
Signed-off-by: Rosen Penev <rosenp@gmail.com>
Link: https://github.com/openwrt/openwrt/pull/22305
Signed-off-by: Christian Marangi <ansuelsmth@gmail.com>
When NVMEM is not ready, of_get_mac_address fails. Handle this.
Signed-off-by: Rosen Penev <rosenp@gmail.com>
Link: https://github.com/openwrt/openwrt/pull/22305
Signed-off-by: Christian Marangi <ansuelsmth@gmail.com>
RTL838x devices cannot reboot if the flash controller is driven in
4 byte mode. Unitl fdc3776 ("realtek: pcs: fix PLL_CML_CTRL for
serdes 0/1") this bit was luckily cleared by a coding error. Since
then the device cannot be rebooted anymore.
Looking at the SDK one can see that this bit is reset short before
the reboot happens. But we might need that in critical situations
where there is no chance to do it right in time. As the RTL838x
always ran with the bit disabled restore the old behaviour. This
time implement it as a documented quirk so it does not get lost.
Fixes: fdc3776 ("realtek: pcs: fix PLL_CML_CTRL for serdes 0/1")
Signed-off-by: Markus Stockhausen <markus.stockhausen@gmx.de>
Link: https://github.com/openwrt/openwrt/pull/22334
Signed-off-by: Robert Marko <robimarko@gmail.com>
Disable airoha-flow-stats for an7583 since it is not currently supported
by the firmware image.
Signed-off-by: Lorenzo Bianconi <lorenzo@kernel.org>
Link: https://github.com/openwrt/openwrt/pull/22341
Signed-off-by: Christian Marangi <ansuelsmth@gmail.com>
The Realtek DSA driver accesses the DTS at two locations.
- rtldsa_ethernet_loaded(): to check if ethernet driver is active
- rtl83xx_mdio_probe(): to create ports and link to pcs/phy
The first function does not directly search for the ethernet driver
but looks it up through the switch port nodes. Avoid future issues
and simply search all nodes that have a "ethernet" link to the
network driver.
While we are here add a missing put_device() to keep reference
counters clean.
Signed-off-by: Markus Stockhausen <markus.stockhausen@gmx.de>
Link: https://github.com/openwrt/openwrt/pull/22235
Signed-off-by: Hauke Mehrtens <hauke@hauke-m.de>
rteth_930x_create_tx_header() and rteth_931x_create_tx_header() do
basically the same. Only exception is, that one function can handle
ports beyond 32 and the other not. Merge them into one.
Signed-off-by: Markus Stockhausen <markus.stockhausen@gmx.de>
Link: https://github.com/openwrt/openwrt/pull/22228
Signed-off-by: Hauke Mehrtens <hauke@hauke-m.de>
MAC setting uses hard to read duplicated code. Additionally it
evaluates the unwanted family_id attribute. Provide the list
of MAC address registers in the configuration structure and use
a loop to fill those.
Signed-off-by: Markus Stockhausen <markus.stockhausen@gmx.de>
Link: https://github.com/openwrt/openwrt/pull/22217
Signed-off-by: Hauke Mehrtens <hauke@hauke-m.de>
There is a workaround in the transmit path for the RTL838x SoCs. This
is basically an open coded read_poll_timeout() and makes the code hard
to read. Additionally the magic trigger calculation is not easy to
understand.
Simplify things by using kernel standards and a better macro.
Signed-off-by: Markus Stockhausen <markus.stockhausen@gmx.de>
Link: https://github.com/openwrt/openwrt/pull/22217
Signed-off-by: Hauke Mehrtens <hauke@hauke-m.de>
Some 10G optics showed random "module transmit fault indicated" due to I2C
read errors on ONTi ONT-S508CL-8S/XikeStor SKS8300-8X switches. The same
modules work with the original firmware and on other Linux based devices.
There seems to be some differences in how we talk to those modules using
I2C in OpenWRT. To fix this this patch adds support for 50kHz I2C speed on
SFPs and enables that for XikeStor/Onti devices. Since SFPs only transmit
very few bytes this should not have any real downsides.
This patch adds support in the i2c driver for 50kHz and 2.5MHz. In a
second PR I will configure 50kHz in the DTS for the affected devices.
Signed-off-by: Jan Kantert <jan-openwrt@kantert.net>
Link: https://github.com/openwrt/openwrt/pull/22209
Signed-off-by: Hauke Mehrtens <hauke@hauke-m.de>
LACP frequently changes active/backup links. driver must also handle
dp->lag_tx_enabled.
This should only affect egress LAG table, ingress should not be touched.
To test, connect a known working 802.3ad compatible switch (Mikrotik).
Configure bond with 802.3ad on openwrt as well as mikrotik.
Observer active/backup links on openwrt with
```
for iface in <list of bond participants>; do
ip -d link show $iface
done
```
This should show ACTIVE/BACKUP status which must be synchronized with
the partner's ACTIVE/BACKUP status if LACP is working correctly.
Backup interface must not be chosen by the distribution algorithm to
transmit egress packet
At the moment, we have two parties involved in the selection of active LAG TX
ports:
- the bonding/DSA code which informs about activated/deactivated ports using
.port_lag_change
- the HW which is deactivating ports based on the link state see
RTL93XX_TRK_CTRL_LINK_DOWN_AVOID
In our case, the software is supposed to manage everything
Co-developed-by: Sven Eckelmann <se@simonwunderlich.de>
Signed-off-by: Sven Eckelmann <se@simonwunderlich.de>
Signed-off-by: Harshal Gohel <hg@simonwunderlich.de>
Link: https://github.com/openwrt/openwrt/pull/21740
Signed-off-by: Hauke Mehrtens <hauke@hauke-m.de>
With this commit it is possible to create 802.3ad compatible bond
interface that is interoperable with other 802.3ad compatible switches.
Each trunk group can have maximum of 8 ports as members.
Hardware also supports trunking with stacked switches, however it is not
handled here and the driver only configures the local trunk.
rtl930x and rtl931x has minimal differences in trunk/lag
Co-developed-by: Sven Eckelmann <se@simonwunderlich.de>
Signed-off-by: Sven Eckelmann <se@simonwunderlich.de>
Signed-off-by: Harshal Gohel <hg@simonwunderlich.de>
Link: https://github.com/openwrt/openwrt/pull/21740
Signed-off-by: Hauke Mehrtens <hauke@hauke-m.de>
rtl93xx has two distribution algorithm slots that are shared among
multiple trunks.
Each of this slot can be configured to handle L2 and/or L3 packets
Hardware can also be configured to support layer3+4 but that is not
802.3ad compliant. With this commmit I want to focus on getting
layer2 and layer2+3 initialized in two slots.
When a new LAG group is created, depending on the xmit_hash_policy
configuration a slot will be configured in LAG table entry
SPA and VLAN bits made the switch to always choose same link for all
connections which completely dismisses point of Link aggregation.
So avoid these and stick to SMAC + DMAC for L2 packets and
SMAC + DMAC + SIP + DIP for L3 packets
Co-developed-by: Sven Eckelmann <se@simonwunderlich.de>
Signed-off-by: Sven Eckelmann <se@simonwunderlich.de>
Signed-off-by: Jan Fuchs <jf@simonwunderlich.de>
Signed-off-by: Harshal Gohel <hg@simonwunderlich.de>
Link: https://github.com/openwrt/openwrt/pull/21740
Signed-off-by: Hauke Mehrtens <hauke@hauke-m.de>
rtl93xx hardware supports trunk fdb entries. That requires driver to
translate port-fdb entry to trunk fdb entry if the port is part of a
LAG.
There is no standard way of indicating fdb entries for bond interfaces.
One can use debugfs interface l2_table to dump all the entries stored in
the hardware. Trunk FDB entries are now displayed properly with trunk ID
and participating ports
Co-developed-by: Sven Eckelmann <se@simonwunderlich.de>
Signed-off-by: Sven Eckelmann <se@simonwunderlich.de>
Signed-off-by: Harshal Gohel <hg@simonwunderlich.de>
Link: https://github.com/openwrt/openwrt/pull/21740
Signed-off-by: Hauke Mehrtens <hauke@hauke-m.de>
rtl9310 and rtl9300 have two slots for configuration of packet distribution
algorithm that can be assigned to multiple LAG groups. They also have the
same field descriptions
Co-developed-by: Sven Eckelmann <se@simonwunderlich.de>
Signed-off-by: Sven Eckelmann <se@simonwunderlich.de>
Signed-off-by: Harshal Gohel <hg@simonwunderlich.de>
Link: https://github.com/openwrt/openwrt/pull/21740
Signed-off-by: Hauke Mehrtens <hauke@hauke-m.de>
It is not helpful at the moment to expose all the SoC specific details to
the common code when it actually only needed to add ports to a LAG. Just
have a simple interface for now.
Support returning errors while setting distribution algorithm
Move setting algomask to rtl83xx specific routine and out of common lag_add
because algomasks will be handled differently on rtl93xx
Co-developed-by: Sven Eckelmann <se@simonwunderlich.de>
Signed-off-by: Sven Eckelmann <se@simonwunderlich.de>
Signed-off-by: Harshal Gohel <hg@simonwunderlich.de>
Link: https://github.com/openwrt/openwrt/pull/21740
Signed-off-by: Hauke Mehrtens <hauke@hauke-m.de>
Hardware
========
SoC: Qualcomm IPQ4018
ETH: Qualcomm QCA8075 (2 x RJ-45)
WDG: OnSemi SCT706
RAM: Micron MT41K128M16JT-125 (256MB)
NOR: Infineon S25FL512S (64MB)
Installation
============
1. Create a ramboot-able image with the command
{ dd if=/dev/zero bs=32 count=1 2>/dev/null; \
cat openwrt-ipq40xx-generic-huawei_ap4050dn-initramfs-uImage.itb; \
} > ramboot.bin`
2. Start a TFTP server in the folder with the ramboot.bin.
3. Plug in a USB-RJ45 serial adapter to the CONSOLE port of the device
and start a serial console session with
9600 baud, no parity, 1 stop bit.
4. Plug in either 12V power or PoE to the device.
5. On the prompt `Press f or F to stop Auto-Boot in 3 seconds`,
press `f` to enter the Huawei U-Boot command line
6. Enter a new password for the u-boot command line
7. In the command line, run these commands to ramboot OpenWrt:
setenv serverip <IPv4 address of TFTP server>
setenv ipaddr <IPv4 address for this AP>
setenv rambootfile ramboot.bin
run ramboot
8. In OpenWrt, set up the network and then `scp` the files
`u-boot-huawei_ap4050dn/uImage` and
`openwrt-ipq40xx-generic-huawei_ap4050dn-squashfs-sysupgrade.bin`
into `/tmp/`
9. To backup the original firmware, run the following:
cat /dev/mtd12 /dev/mtd13 > huawei_ap4050dn_fw_backup.bin.bin
10. Run the following commands to flash u-boot and OpenWrt to the device:
mtd erase uboot
mtd write /tmp/uImage uboot
sysupgrade -n /tmp/openwrt-ipq40xx-generic-huawei_ap4050dn-squashfs-sysupgrade.bin
11. The device should now boot OpenWrt! (sometimes the boot process takes a bit
longer due to the watchdog resetting the device before the watchdog driver runs)
Signed-off-by: Marco von Rosenberg <marcovr@selfnet.de>
'CONFIG_NET_AIROHA_FLOW_STATS=y' currently breaks NPU
offload for AN7581+MT7996, so disable it for now.
Signed-off-by: Kenneth Kasilag <kenneth@kasilag.me>
Link: https://github.com/openwrt/openwrt/pull/22300
Signed-off-by: Christian Marangi <ansuelsmth@gmail.com>
Introduce the capability to read the firmware binary names from device-tree
using the firmware-name property if available.
This is a preliminary patch to enable NPU offloading for MT7996 (Eagle)
chipset since it requires a different binary with respect to the one
used for MT7992 on the EN7581 SoC.
Signed-off-by: Lorenzo Bianconi <lorenzo@kernel.org>
Link: https://github.com/openwrt/openwrt/pull/22289
Signed-off-by: Christian Marangi <ansuelsmth@gmail.com>
Initialize NPU Block Ack memory region if reserved via DTS.
Block Ack memory region is used by NPU MT7996 (Eagle) offloading.
Signed-off-by: Lorenzo Bianconi <lorenzo@kernel.org>
Link: https://github.com/openwrt/openwrt/pull/22289
Signed-off-by: Christian Marangi <ansuelsmth@gmail.com>
Add pending patch for improving Huawei MA5671a SFP fixup, which allows
communicating with the module even if the fiber isn't connected.
Link: https://github.com/openwrt/openwrt/pull/22283
Signed-off-by: Álvaro Fernández Rojas <noltari@gmail.com>
Even though these are disabled, dtc still warns on missing reg and
ranges.
Add them. No real difference as it's disabled anyway.
Signed-off-by: Rosen Penev <rosenp@gmail.com>
Link: https://github.com/openwrt/openwrt/pull/20990
Signed-off-by: Robert Marko <robimarko@gmail.com>
Bump compat version to 3.0 for TP-Link RE355 v1, RE450 v1 and RE450 v2.
Was missed for 25.12; users upgrading from older images need sysupgrade -F.
Signed-off-by: Ivan Diaz <diaz.it@icloud.com>
Link: https://github.com/openwrt/openwrt/pull/22185
Signed-off-by: Robert Marko <robimarko@gmail.com>
Misaligned rootfs_data caused config loss on sysupgrade. Set BLOCKSIZE
:= 4k for proper JFFS2 alignment. Add DEVICE_COMPAT_MESSAGE for
sysupgrade -F requirement.
Signed-off-by: Ivan Diaz <diaz.it@icloud.com>
Link: https://github.com/openwrt/openwrt/pull/22185
Signed-off-by: Robert Marko <robimarko@gmail.com>
Rename Device/tplink_rex5x-v1 to tplink_rex5x. Make RE355 v1, RE450 v1,
and RE450 v2 inherit from it, removing duplicated fields from RE450 v2.
Signed-off-by: Ivan Diaz <diaz.it@icloud.com>
Link: https://github.com/openwrt/openwrt/pull/22185
Signed-off-by: Robert Marko <robimarko@gmail.com>
Refresh kernel patches with make target/linux/refresh for each target.
Signed-off-by: Jonas Jelonek <jelonek.jonas@gmail.com>
Link: https://github.com/openwrt/openwrt/pull/22206
Signed-off-by: Robert Marko <robimarko@gmail.com>
The single user of the downstream gpio-cascade driver has been switched
to use the upstream gpio-line-mux driver. Thus, we can drop the former
now.
Signed-off-by: Jonas Jelonek <jelonek.jonas@gmail.com>
Link: https://github.com/openwrt/openwrt/pull/22206
Signed-off-by: Robert Marko <robimarko@gmail.com>
The GPIO cascade driver is a downstream-only driver and the Buffalo
WZR-HP-G300NH is its only user for now. Recently, a similar and
independently developed driver 'gpio-line-mux `which serves the same
purpose was accepted upstream and backported here. Use that instead the
downstream driver.
Signed-off-by: Jonas Jelonek <jelonek.jonas@gmail.com>
Link: https://github.com/openwrt/openwrt/pull/22206
Signed-off-by: Robert Marko <robimarko@gmail.com>
Backport the upstream 'gpio-line-mux' driver which allows to provide a
1-to-many mapping between one physical GPIO and multiple virtual GPIOs,
based on a multiplexer.
For this purpose, there's been a dedicated downstream driver
'gpio-cascade' which is mostly the same, but wasn't upstreamed in the
end. Independently developed, the 'gpio-line-mux' driver was upstreamed
to solve the exact same problem occuring on Realtek-based Zyxel XS1930
switches. Support for those is being worked on, but the hardware uses a
similar quirk for SFP signals. The signals 'RX_LOS', 'MOD_ABS' and
'TX_FAULT' do not have dedicated GPIOs each but all use a single GPIO
which is multiplexed. Depending on the multiplexer state the GPIO line is
connected to one of the signals.
Since the SFP driver needs single GPIOs for the single signals, this
adapter drivers fills the gap to make both work together.
Signed-off-by: Jonas Jelonek <jelonek.jonas@gmail.com>
Link: https://github.com/openwrt/openwrt/pull/22206
Signed-off-by: Robert Marko <robimarko@gmail.com>
Add ubi nvmem driver, required to load nvmem entries from ubi volumes
Signed-off-by: Dirk Buchwalder <buchwalder@posteo.de>
Link: https://github.com/openwrt/openwrt/pull/22151
Signed-off-by: Christian Marangi <ansuelsmth@gmail.com>
Enable fitblk driver, required to parse the fit image and set-up the rootfs volume
Signed-off-by: Dirk Buchwalder <buchwalder@posteo.de>
Link: https://github.com/openwrt/openwrt/pull/22151
Signed-off-by: Christian Marangi <ansuelsmth@gmail.com>
Due to issues surrounding the implementation of the vendor BMT/BBT
on Airoha, upstream ATF + uboot has switched to UBI flash partitions.
However, some devices shipped on this platform are bootloader locked,
and thus it is impossible to replace ATF + uboot.
During testing for the Gemtek W1700K (#17869), sysupgrades from Linux
(which is unaware of the underlying BMT/BBT) would occasionally write
data into blocks which were remapped by the vendor uboot when it was
read on the following reboot, causing a soft brick.
An acceptable workaround [1],[2] was discussed where an intermediate
uboot would be written by the vendor uboot (which is aware of Airoha
BMT/BBT). This chainloader would then ignore the regions of flash
used by the vendor uboot, and store all relevant data inside of UBI.
UBI would then be used to handle bad block management. As the vendor
ATF + uboot do not read or interact with the UBI region, we would avoid
unwanted remaps from BMT/BBT.
This commit introduces support for building such a chainloader, by
packaging u-boot and DTS into a FIT image; to be flashed like a kernel.
Configuration for the Gemtek W1700K is provided as an example of how the
chainloader is used.
[1] https://github.com/openwrt/openwrt/pull/17869#discussion_r2836066746
[2] https://github.com/openwrt/openwrt/pull/17869#discussion_r2838395671
Signed-off-by: Kenneth Kasilag <kenneth@kasilag.me>
[ move FIP_COMPRESS to Build/Compile, wrap some long lines ]
Link: https://github.com/openwrt/openwrt/pull/22151
Signed-off-by: Christian Marangi <ansuelsmth@gmail.com>
Add a backport patch of realtek ecc driver which has been accepted
upstream. It enables us to make use of devices with NAND that have
OOB size larger than 64 and utilize Realtek ECC engine in OpenWrt.
Signed-off-by: Rustam Adilov <adilov@tutamail.com>
Link: https://github.com/openwrt/openwrt/pull/22243
Signed-off-by: Robert Marko <robimarko@gmail.com>
The attributes "is2G5" and "is10G" are set but never used. Drop them.
Signed-off-by: Markus Stockhausen <markus.stockhausen@gmx.de>
Link: https://github.com/openwrt/openwrt/pull/22255
Signed-off-by: Robert Marko <robimarko@gmail.com>
Adapt the prefix of the port structure.
Signed-off-by: Markus Stockhausen <markus.stockhausen@gmx.de>
Link: https://github.com/openwrt/openwrt/pull/22255
Signed-off-by: Robert Marko <robimarko@gmail.com>
pcs is currently a standalone array for the pcs of each port.
Convert it to an attribute of the port structure and thus move
it where it belongs.
Signed-off-by: Markus Stockhausen <markus.stockhausen@gmx.de>
Link: https://github.com/openwrt/openwrt/pull/22255
Signed-off-by: Robert Marko <robimarko@gmail.com>
Enable Kernel Address Space Layout Randomization (KASLR) on the MT7622
platform. Note that this requires the bootloader to provide the kaslr-seed!
Signed-off-by: Daniel Golle <daniel@makrotopia.org>
Enable Kernel Address Space Layout Randomization (KASLR) on the MT7622
platform. Note that this requires the bootloader to provide the kaslr-seed!
Signed-off-by: Daniel Golle <daniel@makrotopia.org>
Replace the downstream mtk-rng-v2 driver which was acquires random bytes
from TF-A via SMC. A new approach is needed as TF-A for MT7986 has
changed and now requires to use SMC instead of directly accessing the
TRNG via MMIO. However, we can't know whether we are on old or new TF-A,
many devices (like the BananaPi BPi-R3) allow updating TF-A BL3 in the
field, so it may be of the old or new type, and the RNG driver will have
to figure it out somehow.
This currently means that MT7986 with newer TF-A has broken/non-working
HWRNG in Linux:
root@OpenWrt:~# hexdump -C /dev/hwrng
hexdump: /dev/hwrng: I/O error
Fix this by creating a new combined driver which replaces the previous
mtk-rng-v2 driver, and is able to auto-detect which convention to use
on MT7986.
Signed-off-by: Daniel Golle <daniel@makrotopia.org>
The MeshPoint.One was disabled during the DSA migration with the
comment "Missing DSA Setup". However, this device inherits its
entire network configuration from 8dev Jalapeno via the
Device/8dev_jalapeno-common template, and shares the same DSA
network setup in 02_network.
The Jalapeno has been working with DSA since the migration. All
MeshPoint.One board support files (DTS, network config, LED config)
are already in place and reference the same QCA8072 switch
configuration as the Jalapeno.
Hardware: Qualcomm IPQ4018, QCA8072 switch, same as 8dev Jalapeno.
Tested: Built firmware from current main branch, boots and network
functions correctly.
Signed-off-by: Valent Turkovic <valent@meshpointone.com>
Link: https://github.com/openwrt/openwrt/pull/22258
Signed-off-by: Robert Marko <robimarko@gmail.com>
Some MT7621 devices also have I2C peripherals.
Signed-off-by: Shiji Yang <yangshiji66@outlook.com>
Link: https://github.com/openwrt/openwrt/pull/22213
Signed-off-by: Robert Marko <robimarko@gmail.com>
rtldsa_get_mib_desc() is always well defined and only looks into
the configuration structure. Drop it and use direct data assignment
where needed. While we are here drop all NULL checks because
mib_desc is never unset.
Signed-off-by: Markus Stockhausen <markus.stockhausen@gmx.de>
Link: https://github.com/openwrt/openwrt/pull/22219
Signed-off-by: Robert Marko <robimarko@gmail.com>
The device specific mib descriptors are located in dsa.c and
rtldsa_get_mib_desc() selects the right decriptor for the caller
based on family_id from the private structure. That makes not
much sense and is not wanted
Move the descriptors into their corresponding files and link
them directly to the config structure. Simplify the selector
by directly returning the linked data.
Signed-off-by: Markus Stockhausen <markus.stockhausen@gmx.de>
Link: https://github.com/openwrt/openwrt/pull/22219
Signed-off-by: Robert Marko <robimarko@gmail.com>
The "ports" node was renamed. Update driver to match device-tree.
Cc: Markus Stockhausen <markus.stockhausen@gmx.de>
Fixes: 63729a8d6e ("realtek: dts: replace ports by ethernet-ports")
Signed-off-by: Bjørn Mork <bjorn@mork.no>
Link: https://github.com/openwrt/openwrt/pull/22242
Signed-off-by: Robert Marko <robimarko@gmail.com>
This access point is a ‘friend’ of the T56 supplied by Odido but with DDR3 RAM and with two Ethernet 2.5 (GPY211)
The flash procedure is similar to other Zyxel T56/EX5600/EX5601
If you need backup please use the T56 guide
Please refer to https://openwrt.org/inbox/toh/zyxel/wx5600-t0 for detailed flash informations
Specifications:
SOC: MT7986b
RAM: 512MB
Flash: 512 MB SPI NAND
Ports: 2 LAN 2.5Gbps (GPY211C)
WIFI: MT7976GN + MT7976AN
LED: 3 bicolor LED - 1 monocolor LED
Buttons: Reset and WPS
We can install all with U-boot and mtk_uartboot.
Load Uboot:
```
./mtk_uartboot -a -p ./mt7986-ram-ddr3-bl2.bin -s /dev/ttyUSB0 -f openwrt-mediatek-filogic-zyxel_wx5600-t0-ubootmod-bl31-uboot.fip
```
**WARNING: Please use a GBIT ethernet or force it on system**
**WARNING: Please use only LAN2 port in Uboot**
Press 0 on Bootmenu
```
mtd erase ubi
run ubi_format
bootmenu
```
Load and write BL2 and U-boot:
```
8
7
```
Load and write recovery and production
```
6
5
```
Signed-off-by: Valerio 'ftp21' Mancini <ftp21@ftp21.eu>
Co-authored-by: Hal Martin <halmartin@gmail.com>
Link: https://github.com/openwrt/openwrt/pull/18364
Signed-off-by: Christian Marangi <ansuelsmth@gmail.com>
This STC8 microcontroller is used on a range of Hasivo managed switches.
It typically performs some fan/thermal control, and also has some
discrete IO hanging off of it.
The fan/thermal control is still somewhat unknown at this stage, but the
LED / gpio control has been determined as being two I2C registers which
need to be written to with a 'typical' Hasivo 0x40 execute mask set, to
change values.
Rather than having this expose the LED functionality / thermal control
directly, just represent it as an mfd, with some configurable OR'ing of
an execute-bit to certain registers (execute-bit-regs). This way different
STC8 arrangements can hopefully be handled by devicetree configs rather
than needing new driver code.
Signed-off-by: Bevan Weiss <bevan.weiss@gmail.com>
Link: https://github.com/openwrt/openwrt/pull/21578
Signed-off-by: Hauke Mehrtens <hauke@hauke-m.de>
Add the unnamed partition between rwfs and reservearea to fully describe
the flash layout.
Signed-off-by: Ahmed Naseef <naseefkm@gmail.com>
Link: https://github.com/openwrt/openwrt/pull/22195
Signed-off-by: Hauke Mehrtens <hauke@hauke-m.de>
The 2.4 GHz and 5 GHz WiFi eeprom cell references were assigned to the
wrong PCIe slots. Swap them so slot0 (2.4 GHz) uses the eeprom at
0x1c0000 and slot1 (5 GHz) uses the eeprom at 0x40000. Fix the eeprom
cell lengths to match the sizes expected by their respective drivers.
Fixes: be24a13ad5 ("econet: en7528: add PCIe and WiFi support")
Signed-off-by: Ahmed Naseef <naseefkm@gmail.com>
Link: https://github.com/openwrt/openwrt/pull/22195
Signed-off-by: Hauke Mehrtens <hauke@hauke-m.de>
The sys_led node in the device tree is wrong and doesn't work. On GPIO
23 nothing seems to be connected. The switch has a SYS LED but as with a
lot other Realtek switches, this LED is connected to the pin A0, which
can be driven as GPIO0 or system LED. The hardware-assisted behavior is
configured during boot by u-boot.
Though it is be possible to deactivate the hardware-assisted behavior
and give userspace control over the LED, it doesn't work for this
switch. XikeStor apparently decided to hook the SYS LED to some kind of
external watchdog. This one seems to expect a LOW signal on that line
periodically. This leaves room for two options:
1) keep behavior and let the LED blink as configured by u-boot
2) turn off LED completely
Option 2) is rather odd and may confuse users, thus it is better to keep
the behavior as-is for now. u-boot configures the LED to blink fast
which might be annoying. As soon as we have a way in the device tree to
specify different blinking frequencies as supported by the hardware,
this can be smoothened.
Signed-off-by: Jonas Jelonek <jelonek.jonas@gmail.com>
Link: https://github.com/openwrt/openwrt/pull/22211
Signed-off-by: Hauke Mehrtens <hauke@hauke-m.de>
The XikeStor SKS8310-8X has a monitoring IC LM75B from National
Instruments on board. This was missed when support for the device was
added. Add it now and also add the corresponding kmod to the device
packages.
Fixes: 62d50fb196 ("realtek: add support for XikeStor SKS8310-8X")
Signed-off-by: Jonas Jelonek <jelonek.jonas@gmail.com>
Link: https://github.com/openwrt/openwrt/pull/22211
Signed-off-by: Hauke Mehrtens <hauke@hauke-m.de>
Define an nvmem cell in the device tree of XikeStor SKS8310-8X to
reference that as a source for the MAC address of the switch (ports).
This eliminates the need for the userspace script to read and parse the
MAC address.
Signed-off-by: Jonas Jelonek <jelonek.jonas@gmail.com>
Link: https://github.com/openwrt/openwrt/pull/22211
Signed-off-by: Hauke Mehrtens <hauke@hauke-m.de>
rtmdio_probe() uses for_each_phy() to access dn[]. This will point
to initialized entries. No need to clear that array in advance.
Signed-off-by: Markus Stockhausen <markus.stockhausen@gmx.de>
Link: https://github.com/openwrt/openwrt/pull/22131
Signed-off-by: Hauke Mehrtens <hauke@hauke-m.de>
Get rid of the port variables. Use addr for phy address like
upstream kernel does for the whole phy/mdio subsystem.
Signed-off-by: Markus Stockhausen <markus.stockhausen@gmx.de>
Link: https://github.com/openwrt/openwrt/pull/22131
Signed-off-by: Hauke Mehrtens <hauke@hauke-m.de>
As with all the rest align the define to reflect that the
driver deals with phys.
Signed-off-by: Markus Stockhausen <markus.stockhausen@gmx.de>
Link: https://github.com/openwrt/openwrt/pull/22131
Signed-off-by: Hauke Mehrtens <hauke@hauke-m.de>
For some functions the mmd access parameter naming differs
from the rest of the driver. Convert remaining addr/reg
parameters to devnum/regnum.
Signed-off-by: Markus Stockhausen <markus.stockhausen@gmx.de>
Link: https://github.com/openwrt/openwrt/pull/22131
Signed-off-by: Hauke Mehrtens <hauke@hauke-m.de>
The driver covers phys and not ports. Adapt the iterator to
align with this naming convention. While we are here convert
some open coding to this iterator macro.
Signed-off-by: Markus Stockhausen <markus.stockhausen@gmx.de>
Link: https://github.com/openwrt/openwrt/pull/22131
Signed-off-by: Hauke Mehrtens <hauke@hauke-m.de>
The mdio driver is about phys and not about the (dsa) port number
of the cpu. This was a generic alias when all of this was part
of a big large mdio/ethernet driver. Give the cpu_port variable
a new name that better fits to the mdio context.
Signed-off-by: Markus Stockhausen <markus.stockhausen@gmx.de>
Link: https://github.com/openwrt/openwrt/pull/22131
Signed-off-by: Hauke Mehrtens <hauke@hauke-m.de>
In most drivers upstream use "ethernet-ports" instead of "ports"
in dts. Especially the upstream rtl9300 mdio driver uses this to
lookup the port/phy mapping. Do the same downstream. There is no
need to adapt the dsa driver because it scans the dts via
for_each_node_by_name(dn, "port").
Signed-off-by: Markus Stockhausen <markus.stockhausen@gmx.de>
Link: https://github.com/openwrt/openwrt/pull/22149
Signed-off-by: Hauke Mehrtens <hauke@hauke-m.de>
There are a number of pse chips already present in upstream Linux.
OpenWrt is starting to support a number of devices can contain various pse
chips. But having all the pse chip combinations defined at the target
level will result in bloat on images.
Present the current upstream Linux pse drivers as packages so that they
can be selectively included per board (rather than per target).
Signed-off-by: Bevan Weiss <bevan.weiss@gmail.com>
[Make it depend on REGULATOR_SUPPORT, and !SMALL_FLASH]
Link: https://github.com/openwrt/openwrt/pull/22172
Signed-off-by: Robert Marko <robimarko@gmail.com>
Add some additional Gateworks Venice boards to sysupgrade support.
Signed-off-by: Tim Harvey <tharvey@gateworks.com>
Link: https://github.com/openwrt/openwrt/pull/22202
Signed-off-by: Robert Marko <robimarko@gmail.com>
The device has 1 100MBit/s port. By default the PHY firmware is running
in 1GBit/s mode. The driver will try to load the 1GBit/s firmware and
fail if it is not there. Set the GPHY0 also to 100MBit/s mode.
The driver uses all nodes independent of the status attribute.
Do the same fix for AVM FRITZ!Box 7412 too.
Reported-by: Achelon in OpenWrt forum
Fixes: https://github.com/openwrt/openwrt/issues/21836
Link: https://github.com/openwrt/openwrt/pull/22188
Signed-off-by: Hauke Mehrtens <hauke@hauke-m.de>
So far we are only associating and using a VLAN profile ID of 0 to any
VLAN ID, VLAN profile ID 1 is unused. Therefore we can safely remove its
initialization, just like we don't initialize any of VLAN profile IDs
2 to 7 on rtl83xx/rtl930x or 2 to 15 on rtl931x.
Signed-off-by: Linus Lüssing <linus.luessing@c0d3.blue>
Link: https://github.com/openwrt/openwrt/pull/21872
Signed-off-by: Robert Marko <robimarko@gmail.com>
The special all-ports multicast portmasks table entry would be written
twice, redundantly as vlan_profile_setup() is called twice. Which is
unnecessary. Writing this reserved multicast portmask entry is
independent of a VLAN profile, therefore let's move this to a more
suitable position.
Signed-off-by: Linus Lüssing <linus.luessing@c0d3.blue>
Link: https://github.com/openwrt/openwrt/pull/21872
Signed-off-by: Robert Marko <robimarko@gmail.com>
Prepare portmasks, vlan profiles and vlans for changes
in upcoming patches by exporting them to debugfs for easier
debugging and monitoring.
Signed-off-by: Linus Lüssing <linus.luessing@c0d3.blue>
Link: https://github.com/openwrt/openwrt/pull/21872
Signed-off-by: Robert Marko <robimarko@gmail.com>
Advertise the default 'not set' of this CONFIG higher in the tree since
it's already referenced by several other targets, with a few more targets
missing this reference (which fails build to prompt for N/y/m).
Signed-off-by: Bevan Weiss <bevan.weiss@gmail.com>
Make use of the new fast_age() helpers for the RTL83xx targets.
For this:
- split the existing rtldsa_83xx_fast_age() into two device
specific functions. This removes a family_id check.
- change the callbacks in the config structures
Signed-off-by: Markus Stockhausen <markus.stockhausen@gmx.de>
Link: https://github.com/openwrt/openwrt/pull/22145
Signed-off-by: Robert Marko <robimarko@gmail.com>
The driver has a generic fast_age() function. Use it in the
dsa specific callback port_fast_age() for RTL93xx.
Signed-off-by: Markus Stockhausen <markus.stockhausen@gmx.de>
Link: https://github.com/openwrt/openwrt/pull/22145
Signed-off-by: Robert Marko <robimarko@gmail.com>
Fast ageing of L2 entries is supported by DSA with two callbacks.
- port_fast_age(): age out for one port
- port_vlan_fast_age(): age out for one vlan on one port
Independent from the SoC it always boils down to issue a command
to the L2_TBL_FLUSH_CTRL register. Nevertheless the current
implemententation is repeated multiple times and makes use of
the family_id.
As a first refactoring step provide generic fast_age() functions
for RTL930x and RTL931x by rearranging the existing definitions
of vlan_port_fast_age().
The logic is as follows:
- provide a SoC dependent function that works with or without VLAN.
When VLAN/VID = -1 only flush the specific port otherwise only
flush given VLAN on port.
- provide a port_fast_age() helper that calls the SoC specific
functions with VLAN = -1.
- provide a port_vlan_fast_age() helper that calls the SOC specific
functions and handing over the given VLAN.
Signed-off-by: Markus Stockhausen <markus.stockhausen@gmx.de>
Link: https://github.com/openwrt/openwrt/pull/22145
Signed-off-by: Robert Marko <robimarko@gmail.com>
This is a preparation for the dsa fast_age() logic refactoring.
Rename two functions that will get removed later.
Signed-off-by: Markus Stockhausen <markus.stockhausen@gmx.de>
Link: https://github.com/openwrt/openwrt/pull/22145
Signed-off-by: Robert Marko <robimarko@gmail.com>
Remove defines and variables that are no longer used.
Signed-off-by: Markus Stockhausen <markus.stockhausen@gmx.de>
Link: https://github.com/openwrt/openwrt/pull/22156
Signed-off-by: Robert Marko <robimarko@gmail.com>
rteth_hw_receive() already has a loop that checks how much work
may be done. No need to repeat that in the caller too. While we
are here adapt the function prefix.
Signed-off-by: Markus Stockhausen <markus.stockhausen@gmx.de>
Link: https://github.com/openwrt/openwrt/pull/22156
Signed-off-by: Robert Marko <robimarko@gmail.com>
With latest refactoring irq activation and deactivation is side-by-side
in the code. This makes it easier to align these functions. Current
assumption is, that the ethernet irq is only called on one cpu and
napi handling does not interfere. So it should be totally fine to
run irq disabling (called from interrupt handler) without locks.
Nevertheless be defensive and add a lock(). So in the case the ethernet
irq is fired twice on two cpus (e.g. RTL931x) the code is on the
safe side.
Signed-off-by: Markus Stockhausen <markus.stockhausen@gmx.de>
Link: https://github.com/openwrt/openwrt/pull/22156
Signed-off-by: Robert Marko <robimarko@gmail.com>
Once again there is a family_id check. This time around the irq
reactivation in the receive path. For cleanup and better readability
add a helper directly besides its already existing counterpart
rteth_confirm_and_disable_irqs(). With that drop unneeded defines.
Signed-off-by: Markus Stockhausen <markus.stockhausen@gmx.de>
Link: https://github.com/openwrt/openwrt/pull/22156
Signed-off-by: Robert Marko <robimarko@gmail.com>
This reverts commit 9dbd45c187.
Compared to ralink,mtd-eeprom , the nvmewm binding ends up byteswapping
the data on big endian hosts. Meaning on big endian, the nvmwem binding
is equivalent to:
ralink,mtd-eeprom +
ralink,eeprom-wrap
Revert as a result since there's no eeprom-swap here.
Signed-off-by: Rosen Penev <rosenp@gmail.com>
Link: https://github.com/openwrt/openwrt/pull/22192
Signed-off-by: Robert Marko <robimarko@gmail.com>
CONFIG_REGULATOR_QCOM_LABIBB is being disabled by targets manually, so
instead lets disable it in generic config.
Signed-off-by: Robert Marko <robimarko@gmail.com>
Instead of disabling CONFIG_REGULATOR_QCOM_SPMI manually per target,
lets simply disable it in generic config.
Signed-off-by: Robert Marko <robimarko@gmail.com>
CONFIG_REGULATOR_QCOM_USB_VBUS showed up on Layerscape recently, and it
looks like multiple targets disable it manually, so simply disable it in
generic configuration instead.
Signed-off-by: Robert Marko <robimarko@gmail.com>
Enable and configure DMA contiguous memory allocator. Without this
CMA itself will be disabled.
Fixes: ae8bf1a26e ("imx: add imx8m support")
Signed-off-by: Tim Harvey <tharvey@gateworks.com>
Link: https://github.com/openwrt/openwrt/pull/21950
Signed-off-by: Robert Marko <robimarko@gmail.com>
The configuration for the dlink,dir-1360-a1 also changed the settings
for the devices defined on top of it. "lan1 lan2 lan3 lan4" "wan" is
the default configuration, no need to add it here.
Fixes: 7a8e2efed5 ("ramips: add support for D-Link DIR-1360 A1")
Reported-by: schmars in IRC
Link: https://github.com/openwrt/openwrt/pull/22179
Signed-off-by: Hauke Mehrtens <hauke@hauke-m.de>
Userspace handling is deprecated. Once mac-base goes upstream, the patch
itself can go upstream as well.
Signed-off-by: Rosen Penev <rosenp@gmail.com>
Link: https://github.com/openwrt/openwrt/pull/22058
Signed-off-by: Robert Marko <robimarko@gmail.com>
Use clock index macros defined in dt-bindings header to improve the
code readability.
Signed-off-by: Shiji Yang <yangshiji66@outlook.com>
Link: https://github.com/openwrt/openwrt/pull/22163
Signed-off-by: Robert Marko <robimarko@gmail.com>
The GPIO line connecting to the reset signals of the GS1900-24E(A1)'s
external ICs (RTL8218B phys and RTL8231 expander) cannot be asserted by
the MDIO subsystem, as the reset is shared between busses.
To prevent users from accidentally asserting the reset line, a GPIO hog
is created to permanently de-assert the signal, reliably keeping the
phys and GPIO expanders on.
Tested-by: Simon Fischer <simi.fischa@gmail.com>
Signed-off-by: Sander Vanheule <sander@svanheule.net>
The reset line wired to the RTL8231 on the GS1900 series may also
connect to other external ICs on the board. On the GS1900-24E, the
reset line is wired (via buffers) to the board's RTL8231 expanders and
the RTL8218 phys. As these external devices (phys) are on different
busses, the reset line shouldn't be specified on one bus or the other.
Drop the reset specification from the generic GPIO description, so it
can be added back on a per-device basis after confirming the behavior.
Link: https://github.com/openwrt/openwrt/issues/18620
Fixes: fd978c2e80b4 ("realtek: Enable Zyxel GS1900's RTL8231 reset line")
Signed-off-by: Sander Vanheule <sander@svanheule.net>
The DASAN H660GM-A GPON ONT exists in two hardware variants, one
distributed by ISPs and one sold directly by the manufacturer [1].
Split the single DTS into a shared dtsi and per-variant DTS files
with the correct GPIO mappings, flash layout, and LED definitions.
Variant comparison:
Feature | Airtel | Generic
---------------+---------------------------+-------------------------
Supplied by | Airtel Xstream Fiber | Retail
Flash | Micron MT29F2G01ABAGD | Micron MT29F1G01ABAFD
| 256 MB | 128 MB
Known P/N | DPW-G-P-66GMAZ-A3 | DPW:G-P-660GMAY-G0
| (some units unlabelled) | DPW:G-P-660GMAY-G3
WPS LED | Yes | No
WLAN button | No | Yes
USB LED | No | Yes
LAN LEDs | Green only | Green + Amber
[1] https://dasanns.com/en/solution/detail.php?mode=view&cat_no=32&offset=&idx=122
Tested-by: Arif Rahman Hakim <arif2785id@gmail.com>
Signed-off-by: Ahmed Naseef <naseefkm@gmail.com>
Link: https://github.com/openwrt/openwrt/pull/22095
Signed-off-by: Hauke Mehrtens <hauke@hauke-m.de>
On MT7620-class platforms (CONFIG_NET_RALINK_MT7620) we observe sporadic
wrong-jump-targets, kernel oopses, hanging, corrupted backtraces or even
"half-written" instructions when the compiler emits a direct 'jal imm26'
call.
This is triggered in:
- the small random helpers inside get_random_u32_below(), and
- the blkcg_maybe_throttle_current() call in resume_user_mode_work().
This patch forces those two call sites to use an indirect call via
a volatile function pointer (load into register + jalr) when building
for MT7620, avoiding embedding a 26-bit immediate jump target.
Additionally, on MT7620 builds the exec path in fs/exec.c is modified:
- skip arch_align_stack() + PAGE_ALIGN() in setup_arg_pages()
because the micro-randomization (< PAGE_SIZE) implemented by many
ports (including MT7620) is negated immediately by PAGE_ALIGN().
Skipping the redundant PAGE_ALIGN() reduces exposure to the
problematic code pattern.
These changes are targeted workarounds for MT7620; behavioral logic is unchanged.
Signed-off-by: Mieczyslaw Nalewaj <namiltd@yahoo.com>
Link: https://github.com/openwrt/openwrt/pull/20553
Signed-off-by: Robert Marko <robimarko@gmail.com>
Instead of redifining the DEVICE_PACKAGES, make sure to expand the list
so yafut is included by default as well.
Fixes: 42cd486787 ("ath79: remove kmod-ath9k and wpad from Mikrotik RB750r2")
Signed-off-by: Robert Marko <robimarko@gmail.com>
The KSZ9477 driver was added to the cortexa53 kernel to support the
Gateworks Venice product family which has a board with this switch. Now
that the kmod-dsa-ksz9477 driver is available as a package remove the
static configuration ad add the package.
This resolves an issue caused by having the switch driver static and the
PHY driver as a module such that the PHY driver was not registered early
enough to be used causing some errata to not be worked around.
Signed-off-by: Tim Harvey <tharvey@gateworks.com>
Link: https://github.com/openwrt/openwrt/pull/22120
Signed-off-by: Robert Marko <robimarko@gmail.com>
The makefile recipe is wrong and a module compilation tries
to build each object individually. Fix that. This allows to
build the dsa driver as a module.
Suggested-by: Balázs Triszka <info@balika011.hu>
Signed-off-by: Markus Stockhausen <markus.stockhausen@gmx.de>
Link: https://github.com/openwrt/openwrt/pull/22121
Signed-off-by: Robert Marko <robimarko@gmail.com>
The ethernet driver has a hard link to the dsa driver. Especially
the setup_tc() function must be available when the driver loads.
Decouple it by using a dsa callback recipe.
Suggested-by: Balázs Triszka <info@balika011.hu>
Signed-off-by: Markus Stockhausen <markus.stockhausen@gmx.de>
Link: https://github.com/openwrt/openwrt/pull/22121
Signed-off-by: Robert Marko <robimarko@gmail.com>
We do not want to rely on the soc_info structure. But at the moment
it is still referenced in several places. Add an EXPORT() to it.
So drivers that need access to this structure can be build as modules.
Suggested-by: Balázs Triszka <info@balika011.hu>
Signed-off-by: Markus Stockhausen <markus.stockhausen@gmx.de>
Link: https://github.com/openwrt/openwrt/pull/22121
Signed-off-by: Robert Marko <robimarko@gmail.com>
The RB750r2 (HEXLite) does not have wifi and those packages bloat the image
by a significant amount. When building a custom image with WireGuard and
booting that from initramfs, there wasn't enough space left in tmpfs to
upload and flash the squashfs image. Investigating what packages I could
remove, I discovered these unneeded ones.
Signed-off-by: Eicke Herbertz <wolletd@posteo.de>
Link: https://github.com/openwrt/openwrt/pull/22134
Signed-off-by: Robert Marko <robimarko@gmail.com>
Given that Linksys is the same brand and probably use the same OEM, it
stands to reason all devinfo hw_mac_addr implementations are the same.
Signed-off-by: Rosen Penev <rosenp@gmail.com>
Link: https://github.com/openwrt/openwrt/pull/22092
Signed-off-by: Robert Marko <robimarko@gmail.com>
Userspace handling is deprecated. NVMEM allows more flexibility in terms
of exotic setups while keeping correct MAC addresses.
env-size taken from file in uboot-envtools.
Signed-off-by: Rosen Penev <rosenp@gmail.com>
Link: https://github.com/openwrt/openwrt/pull/22107
Signed-off-by: Robert Marko <robimarko@gmail.com>
Userspace handling is deprecated. NVMEM allows flexibility in terms of
exotic setups by avoiding random MAC addresses.
u-boot env-size taken from the entry in uboot-envtools
Signed-off-by: Rosen Penev <rosenp@gmail.com>
Link: https://github.com/openwrt/openwrt/pull/22107
Signed-off-by: Robert Marko <robimarko@gmail.com>
Backport patches from upstream linux and mtk-openwrt-feeds to fix
MT7981 register offset issue and correct MT798x IES register config.
Signed-off-by: Shiji Yang <yangshiji66@outlook.com>
Link: https://github.com/openwrt/openwrt/pull/21423
Signed-off-by: Hauke Mehrtens <hauke@hauke-m.de>
The banana pi r4 comes with 2 sfp+ ports running at 10gbps
Readd support for aquantia sfp+ modules that was removed by
57a127c9e7Closes: #19878
Signed-off-by: Felix Baumann <felix.bau@gmx.de>
Link: https://github.com/openwrt/openwrt/pull/19884
Signed-off-by: Hauke Mehrtens <hauke@hauke-m.de>
Avoid a family_id check and derive the values from the cpu port.
Signed-off-by: Markus Stockhausen <markus.stockhausen@gmx.de>
Link: https://github.com/openwrt/openwrt/pull/22068
Signed-off-by: Hauke Mehrtens <hauke@hauke-m.de>
Place it where it belongs.
Signed-off-by: Markus Stockhausen <markus.stockhausen@gmx.de>
Link: https://github.com/openwrt/openwrt/pull/22068
Signed-off-by: Hauke Mehrtens <hauke@hauke-m.de>
Place it where it belongs.
Signed-off-by: Markus Stockhausen <markus.stockhausen@gmx.de>
Link: https://github.com/openwrt/openwrt/pull/22068
Signed-off-by: Hauke Mehrtens <hauke@hauke-m.de>
Two different irq handlers exist for RTL83xx and RTL93xx. Basically
they do always the same.
- Check transmit interrupts (not needed anymore)
- Check rx overflow interrupts (not needed anymore)
- Determine rx interrupts and queues that must be processed.
- In case of RTL839x check for L2 interrupts
With all the recent refactoring their logic is more or less the
same. Merge them into one handler. For better readability add a
helper that determines the work (aka rings) that needs to be
processed.
Signed-off-by: Markus Stockhausen <markus.stockhausen@gmx.de>
Link: https://github.com/openwrt/openwrt/pull/22023
Signed-off-by: Hauke Mehrtens <hauke@hauke-m.de>
There is a wrong port assignment for the 4 SFP+ ports
on that device. Additionally the transmit polarity
change option was missed. Fix that.
Fixes: f88135b ("realtek: add support for Linksys LGS352C")
Signed-off-by: Markus Stockhausen <markus.stockhausen@gmx.de>
Link: https://github.com/openwrt/openwrt/pull/22119
Signed-off-by: Robert Marko <robimarko@gmail.com>
RTL931x organizes MACs into 12 groups (one per SerDes) that must be
explicitly enabled before link establishment. Without initialization,
link may fail or packets may be corrupted, especially in USXGMII/XSGMII
modes. This is the case for devices which lack initialization by the
bootloader.
Simply enable all MACs in all groups by writing 0xffffffff to the
registers. Unused MACs and reserved bits are harmless, avoiding complex
logic to always set only needed MACs.
This is placed in the PCS driver since the MAC groups are assigned per
SerDes and the DSA driver lacks SerDes awareness (on purpose)
Signed-off-by: Jonas Jelonek <jelonek.jonas@gmail.com>
Link: https://github.com/openwrt/openwrt/pull/22088
Signed-off-by: Robert Marko <robimarko@gmail.com>
Hardware:
- SoC: RTL9313
- Memory: 512MB
- Flash: SPI-NOR 32MB (GigaDevice GD25Q256EFIR)
- Ethernet: 12x 1/2.5/10 Gbps (SFP+)
- LED/Keys (GPIO): 1x/1x
- UART: "Console" port on the front panel
- type: RS-232C
- connector: RJ-45
- settings: 9600n8 / 115200n8
- Watchdog: Diodes PT7A7514WE
- Monitoring: LM75A
- Power: 100-240 VAC 50/60 Hz C13/C14
Important notes:
---------------
* the device uses 9600 Baud by default but this extremely slows down the
device when using the serial console. OpenWrt is configured to use
115200 Baud. If you need to enter the bootloader, you need to use 9600
Baud.
* PT7A7514WE watchdog is fed through hardware-assisted SYS_LED. However,
the bootloader seems to deactivate that again during autoboot. There's
a quirk in early arch setup for this.
* a kernel binary "nos.img" needs to be stored into JFFS2 filesystem
using 4KiB erase block instead of 64KiB.
* V1 is the version with the 19"-sized case. As of 2026, there's a newer
version with a narrow case.
Flash instructions using initramfs image:
-----------------------------------------
(mostly taken from 0dc0b98295)
1. Prepare TFTP server with an IP address in 192.168.2.0/24.
2. Connect your PC to Port 1 on SKS8300-12X.
3. Power on SKS8300-12X and interrupt autoboot by Ctrl + B.
4. Login to the vendor CLI by Ctrl + F and "diagshell_unipoe_env" as password.
5. Switch baudrate to 115200 by running a command and then reconnect
with different settings:
baudrate 115200
6. Switch to U-Boot CLI by "debug_unish_env".
7. Enable Port 1 with the following commands:
rtk 10g 0 fiber1g # (or fiber10g if 10GBase-*R)
rtk ext-devInit 0 # init RTL8231 that holds SFP GPIOs
rtk ext-pinSet 2 0 # set tx-disable of port 1 to LOW
8. Transfer initramfs image via TFTP and boot it:
tftpboot 0x82000000 <serverip>:<image name>
bootm 0x82000000
9. On the initramfs image, backup the stock firmware if needed.
10. Upload (or download) sysupgrade image to the device.
11. Erase "firmware" partition to cleanup JFFS2 of stock FW:
mtd erase firmware
12. Perform sysupgrade with the sysupgrade image.
13. Wait until the flash completes and the system reboots into OpenWrt.
Reverting to stock firmware:
----------------------------
(taken from 0dc0b98295)
1. Prepare OpenWrt SDK to use the mkfs.jffs2 tool contained in it
Note: the official mkfs.jffs2 tool in mtd-utils doesn't support 4KiB
erase size and not usable for SKS8300-8X
2. Create a directory for working
3. Download official firmware for SKS8300-8X from XikeStor's official
website
4. Rename the downloaded firmware to "nos.img" and place it to the
working directory
5. Create a JFFS2 filesystem binary with the working directory
/path/to/mkfs.jffs2 -p -b -U -v -e 4KiB -x lzma \
-o nos.img.jffs2 -d /path/to/working/dir/
6. Upload the created JFFS2 filesystem binary to the device
7. Erase the "firmware" partition
mtd erase firmware
8. Write the JFFS2 filesystem binary to the "firmware" partition
mtd write /path/to/nos.img.jffs2 firmware
9. After writing, reboot the device by power cycle
Signed-off-by: Jonas Jelonek <jelonek.jonas@gmail.com>
Link: https://github.com/openwrt/openwrt/pull/21922
Signed-off-by: Hauke Mehrtens <hauke@hauke-m.de>
Make xikestor-nosimg a common recipe in the Makefile to allow usage for
other subtargets too, not only rtl930x.
Signed-off-by: Jonas Jelonek <jelonek.jonas@gmail.com>
Link: https://github.com/openwrt/openwrt/pull/21922
Signed-off-by: Hauke Mehrtens <hauke@hauke-m.de>
On some XikeStor switches (SKS8300-8X, SKS8300-12X), the SYS_LED/GPIO0 is
used to feed an external PT7A7514WE watchdog. While this was no issue on
SKS8300-8X, the bootloader on the SKS8300-12X seems to deactivate the
automatic feeding on purpose by setting the pin function of to GPIO0
instead of SYS_LED. This kills the periodic signal generated on that pin.
This causes the kernel to just stop quite early and reset the system
entirely.
Because this happens very early, it doesn't work to define this as a
pinctrl entry or GPIO hog. The drivers aren't even loaded at that stage.
To work around the issue, we need to configure this in the arch-specific
early setup. An affected device needs to have a corresponding node in
the DTS that is picked up then.
Signed-off-by: Jonas Jelonek <jelonek.jonas@gmail.com>
Link: https://github.com/openwrt/openwrt/pull/21922
Signed-off-by: Hauke Mehrtens <hauke@hauke-m.de>
Use NVMEM in device tree to set the label and eth0 MAC address based on
the U-Boot environment.
Invididual port MAC addresses and bridge MAC are still handled in the
02_network script to maintain the current assignment.
Signed-off-by: Jan Hoffmann <jan@3e8.eu>
Link: https://github.com/openwrt/openwrt/pull/22055
Signed-off-by: Hauke Mehrtens <hauke@hauke-m.de>
This is a preparation to convert some more RTL838x devices to NVMEM.
Signed-off-by: Jan Hoffmann <jan@3e8.eu>
Link: https://github.com/openwrt/openwrt/pull/22055
Signed-off-by: Hauke Mehrtens <hauke@hauke-m.de>
Startup of mdio on a RTL8216 based device currently shows the
following warnings.
[1.948608] skip polling setup for unknown PHY 001ccaf3 on port 0
[1.968920] skip polling setup for unknown PHY 001ccaf3 on port 8
[1.989171] skip polling setup for unknown PHY 001ccaf3 on port 16
[2.009704] skip polling setup for unknown PHY 001ccaf3 on port 20
[2.030209] skip polling setup for unknown PHY 001ccaf3 on port 24
[2.052270] realtek-otto-serdes-mdio 1b000000.switchcore:mdio-serdes:
Realtek SerDes mdio bus initialized, 12 SerDes, 64 pages
Add the phy detection to the mdio bus so that polling setup works.
While we are here sort the phy ids alphabetically.
Signed-off-by: Markus Stockhausen <markus.stockhausen@gmx.de>
Link: https://github.com/openwrt/openwrt/pull/22109
Signed-off-by: Hauke Mehrtens <hauke@hauke-m.de>
This reverts commit 72f43ac220.
The NVMEM codepath does not perform automatic byte conversion. It can be
fixed but the upstream version is quite different from the local
mac80211 patch. Revert until mac80211 gets updated and the whole mess
can get squared away.
Signed-off-by: Rosen Penev <rosenp@gmail.com>
Link: https://github.com/openwrt/openwrt/pull/22091
Signed-off-by: Robert Marko <robimarko@gmail.com>
Make clearer which field belongs to which register. For this
sort the fields below the registers and use indentation.
Signed-off-by: Markus Stockhausen <markus.stockhausen@gmx.de>
Link: https://github.com/openwrt/openwrt/pull/22075
Signed-off-by: Robert Marko <robimarko@gmail.com>
PHY polling setup has found a home in the mdio driver. For RTL931x
there still exists a setup sequence for polling type (serdes/mdio)
in the DSA driver. Put it where it belongs.
Signed-off-by: Markus Stockhausen <markus.stockhausen@gmx.de>
Link: https://github.com/openwrt/openwrt/pull/22075
Signed-off-by: Robert Marko <robimarko@gmail.com>
Get rid of defines that are not used in the driver.
Signed-off-by: Markus Stockhausen <markus.stockhausen@gmx.de>
Link: https://github.com/openwrt/openwrt/pull/22100
Signed-off-by: Robert Marko <robimarko@gmail.com>
This define is used nowhere. Remove it.
Signed-off-by: Markus Stockhausen <markus.stockhausen@gmx.de>
Link: https://github.com/openwrt/openwrt/pull/22100
Signed-off-by: Robert Marko <robimarko@gmail.com>
The MAC_FORCE_MODE_CTRL register is only used for the CPU port.
No need to repeat the port register calculation for each usage.
Simply point to the cpu port register directly.
Signed-off-by: Markus Stockhausen <markus.stockhausen@gmx.de>
Link: https://github.com/openwrt/openwrt/pull/22100
Signed-off-by: Robert Marko <robimarko@gmail.com>
Fixed the compilation of kernel with the loadable modules support turned off
Signed-off-by: Maksim Dmitrichenko <dmitrmax@gmail.com>
Link: https://github.com/openwrt/openwrt/pull/22041
Signed-off-by: Robert Marko <robimarko@gmail.com>
Remove unneeded includes from setup.c and adapt comments.
Signed-off-by: Markus Stockhausen <markus.stockhausen@gmx.de>
Link: https://github.com/openwrt/openwrt/pull/22084
Signed-off-by: Robert Marko <robimarko@gmail.com>
Add missing CONFIG_LEDS_QCOM_LPG symbol.
Signed-off-by: Ahmed Naseef <naseefkm@gmail.com>
Link: https://github.com/openwrt/openwrt/pull/22096
Signed-off-by: Robert Marko <robimarko@gmail.com>
Commit 041ef9648d ("qualcommbe: move Device DTS to dedicated DTS
directory") introduced a dedicated DTS directory and set DEVICE_DTS_DIR
to ../dts as default. This broke the rdp433 device build since its DTS
resides in the kernel tree (applied via patches), not in the target dts
directory.
Fix this by overriding DEVICE_DTS_DIR for rdp433 to point to the kernel
DTS directory.
Fixes: 041ef9648d ("qualcommbe: move Device DTS to dedicated DTS directory")
Signed-off-by: Ahmed Naseef <naseefkm@gmail.com>
Link: https://github.com/openwrt/openwrt/pull/22096
Signed-off-by: Robert Marko <robimarko@gmail.com>
Due to confusing Documentation, the SPI and SLIC base clock and
register location for Airoha AN7583 SoC were wrong.
Fix them with new updated Documentation source to provide correct
clock support.
Fixes: c5b12fc02a ("airoha: Introduce support for Airoha AN7583 SoC")
Signed-off-by: Christian Marangi <ansuelsmth@gmail.com>
Reuse Device/FitImage recipe instead of open coding it and
drop duplicate KERNEL_INITRAMFS recipe for eDPU.
While at it, lets clean up the boot script to drop uneeded console
setting, earlycon etc.
Signed-off-by: Robert Marko <robert.marko@sartura.hr>
Move the Device/FitImage recipe to the generic image Makefile to avoid
duplicating it for other subtargets.
Will be used for uDPU/eDPU.
Signed-off-by: Robert Marko <robert.marko@sartura.hr>
This allows to drop a family condition check and in the future
allows to merge nowadays splitted functions. While we are here
replace a hardcoded 0xc value with the new value for better
readability.
Signed-off-by: Markus Stockhausen <markus.stockhausen@gmx.de>
Link: https://github.com/openwrt/openwrt/pull/21999
Signed-off-by: Robert Marko <robimarko@gmail.com>
There is enough info in the control and config structures to derive
the device specific counter freeing. No need to write two different
functions.
Signed-off-by: Markus Stockhausen <markus.stockhausen@gmx.de>
Link: https://github.com/openwrt/openwrt/pull/21999
Signed-off-by: Robert Marko <robimarko@gmail.com>
Get away with another family check.
Signed-off-by: Markus Stockhausen <markus.stockhausen@gmx.de>
Link: https://github.com/openwrt/openwrt/pull/21999
Signed-off-by: Robert Marko <robimarko@gmail.com>
During transmit the driver must adapt the packet length. The
hardware requires at least a memory space of ETH_ZLEN bytes
data plus four bytes for layer 2 FCS. This was calculated
(somehow) but skb->len never got updated and for the minimum
length a RTL838x specific workaround was in place. Clean up
the code and use skb_put_padto() so the length change gets
reflected in skb->len.
While we are here drop zeroing DSA tag because it will be
overwritten by hardware for FCS.
Signed-off-by: Markus Stockhausen <markus.stockhausen@gmx.de>
Link: https://github.com/openwrt/openwrt/pull/21999
Signed-off-by: Robert Marko <robimarko@gmail.com>
Switch from auto-scan PHY discovery to explicit DT-based registration
using fwnode_mdiobus_register_phy(). This is the standard approach used
by of_mdiobus_register() and most MDIO drivers.
Auto-scan (phy_mask-based) registration does not attach DT fwnode data
to PHY devices, which means DT properties like "pses" are never parsed.
As a result, PSE controllers referenced from PHY nodes are not linked,
and ethtool PSE commands (--show-pse, --set-pse) do not work.
Store the device_node for each PHY found during DT parsing, suppress
auto-scan by setting phy_mask to ~0, and register each PHY explicitly
after devm_mdiobus_register(). This allows fwnode_find_pse_control() to
resolve PSE references and also establishes proper fw_devlink supplier
relationships.
Additionally this fixes a bug where the RTL8221B is limited to
1G and below due to missing DTS references.
Fixes: 4e00306 ("realtek: mdio: use bus auto registration")
Signed-off-by: Carlo Szelinsky <github@szelinsky.de>
Link: https://github.com/openwrt/openwrt/pull/22019
Signed-off-by: Robert Marko <robimarko@gmail.com>
This commit adds support for the Cisco Meraki MR70/Go GR60.
The Meraki MR70 is a Cisco 802.11ac/WiFi 5 outdoor AP with 1 Ethernet port.
It can be powered by a 12V DC barrel jack (5.5x2.5mm, center positive)
or via 802.3af POE.
The Meraki Go GR60 (codename: Dungbeetle Omni) is identical to the MR70
(codename: Toe Biter Omni), so this document will refer to both devices
as the MR70.
MR70 hardware info:
* CPU: Qualcomm IPQ4029
* RAM: 256MB DDR3
* Storage: 128 MB (TSOP48 NAND, 3.3V)
* Networking: 1 Gigabit Ethernet
* WiFi: QCA4019 802.11b/g/n/ac
* Serial: Internal header (J10, 2.54mm, unpopulated)
This device ships with secure boot, and cannot be flashed without
external programmers (TSOP48 NAND and I2C EEPROM)!
Disassembly:
Note: This is an outdoor device that is ultrasonically welded and glued
to weather seal it. Disassembly will compromise the weather seal!
Start by removing the product label on the rear metal mounting plate.
There are four Torx T8 screws under the sticker, remove the screws and
the mounting plate. Remove the two Philips screws under the plate.
Using a chisel (or razor blade) and hammer, cut around the circumfrence
of the device. You need to cut through approximately 2mm of
ultrasonically welded plastic.
After cutting through the plastic, heat the device using a hair drier
(or similar) to soften the glue. A heatgun is NOT recommended as
it will damage the plastic. It is only required to heat the device until
warm (~40C-50C).
Using a plastic pry tool, insert it along the cut you made around
the edge and gently separate. Insert a guitar pick into the opening
while gently lifting the front to cut the glue. The device is glued around
the entire circumfrence.
Once you have removed the plastic front, remove the 4 Philips screws
holding down the main PCB. Release the two WiFi antennas by gently
bending the antenna PCBs to the middle of the unit and pulling up.
Lift the top of the PCB gently while pushing the Ethernet port into the
housing to release it. Turn the PCB over and remove the three Philips
screws holding the metal heat spreader.
The TSOP48 NAND flash (U9, S34ML01G200 or W29N01HV) is located
under the metal heat spreader.
To flash, you need to desolder the TSOP48 or use a 360 clip.
You also need to reprogram the I2C EEPROM (U20, Atmel 24c64). It is not
necessary to desolder the I2C EEPROM, a ch341a USB programmer and SOP-8
clip are inexpensive (~$10) and work well.
Installation:
The dumps to flash can be found in this repository:
https://github.com/halmartin/meraki-openwrt-docs/tree/main/mr70_gr60
The device has the following flash layout (offsets with OOB data):
```
0x000000000000-0x000000100000 : "sbl1"
0x000000100000-0x000000200000 : "mibib"
0x000000200000-0x000000300000 : "bootconfig"
0x000000300000-0x000000400000 : "qsee"
0x000000400000-0x000000500000 : "qsee_alt"
0x000000500000-0x000000580000 : "cdt"
0x000000580000-0x000000600000 : "cdt_alt"
0x000000600000-0x000000680000 : "ddrparams"
0x000000700000-0x000000900000 : "u-boot"
0x000000900000-0x000000b00000 : "u-boot-backup"
0x000000b00000-0x000000b80000 : "ART"
0x000000c00000-0x000007c00000 : "ubi"
```
* Dump your original NAND (if using nanddump, include OOB data).
* Decompress `u-boot.bin.gz` dump from the GitHub repository above (dump
contains OOB data) and overwrite the `u-boot` portion of NAND from
`0x738000`-`0x948000` (length `0x210000`). Offsets here include OOB data.
* Decompress `ubi.bin.gz` dump from the GitHub repository above (dump
contains OOB data) and overwrite the `ubi` portion of NAND from
`0xc60000-0x7fe0000` (length `0x7380000`). Offsets here include OOB data.
* Dump your original EEPROM. Change the byte at offset `0x49` to `0x1e`
(originally `0x2d` or `0x26`). Remember to re-write the EEPROM with the
modified data.
* This can be done on Linux via the following command:
`printf "\x1e" | dd of=/tmp/eeprom.bin bs=1 seek=$((0x49)) conv=notrunc`
**Note**: the device will not boot if you modify the board major number and
have not yet overwritten the `ubi` and `u-boot` regions of NAND.
* Resolder the NAND after overwriting the `u-boot` and `ubi` regions.
OpenWrt Installation:
* After flashing NAND and EEPROM with external programmers. Plug in an
Ethernet cable and power up the device.
* The new U-Boot build uses the space character `" "` (without quotes) to
interrupt boot.
* Interrupt U-Boot and `tftpboot` the OpenWrt initramfs image from your
tftp server
```
dhcp
setenv serverip <your_tftp>
tftpboot openwrt-ipq40xx-generic-meraki_mr70-initramfs-uImage.itb
```
* Once booted into the OpenWrt initramfs, created the `ART` ubivol with
the WiFi radio calibration from the mtd partition:
```
cat /dev/mtd10 > /tmp/ART.bin
ubiupdatevol /dev/ubi0_1 /tmp/ART.bin
```
* `scp` the `sysupgrade` image to
the device and run the normal `sysupgrade` procedure:
```
scp -O openwrt-ipq40xx-generic-meraki_mr70-squashfs-sysupgrade.bin root@192.168.1.1:/tmp/
ssh root@192.168.1.1 "sysupgrade -n /tmp/openwrt-ipq40xx-generic-meraki_mr70-squashfs-sysupgrade.bin"
```
* OpenWrt should now be installed on the device.
Signed-off-by: Hal Martin <hal.martin@gmail.com>
Link: https://github.com/openwrt/openwrt/pull/22050
Signed-off-by: Robert Marko <robimarko@gmail.com>
Underdog devices lack a red LED, use the blue LED for
failsafe mode.
Move all config except device name to underdog.dtsi, as
all known underdog devices (MR20/GR10, MR70/GR60) have identical
device tree.
Signed-off-by: Hal Martin <hal.martin@gmail.com>
Link: https://github.com/openwrt/openwrt/pull/22050
Signed-off-by: Robert Marko <robimarko@gmail.com>
The sgmiisys0 override uses
/delete-node/ mediatek,pnswap;
but mediatek,pnswap is a property, not a child node. The correct
directive would be /delete-property/. As a result, this statement never
had any effect and the property was never removed.
Drop the incorrect override.
Signed-off-by: Maxim Anisimov <maxim.anisimov.ua@gmail.com>
Link: https://github.com/openwrt/openwrt/pull/22046
Signed-off-by: Robert Marko <robimarko@gmail.com>
No code changes. Just some explanation how these devices
work with physical and logical memory.
Signed-off-by: Markus Stockhausen <markus.stockhausen@gmx.de>
Link: https://github.com/openwrt/openwrt/pull/22054
Signed-off-by: Robert Marko <robimarko@gmail.com>
NVMEM in UBI support has been present for a while. Use it to get the
MACs. Seems caldata needs to continue to be obtained through userspace.
This fixes label-mac-device as it needs a mac-address nvmem cell.
Signed-off-by: Rosen Penev <rosenp@gmail.com>
Link: https://github.com/openwrt/openwrt/pull/17068
Signed-off-by: Robert Marko <robimarko@gmail.com>
Follow the recent change where all DTS files were moved to a dedicated dir.
Fixes: 3a39f682df ("qualcommax: ipq50xx: add support for CMCC MR3000D-CI")
Signed-off-by: Robert Marko <robimarko@gmail.com>
CMCC MR3000D-CI is a 2.4/5 GHz band 11ax (Wi-Fi 6) router, based on
IPQ5000.
Device specification
--------------------
- SoC : Qualcomm IPQ5018
- RAM : 512 MiB DDR3L
- Flash : 128 MiB SPI-NAND (GigaDevice GD5F1GQ5REYIG)
- WLAN : 2.4/5 GHz 2T2R
- 2.4 GHz : Qualcomm IPQ5018 (SoC)
- 5 GHz : Qualcomm Atheros QCN6102
- Ethernet : 4x 10/100/1000 Mbps
- Switch : Qualcomm Atheros QCA8337
- LEDs/Keys (GPIO) : 2x LEDs, 2x Buttons
- UART : Through-hole on PCB
- Voltage : 3.3 V
- Assignment : Silkscreened on PCB
- Settings : 115200n8
- Power : 12 VDC, 1.5 A
Installation
-----------------
1. Telnet method
a. Enable telnet
Log in to http://192.168.10.1/ with the password on the sticker
Modify URL according to example (keep your unique hash after ";stok=")
and press Enter:
http://192.168.10.1/cgi-bin/luci/;stok=78becad1b1490e45be2776025cde2b7d/api/NPCnetwork/ping?url=$(telnetd)
You should get the following in the browser:
{"link":0}
b. Run tftp server on IP 192.168.10.254 and put factory image
'openwrt-qualcommax-ipq50xx-cmcc_mr3000d-ci-squashfs-factory.ubi'
in the tftp root dir.
c. Login to 192.168.10.1 with telnet (user: root, pass: from the
sticker).
d. Download factory image from the tftp:
tftp -l factory.ubi -r openwrt-qualcommax-ipq50xx-cmcc_mr3000d-ci-squashfs-factory.ubi -g 192.168.10.254
e. Flash factory image:
export rootfs=$(cat /proc/mtd | grep rootfs | grep -v _ | cut -d: -f1)
ubidetach -f -p /dev/${rootfs}
ubiformat /dev/${rootfs} -y -f /tmp/factory.ubi
f. Reboot:
reboot
2. U-Boot Method using UBI Image (using UART)
a. Place the factory.ubi file on your TFTP server, enter U-Boot CLI
and exec these commands:
tftpboot <your_tftp_server_ip>:factory.ubi
flash rootfs
reset
3. U-Boot Method using initramfs Image (using UART)
a. Place the openwrt-*-initramfs-fit-uImage.itb file on your TFTP
server and rename it to initramfs.bin
b. Enable serial console, enter to U-Boot CLI and exec these commands:
tftpboot <your_tftp_server_ip>:initramfs.bin
bootm
c. Once boot completed, upload the sysupgrade.bin file to router's
/tmp directory (using scp or wget) and execute the following command
in openwrt shell:
sysupgrade -n /tmp/sysupgrade.bin
MAC Addresses
-------------
+--------------+-------------------+-------------+
| Interface | MAC example | Location |
+--------------+-------------------+-------------+
| LAN | 84:7a:xx:xx:xx:dd | 0:ART, 0x6 |
| WAN (label) | 84:7a:xx:xx:xx:dc | 0:ART, 0x0 |
| WLAN 2.4 GHz | 84:7a:xx:xx:xx:de | 0:ART, 0xc |
| WLAN 5 | 84:7a:xx:xx:xx:df | 0:ART, 0x12 |
+--------------+-------------------+-------------+
Notes
-----
1. U-Boot is protected by a password (pass: netpower).
Signed-off-by: Mikhail Zhilkin <csharper2005@gmail.com>
Link: https://github.com/openwrt/openwrt/pull/21952
Signed-off-by: Robert Marko <robimarko@gmail.com>
Add support for Teltonika RUT104 3G HSUPA router.
This has been supported since about 20 years in the upstream Linux
kernel after initial contribution by Paulius Zaleckas from Teltonika.
It has some historical significance because I think it was one of the
first Teltonika Linux-based 3G routers.
Installation from scratch is done using the UART:
- UART soldering instructions with picture are available on the
Link: (see bottom of committ message).
- First *diet down* your OpenWrt build as minimal as you can,
I really mean this, delete everything you don't need. There
is not much RAM to go around.
- Extract the "factory" firmare which is essentially just a tar.gz
archive:
tar xvfz openwrt-gemini-generic-teltonika_rut104-squashfs-factory.bin
From the RedBoot menu:
- Do NOT UNDER ANY CIRCUMSTANCE try to use the "upgrade firmare" (Z)
alternative!
- Extract the three files zImage, rd.gz and hddapp.tgz from the archive.
- Put these three files in the root directory of your TFTP server
(usually /var/lib/tftpboot)
- Hit 6 and set up the IP address for your device (e.g. 169.254.1.2 if
you're using local link).
- Hit Y to "Upgrade Kernel", enter TFTP and your hosts IP number and
type zImage. The kernel should upload and flash.
- Hit R to "Upgrade Ramdisk", enter TFTP and your hosts IP number and
type rd.gz. The "ramdisk" (i.e. the second part of the kernel)
should upload and flash.
- Hit A to "Upgrade Application", enter TFTP and your hosts IP number
and type hddapp.tgz. The "application" (i.e. the root filesystem)
should upload and flash.
This has a 1024KB Kernel partition, just extend the existing Make
functions to handle also this. The initramfs is 0x500000 instead
of 0x600000 for this one so add a parameter explicitly parameterizing
the initramfs size.
Mark non-default due to the small RAM and flash on this device.
I currently have no idea how to actually talk to the modem on this
thing but it is probably using the high-speed "modem UART" of the
Gemini. I'd be willing to help whoever wants to experiment with
it.
Link: https://dflund.se/~triad/krad/teltonika/
Link: https://github.com/openwrt/openwrt/pull/22045
Signed-off-by: Linus Walleij <linusw@kernel.org>
The target name of meraki_mx64-a0 in
target/linux/bcm53xx/image/Makefile used not to be consistent with the
one defined in target/linux/bcm53xx/base-files/lib/upgrade/platform.sh
and generates warning for "Image check failed" during sysupgrade.
This commit would also make the target name for meraki_mx64-a0 to
conform to the openwrt standard.
Signed-off-by: Edward Chow <equu@openmail.cc>
Link: https://github.com/openwrt/openwrt/pull/22034
Signed-off-by: Hauke Mehrtens <hauke@hauke-m.de>
The Linux kernel assumes that the u-boot environment covers the full
partition, but it only covers 0x1000 bytes. Linux checks the CRC and
does this over the full partition. This fails like this:
```
u-boot-env-layout 1f000000.spi:flash@0:partitions:partition@30000:nvmem-layout: Invalid calculated CRC32: 0xfcac8c41 (expected: 0x14e6335a)
u-boot-env-layout 1f000000.spi:flash@0:partitions:partition@30000:nvmem-layout: probe with driver u-boot-env-layout failed with error -22
```
Define the u-boot environment with a length of 0x1000 bytes to calculate
the CRC only over this area.
When replicating the u-boot environment with these parameters it
generates the same CRC:
```
mkenvimage -p 0 -b -s 0x1000 -o output.bin input.txt
```
Fixes: https://github.com/openwrt/openwrt/issues/21696
Fixes: 5e3a602def ("ath79: sitecom,wlrx100: use nvmem")
Link: https://github.com/openwrt/openwrt/pull/22030
Signed-off-by: Hauke Mehrtens <hauke@hauke-m.de>
If nvmem is used for ethernet mac address, we need to defer loading to
get the proper mac.
Signed-off-by: Rosen Penev <rosenp@gmail.com>
Link: https://github.com/openwrt/openwrt/pull/21955
Signed-off-by: Robert Marko <robimarko@gmail.com>
Device specific constants belong into the config structure.
No need to initialize them manually during probing within a
family_id switch statement. Although there are lots of constants
that need to be converted start with port_ignore as a simple one.
Signed-off-by: Markus Stockhausen <markus.stockhausen@gmx.de>
Link: https://github.com/openwrt/openwrt/pull/22026
Signed-off-by: Robert Marko <robimarko@gmail.com>
Add return value to function and add an internal pr_warn().
This simplifies the callers and avoids duplicate coding.
Signed-off-by: Markus Stockhausen <markus.stockhausen@gmx.de>
Link: https://github.com/openwrt/openwrt/pull/22008
Signed-off-by: Robert Marko <robimarko@gmail.com>
For better readability provide a macro to loop over all
active ports od the mdio bus.
Signed-off-by: Markus Stockhausen <markus.stockhausen@gmx.de>
Link: https://github.com/openwrt/openwrt/pull/22008
Signed-off-by: Robert Marko <robimarko@gmail.com>
On RTL930x, RTL931x and even RTL838x the smi topology is
configured very similar. There is a bus mapping (RTL930x
and RTL931x) and a port mapping (all three). Define a
common helper that can take care of this setup and call
it before bus registration.
Signed-off-by: Markus Stockhausen <markus.stockhausen@gmx.de>
Link: https://github.com/openwrt/openwrt/pull/22008
Signed-off-by: Robert Marko <robimarko@gmail.com>
Part of the configuration sequence for 1G operation can be identified as
setting autonegotiation to enabled for that mode. Starting from a previous
commit, this is being handled properly in the set_autoneg implementation.
Thus, remove that part from the sequence which doesn't make sense there
anymore and might just cause problems.
Signed-off-by: Jonas Jelonek <jelonek.jonas@gmail.com>
Link: https://github.com/openwrt/openwrt/pull/22013
Signed-off-by: Robert Marko <robimarko@gmail.com>
The autonegotiation setting might not have been working for RTL931x the
whole time. While there weren't any reports about issues so far, these
issues might just have been hidden behind other circumstances.
While all other variants of the Otto family have the corresponding
settings in [page 0x2 register 0x0] of a SerDes, RTL931x has a special
Front/Background SerDes architecture and actually moved the
autonegotiation settings to a digital Background SerDes. Since we use a
special mapping to have a consistent view on these Background SerDes,
RTL931x needs to write the settings to another page.
To fix this, adjust the autonegotiation setting for all variants. The
generic implementation is kept but uses per-variant register field
definitions. Those are added for all variants here, with the differing
page for RTL931x.
Another static data definition is renamed since it conflicts with a
change introduced here.
Signed-off-by: Jonas Jelonek <jelonek.jonas@gmail.com>
Link: https://github.com/openwrt/openwrt/pull/22013
Signed-off-by: Robert Marko <robimarko@gmail.com>
Slight differences between the variants of the Otto family are handled
so far handled using function indirection by defining per-variant
operations which are called from generic implementations. In several
case, this can still be optimized because the variants only differ in
some register addresses and/or bits while the procedure otherwise is
exactly the same.
To address this, add a new SerDes register struct where register fields
can be described and later used by generic implementations which otherwise
would need to be separate just because of slight differences. Add two
register fields for autonegotiation to that register struct which are
used by a successing patch to address a real issue.
Signed-off-by: Jonas Jelonek <jelonek.jonas@gmail.com>
Link: https://github.com/openwrt/openwrt/pull/22013
Signed-off-by: Robert Marko <robimarko@gmail.com>
Align the ipq40xx target to the pattern already used on other devices where
the device DTS are placed in a dedicated directory separate from the files
directory.
This, while trying to enforce a common pattern for every target, also permits to
do modification to device DTS without having to trigger a recompilation of the
entire kernel (as the files directory is not touched)
Link: https://github.com/openwrt/openwrt/pull/22040
Signed-off-by: Christian Marangi <ansuelsmth@gmail.com>
Align the ipq806x target to the pattern already used on other devices where
the device DTS are placed in a dedicated directory separate from the files
directory.
This, while trying to enforce a common pattern for every target, also permits to
do modification to device DTS without having to trigger a recompilation of the
entire kernel (as the files directory is not touched)
Link: https://github.com/openwrt/openwrt/pull/22039
Signed-off-by: Christian Marangi <ansuelsmth@gmail.com>
Align the qualcommbe target to the pattern already used on other devices where
the device DTS are placed in a dedicated directory separate from the files
directory.
This, while trying to enforce a common pattern for every target, also permits to
do modification to device DTS without having to trigger a recompilation of the
entire kernel (as the files directory is not touched)
Link: https://github.com/openwrt/openwrt/pull/22038
Signed-off-by: Christian Marangi <ansuelsmth@gmail.com>
Align the qualcommax target to the pattern already used on other devices where
the device DTS are placed in a dedicated directory separate from the files
directory.
This, while trying to enforce a common pattern for every target, also permits to
do modification to device DTS without having to trigger a recompilation of the
entire kernel (as the files directory is not touched)
Link: https://github.com/openwrt/openwrt/pull/22037
Signed-off-by: Christian Marangi <ansuelsmth@gmail.com>
Remove incomplete SPI flash definitions from affected device tree files.
These fragments only defined address-cells and size-cells without any
actual flash configuration (partitions, compatible string, etc.).
After applying openwrt/openwrt#20942 ("kernel: of: fix bad cell count error
for SPI flash node"), the kernel properly handles SPI flash nodes without
requiring these incomplete definitions in device-specific DTS files.
This cleanup eliminates unnecessary code that was likely a workaround for
the previous kernel issue.
Signed-off-by: Mieczyslaw Nalewaj <namiltd@yahoo.com>
Link: https://github.com/openwrt/openwrt/pull/22036
Signed-off-by: Robert Marko <robimarko@gmail.com>
We can now setup most of the modes for RTL930x, recently XSGMII, QSGMII
and USXGMII-SX have been added. Thus we don't need a big list of allowed
modes anymore in SerDes setup. Drop this without replacement. Other
modes are still rejected in other places or will be rejected later with
a proper SerDes capability handling.
Signed-off-by: Jonas Jelonek <jelonek.jonas@gmail.com>
Link: https://github.com/openwrt/openwrt/pull/21930
Signed-off-by: Hauke Mehrtens <hauke@hauke-m.de>
Add everything that's needed to setup QSGMII mode on the 5G SerDes. This
includes patch sequences, additions to symbol error reset and read, and
allowing this mode during SerDes setup.
Signed-off-by: Jonas Jelonek <jelonek.jonas@gmail.com>
Link: https://github.com/openwrt/openwrt/pull/21930
Signed-off-by: Hauke Mehrtens <hauke@hauke-m.de>
Add everything that's needed to setup USXGMII-SX mode (10G single port
USXGMII). This includes patch sequences and adjustments to the symbol
error reset and reading, and allowing it in the SerDes setup.
Signed-off-by: Jonas Jelonek <jelonek.jonas@gmail.com>
Link: https://github.com/openwrt/openwrt/pull/21930
Signed-off-by: Hauke Mehrtens <hauke@hauke-m.de>
For each port (or port group) the mdio bus needs to define the
PHY type that is attached to it. There are the following bit
values that need to be set in SMI_MAC_TYPE_CTRL.
- 0x0: 10G/1G Fiber (SerDes)
- 0x1: 10G/2G5 GPHY
- 0x2: FEPHY
- 0x3: GPHY
SerDes ports are out of scope of the mdio driver and are handled
by the PCS driver. So the corresponding bits are untouched. That
is not good as the register default is 0x3 for ports 0-23. To
make it simple: Without proper setup devices that have SerDes
driven fiber ports at address 0-23 do not poll in the right way.
Link detection is broken.
Fix this by initializing the register to zero. This way all ports
that are not setup by the mdio driver default to "SerDes". That
should be a reasonable assumption.
Fixes: b271735 ("realtek: mdio: Simplify RTL930x phy polling setup")
Reported-by: Joe Holden <jwh@zorins.us>
Suggested-by: Jonas Jelonek <jelonek.jonas@gmail.com>
Signed-off-by: Markus Stockhausen <markus.stockhausen@gmx.de>
Link: https://github.com/openwrt/openwrt/pull/22032
Signed-off-by: Hauke Mehrtens <hauke@hauke-m.de>
These devices contain a single MAC address in the U-Boot environment.
Set it as eth0 and label MAC in device tree.
To maintain the current state, the 02_network script still sets
individual port MAC addresses and the bridge MAC address.
Signed-off-by: Jan Hoffmann <jan@3e8.eu>
Link: https://github.com/openwrt/openwrt/pull/22024
Signed-off-by: Robert Marko <robimarko@gmail.com>
FIPS 140-3 recommends that all crypto implementations should be tested
before first use. Testmanager performs initial tests based on existing
test vectors. Not all algorithms have defined test vectors, so to improve
this situation, this commit backports recently added test vectors for
three cipher suites:
* authenc(hmac(md5),cbc(des3_ede)),
* authenc(hmac(sha224),cbc(aes)),
* authenc(hmac(sha384),cbc(aes)).
These vectors were calculated using a software implementation and then
double-checked on Mediatek MT7981 (safexcel) and NXP P2020 (talitos).
Both platforms passed self-tests.
Signed-off-by: Aleksander Jan Bajkowski <olek2@wp.pl>
Link: https://github.com/openwrt/openwrt/pull/21970
Signed-off-by: Hauke Mehrtens <hauke@hauke-m.de>
Add PCIe controller and PHY support for EN7528 SoC. This includes
a new PCIe PHY driver, EN7528-specific startup in the MediaTek PCIe
controller, and a fix for bogus prefetch window reads on bridges
that do not implement the registers.
Enable WiFi for the DASAN H660GM-A board with MT7603 (2.4 GHz) and
MT7615/MT7663 (5 GHz).
Signed-off-by: Ahmed Naseef <naseefkm@gmail.com>
Link: https://github.com/openwrt/openwrt/pull/21326
Signed-off-by: Hauke Mehrtens <hauke@hauke-m.de>
Enable the Airoha EN7523 GPIO driver for EN7528 and add GPIO
controller nodes to the EN7528 DTSI. Add LED, button and GPIO
definitions for the DASAN H660GM-A board.
Signed-off-by: Ahmed Naseef <naseefkm@gmail.com>
Link: https://github.com/openwrt/openwrt/pull/21326
Signed-off-by: Hauke Mehrtens <hauke@hauke-m.de>
EN7528 shares the same clock/reset controller as EN7523. Enable
COMMON_CLK_EN7523 and RESET_CONTROLLER for ethernet hardware resets.
Update econet-eth driver and add it as default package.
Signed-off-by: Ahmed Naseef <naseefkm@gmail.com>
Link: https://github.com/openwrt/openwrt/pull/21326
Signed-off-by: Hauke Mehrtens <hauke@hauke-m.de>
DASAN H660GM-A is a GPON ONT.
Specification:
- SoC: EcoNet EN7528
- RAM: 256 MB
- Flash: 256 MB SPI NAND
- Ethernet: 4x 1GbE
- FXS: 1 port
- GPON: 1 port
- USB: 1x USB 2.0
Install via OEM web UI:
1. Login to the factory web UI with username "superuser"
and password "Dz$!A!r7".
2. Rename the OpenWrt image
openwrt-econet-en7528-dasan_h660gm-a-squashfs-tclinux.trx
to G_ONU_openwrt.bin.
3. Upload the renamed image via the firmware upgrade page
at Maintenance > Firmware Upgrade in the factory web UI.
Signed-off-by: Ahmed Naseef <naseefkm@gmail.com>
Link: https://github.com/openwrt/openwrt/pull/21326
Signed-off-by: Hauke Mehrtens <hauke@hauke-m.de>
The EN7528 SoC uses a little endian MIPS architecture, unlike the big
endian EN751221 family. The tclinux TRX firmware format stores multi-byte
fields in the CPU's native byte order, requiring different header layouts
for each architecture:
- Big endian (EN751221): magic "2RDH", fields in big endian order
- Little endian (EN7528): magic "HDR2", fields in little endian order
Update tclinux-trx.sh to support both endianness variants:
- Add --endian parameter to select byte order (default: be)
- Add --model parameter for optional platform identifier field
- Convert to named parameters for clarity and extensibility
- Use hex32() helper for endian-aware 32-bit field output
Move TRX_ENDIAN configuration to subtarget files, allowing each subtarget
to specify its native byte order:
- en751221.mk: TRX_ENDIAN := be
- en7528.mk: TRX_ENDIAN := le
Signed-off-by: Ahmed Naseef <naseefkm@gmail.com>
Link: https://github.com/openwrt/openwrt/pull/21326
Signed-off-by: Hauke Mehrtens <hauke@hauke-m.de>
Different vendor firmware versions use different BBT table sizes. The
checksum is calculated over the entire table, so the size must match
what the bootloader expects.
The Genexis Platinum-4410 bootloader was compiled with a BBT table
size of 250 entries (MAX_RAW_BAD_BLOCK_SIZE as found in vendor code).
Without this fix, the BBT checksum validation fails:
[ 0.391948] spi-nand spi0.0: Dosilicon SPI NAND was found.
[ 0.397651] spi-nand spi0.0: 128 MiB, block size: 128 KiB, page size: 2048, OOB size: 64
[ 0.407370] en75_bmt: found BMT in block 1023
[ 0.450160] en75_bmt: BBT not found and econet,can-write-factory-bbt is unset, giving up
Add a new DTS property 'econet,bbt-table-size' to configure the BBT
table size. If not specified, defaults to 1000.
After this patch:
[ 0.407021] en75_bmt: found BMT in block 1023
[ 0.449159] en75_bmt: found BBT in block 943
[ 0.453491] en75_bmt: BBT & BMT found
[ 0.457152] en75_bmt: blocks: total: 1024, user: 943, factory_bad: 0, worn: 0 reserve: 81
[ 0.465390] en75_bmt: 117 MiB usable space
Signed-off-by: Ahmed Naseef <naseefkm@gmail.com>
Link: https://github.com/openwrt/openwrt/pull/21326
Signed-off-by: Hauke Mehrtens <hauke@hauke-m.de>
The EN7528 is a little endian dual-core MIPS 1004Kc SoC used in xPON
devices. Unlike the big endian EN751221, EN7528 uses the MIPS GIC
interrupt controller for SMP.
This adds minimal boot support for EN7528:
- New en7528 subtarget with mipsel architecture
- Kernel patches for EN7528 SoC with GIC support
- Timer driver extended to support GIC shared interrupts per CPU
- SPI driver fix for EN7528 chip select handling
- Generic device tree for initial bring-up
Signed-off-by: Ahmed Naseef <naseefkm@gmail.com>
Link: https://github.com/openwrt/openwrt/pull/21326
Signed-off-by: Hauke Mehrtens <hauke@hauke-m.de>
Fix the function for reading the SerDes link status to work correctly
based on the code the SDK uses. This is mostly for the sake of
documentation and quick access to the information. The function isn't
used currently but may be in the future, thus no functional change here.
Signed-off-by: Jonas Jelonek <jelonek.jonas@gmail.com>
Link: https://github.com/openwrt/openwrt/pull/22014
Signed-off-by: Hauke Mehrtens <hauke@hauke-m.de>
Add 2500Base-X handling to mode setting which was rejected with
-ENOTSUPP before. SDK code available to us doesn't have the proper mode
value. Though by brute-forcing different mode values, 0x2d was found to
make a 2500Base-X link work.
This was tested with an otherwise correctly configured RTL8221B PHY
which is automatically switched between 2500Base-X and SGMII in the
upstream driver. Though, since there was a previous U-Boot setup for the
PHY in HISGMII mode, it may not be standalone yet.
Signed-off-by: Jonas Jelonek <jelonek.jonas@gmail.com>
Link: https://github.com/openwrt/openwrt/pull/22014
Signed-off-by: Hauke Mehrtens <hauke@hauke-m.de>
Move the function into the config area to avoid family checks.
While we are here apply the new dsa function prefix.
Signed-off-by: Markus Stockhausen <markus.stockhausen@gmx.de>
Link: https://github.com/openwrt/openwrt/pull/22009
Signed-off-by: Hauke Mehrtens <hauke@hauke-m.de>
This commit adds support for Keenetic/Netcraze (K/N)AP-630
Specification:
- MT7981 CPU using 2.4GHz and 5GHz WiFi (both AX)
- 512MB RAM
- 128MB SPI NAND
- 1 led with two colors (green, orange)
- 1 button (reset)
- 1 2.5Gbit POE ethernet port based on Airoha EN8811H phy
Serial Interface:
- 3 Pins GND, RX, TX
- Settings: 115200, 8N1
Notes:
- The device supports dual boot mode
Flash instruction:
The only way to flash OpenWrt image is to use tftp recovery mode in U-Boot:
1. Configure PC with static IP 192.168.1.2/24 and tftp server.
2. Copy image to tftp server.
a) Keenetic
Rename "openwrt-mediatek-filogic-keenetic_kap-630-squashfs-factory.bin"
to "KAP-630_recovery.bin" and place it in tftp server directory.
b) Netcraze
Rename "openwrt-mediatek-filogic-netcraze_nap-630-squashfs-factory.bin"
to "NAP-630_recovery.bin" and place it in tftp server directory.
3. Connect PC with ethernet port, press the reset button, power up
the device and keep button pressed until status led start blinking.
4. Device will download file from server, write it to flash and reboot.
Signed-off-by: Maxim Anisimov <maxim.anisimov.ua@gmail.com>
Link: https://github.com/openwrt/openwrt/pull/21634
Signed-off-by: Hauke Mehrtens <hauke@hauke-m.de>
Right now the global includes are all named rtl838x. This suggests
that they are only for one of the four SoC types (RTL838x aka Maple)
required. As we are talking about the Otto platform rename that
accordingly. All the drivers have already adapted that some time
ago.
Signed-off-by: Markus Stockhausen <markus.stockhausen@gmx.de>
Link: https://github.com/openwrt/openwrt/pull/22005
Signed-off-by: Robert Marko <robimarko@gmail.com>
Add support for V2 of Zyxel GS1920-24HP with 24 copper ports, 4 combo
SFP/copper ports and PoE.
Specifications:
---------------
* SoC: Realtek RTL8391M
* Flash: 32MiB Flash
* RAM: 256MiB
* Ethernet: 24x 10/100/1000 Mbps
* SFP: 4 combo copper/SFP ports (via RTL8214FC)
* PoE: 24x
* Fan controller: ADT7468
* Serial: UART 3.3V TTL logic, 115200 8N1
* pinout (front to back): GND RX TX VCC
* Buttons: 1x Reset, 1x Restore
Notable differences to V1 (which require dedicated support):
* "smaller" SoC (RTL8391M)
* more RAM (256MiB vs 128MiB)
* more Flash (32MiB vs 16MiB) + different layout
* RTL8214FC uses different port numbers
* SFP 25 and 26 use shared SCL
* SFP 27 and 28 use different SDA
* different monitoring IC (LM96000 vs ADT7468)
* faster serial console by default
* serial header easier accessible
Note that the port LEDs do not work correctly yet due to missing
LED configuration for RTL839X.
Installation:
-------------
(copied mostly as-is from 2a55846bf4)
This device uses ZyNOS instead of Linux, this makes installation a bit
more cumbersome. Serial console is required!
1. Set the switch to boot from the first image. This step is crucial,
it will fail to boot if this is not set properly.
2. Connect to the switch using serial and interrupt the boot process
to enter debug/recovery mode.
3. Load the OpenWrt initramfs image via XMODEM. You need to obtain an
unlock code, based on your MAC address, first. See the excellent write
up at https://www.ixo.de/info/zyxel_uclinux/ for details. Replace
unlock_code in the commands below by the code obtained.
The file length in bytes needs to be given instead of file_length below.
You also need an XMODEM upload utility like "lrzsz-sx -X" to transfer
the file. Start the XMODEM upload after running the ATUPxxxx command:
> ATEN1,unlock_code
> ATUP80100000,file_length
> ATGO80100000
4. Wait for OpenWrt to boot. Once this is done, transfer the loader binary
and the sysupgrade image to "/tmp" using scp.
5. Install OpenWrt permanently by running the following two commands on
the switch (over SSH):
> mtd write /tmp/loader.bin loader
> mtd write /tmp/sysupgrade.bin firmware
6. Reboot the switch and enjoy OpenWrt.
NB: You do not need to touch the loader binary unless it's recommended.
The loader is not part of a regular sysupgrade file and will be left
untouched. The boot loader only checks if the loader is valid to be
able to boot.
Recovery/ Return to stock:
--------------------------
Just spam the "u" key during (or "z" for 9600 baud) during memory testing
to trigger a recovery XMODEM upload at 115200 baud. A standard OEM upgrade
image works properly.
Signed-off-by: Jonas Jelonek <jelonek.jonas@gmail.com>
Link: https://github.com/openwrt/openwrt/pull/21944
Signed-off-by: Hauke Mehrtens <hauke@hauke-m.de>
Move common parts shared with GS1920-24HPv2 from v1's DTS and image
definition into a common DTSI and device definition to prepare adding
support for GS1920-24HPv2.
Signed-off-by: Jonas Jelonek <jelonek.jonas@gmail.com>
Link: https://github.com/openwrt/openwrt/pull/21944
Signed-off-by: Hauke Mehrtens <hauke@hauke-m.de>
Global interrupt enabling/disabling is scattered around the code. Provide
two helpers to handle this code centrally. Make use of them where needed.
This refactoring brings multiple enhancements:
1. Only activate the rx interrupts and ignore the run out (aka rx overflow)
interrupts. Overflow was used to spit out log messages to identify driver
issues. Nowadays it is stable enough and these messages are not needed
any longer.
2. With generic register setting some family checks can be dropped.
3. Last but not least this commit fixes a bug in the probing of the ethernet
driver. In rare case (especially during TFTP boot) U-Boot loader leaves a
pending rx interrupt that instantly fires when the driver registers its
interrupt via devm_request_irq(). To mitigate this, reorder the interrupt
disabling from ndo_open() to driver probing.
Signed-off-by: Markus Stockhausen <markus.stockhausen@gmx.de>
Link: https://github.com/openwrt/openwrt/pull/21893
Signed-off-by: Hauke Mehrtens <hauke@hauke-m.de>
Regardless of the number of receive queues (8 or 32) the interrupt
status and mask registers are built up bitwise in the same way:
- 8/32 rx run out interrupts
- 8/32 rx done interrupts
- 2 tx tone interrupts
- 2 tx all done interrupts
- 3 L2 notify interrupts (only RTL839x)
So one can always derive the bit position of those fields by using
the device specific rx_rings configuration setting. To simplify the
code these registers will be handled by central helpers in the future.
In a first step provide a interrupt base register definition that
points to the first interrupt type - aka the rx run out interrupts.
To not overcomplicate things simply reuse the existing DMA_IF_INTR_MSK
and DMA_IF_INTR_STS naming convention. Until all gets fixed the
runout registers on RTL93xx will be accessible by that name.
Signed-off-by: Markus Stockhausen <markus.stockhausen@gmx.de>
Link: https://github.com/openwrt/openwrt/pull/21893
Signed-off-by: Hauke Mehrtens <hauke@hauke-m.de>
Add the flag required to enforce the fwtool's image metadata checks.
All sysupgrade image recipes on this platform already append the metadata.
Fixes: 93173aee96 ("qualcommbe: ipq95xx: Add initial support for new target")
Signed-off-by: Mario Andrés Pérez <mapb_@outlook.com>
Link: https://github.com/openwrt/openwrt/pull/22010
Signed-off-by: Robert Marko <robimarko@gmail.com>
The Zyxel NWA110AX is a dual band 2x2:2 802.11ax wireless access point
with PoE.
The device is very similar to the NWA210AX except for being 2x2 instead
of 4x4 in the 5GHz band and not having the 2.5GbE ethernet port. This
commit factors out a common DTS and device definition and reuses it for
both devices.
Hardware:
* SoC: Qualcomm IPQ8070A
* RAM: 1GiB 1x Samsung K4A8G165WC-BCTD
* Flash: 8MiB Winbond W25Q64DW SPI-NOR, 256MiB Winbond W29N02GZ SPI-NAND
* WLAN 2.4GHz: QCN5024 2x2:2 802.11b/g/n/ax
* WLAN 5GHz: QCN5054 2x2:2 802.11n/ac/ax
* Ethernet: 1x 1GbE with AR8033 PHY
* Serial Config: 3.3V TTL 115200-8-N-1, externally accessible
* Serial Layout: GND TX RX 3.3V (don't connect, marked with triangle)
* LEDs: 1x red, 1x green, 1x blue, 1x white
* Buttons: 1x reset
MAC addresses:
* Uplink: base address on label
* 2.4GHz WLAN: base + 1
* 5GHZ WLAN: base + 2
Flashing Notes:
The device uses a dual-image setup and OpenWrt can only be installed as
image 0. When the currently running stock firmware is image 0, OpenWrt
will be installed as image 1, fail to boot and the device returns to stock
firmware. If this happens, install any version of stock firmware so that
it runs as image 1, before installing OpenWrt. Alternatively, if there
already is a valid stock firmware in image 1, the "debug dual-image show"
and "debug dual-image set boot-image image1" commands can be used in the
stock CLI via serial/SSH/telnet to switch to image 1.
Flashing with Stock Web Interface:
* Get the OpenWrt factory image and rename it to a shorter name, for
example "openwrt.bin" (the stock firmware has a character limit)
* In the web interface, go to "Maintenance" -> "File Manager" ->
"Firmware Package" (or click the link next to "Firmware Version" under
"Device Information" on the dashboard)
* Under "Upload File" browse to the renamed OpenWrt factory image and
click on "Upload"
Switch Boot Image:
* OpenWrt to stock: "zyxel-bootconfig-ipq807x set image1"
* Stock to OpenWrt: "debug dual-image set boot-image image0"
Unbrick / Revert to Stock with the Boot Module:
* Disconnect the device from power
* Configure your machine to 192.168.1.103/24 and start a TFTP server
* Put the stock firmware image into the TFTP server root and rename it to
"ZLD-current"
* Establish a serial connection to the device through the console port
* Connect the device to power
* When prompted, press a key to abort automatic boot and enter debug mode
* Use the "atnz" command to flash the firmware image
* Use the "atgo" command to boot from the newly flashed image
Signed-off-by: Michael Lotz <mmlr@mlotz.ch>
Link: https://github.com/openwrt/openwrt/pull/21849
Signed-off-by: Robert Marko <robimarko@gmail.com>
Netgear RBx350 are dual band 4 stream 802.11ax mesh devices from the Orbi
series. The RBR350 is a router with a WAN and 3 LAN ports. The RBS350 is a
satellite without WAN port, only 2 LAN ports and half the flash. The
hardware is otherwise identical. They were sold in kits as RBK352, RBK353,
RBK354 or RBK355, with one router and 1-4 satellites.
Hardware:
* SoC: Qualcomm IPQ6018
* RAM: 512MiB 1x Nanya NT5CC256M16ER-EK
* Flash: 512MiB Winbond W29N04GZ or 256MiB Winbond W29N02GZ
* WLAN 2.4GHz: QCN5022 2x2:2 b/g/n/ax
* WLAN 5GHz: QCN5052 2x2:2 a/n/ac/ax
* Ethernet: QCA8075 switch with 1 WAN and 3 LAN ports or 2 LAN ports
* Serial Config: 3.3V TTL 115200-8-N-1, internal populated header
* Serial Layout: 3.3V (don't connect, marked with dot) RX TX GND
* LEDs: green/red power, white/red/green/blue status
* Buttons: 1x Reset, 1x WPS
MAC addresses:
* LAN1: base address on label, stored in boarddata partition at 0x8
* LAN2: base + 1
* LAN3: base + 2
* WAN: base + 3
* 2.4GHz WLAN: base + 1
* 5GHz WLAN: base + 2
Flashing Notes:
The stock firmware images are signed. Both the bootloader and the stock
web interface check the signature and will fail to boot/flash.
The bootloader automatically does NMRP when a gigabit LAN connection is
present. The stock and factory images contain a U-Boot script that is
executed when flashing using NMRP. This is used to alter and persist the
U-Boot env with a boot command that works with unsigned firmware.
Install OpenWrt:
* Get the nmrpflash utility [0] and OpenWrt factory image
* Find network interface to use: nmrpflash -L
* Start nmrpflash: nmrpflash -i interface -f openwrt-...-factory.img
* Connect the device LAN port closest to the power jack to the same
network using gigabit
* Plug the device in and wait for the bootloader to flash
* Unplug and replug the device once the power LED blinks amber
Revert to Stock:
The boot command needs to be reverted before flashing the stock firmware,
otherwise it will fail to boot and get stuck in recovery mode (red power
LED flashing).
* Run: fw_setenv bootcmd bootipq
* Restart the device
* Flash the stock firmware RBx350-Va.b.c.d.img using nmrpflash
[0]: https://github.com/jclehner/nmrpflash
Signed-off-by: Michael Lotz <mmlr@mlotz.ch>
Link: https://github.com/openwrt/openwrt/pull/21656
Signed-off-by: Robert Marko <robimarko@gmail.com>
Netgear RBx750 are tri band, 2.4GHz and 2x 5GHz, 8 stream 802.11ax mesh
devices from the Orbi series. The RBR750 is a router with a WAN and 3 LAN
ports. The RBS750 is a satellite without WAN port, only 2 LAN ports and
half the flash. The hardware is otherwise identical. They were sold in
kits as RBK752-RBK757, with one router and 1-6 satellites.
Hardware:
* SoC: Qualcomm IPQ8074
* RAM: 1GiB 1x Samsung
* Flash: 512MiB Winbond W29N04GZ or 256MiB Winbond W29N02GZ
* WLAN 2.4GHz: QCN5024 2x2:2 b/g/n/ax
* WLAN 5GHz Low Band: QCN5054 2x2:2 a/n/ac/ax 5180-5320MHz
* WLAN 5GHz High Band: QCN5054 4x4:4 a/n/ac/ax 5500-5700MHz
* Ethernet: QCA8075 switch with 1 WAN and 3 LAN ports or 2 LAN ports
* Serial Config: 3.3V TTL 115200-8-N-1, internal populated header
* Serial Layout: Bottom <- RX, TX, GND, 3.3V (don't connect) -> Top
* LEDs: green/red power, white/red/green/blue status
* Buttons: 1x Reset, 1x WPS
MAC addresses:
LAN1: base address on label
LAN2: base + 1
LAN3: base + 2
WAN: base + 1
2.4GHz: base + 2
5GHz-Low: base + 3
5GHz-High: base + 4
Flashing Notes:
The stock firmware images are signed. Both the bootloader and the stock
web interface check the signature and will fail to boot/flash.
The bootloader automatically does NMRP when a gigabit LAN connection is
present. The stock and factory images contain a U-Boot script that is
executed when flashing using NMRP. This is used to alter and persist the
U-Boot env with a boot command that works with unsigned firmware.
Install OpenWrt:
* Get the nmrpflash utility [0] and OpenWrt factory image
* Find network interface to use: nmrpflash -L
* Start nmrpflash: nmrpflash -i interface -f openwrt-...-factory.img
* Connect the device LAN port closest to the power jack to the same
network using gigabit
* Plug the device in and wait for the bootloader to flash
* Unplug and replug the device once the power LED blinks amber
Revert to Stock:
The boot command needs to be reverted before flashing the stock firmware,
otherwise it will fail to boot and get stuck in recovery mode (red power
LED flashing).
* Run: fw_setenv bootcmd bootipq
* Restart the device
* Flash the stock firmware RBx750-Va.b.c.d.img using nmrpflash
[0]: https://github.com/jclehner/nmrpflash
Signed-off-by: Michael Lotz <mmlr@mlotz.ch>
Link: https://github.com/openwrt/openwrt/pull/21938
Signed-off-by: Robert Marko <robimarko@gmail.com>
Fixes: 528c9259a7 Backport the PSE-PD...
When the original backport bring-in was done, the regulator power budget
portion was missed. This results in kernel build errors when trying to
bring in PSE_CONTROLLER or PSE_REGULATOR configs. Which are required to
bring in further PSE drivers.
Bring in the backport to fix that up. Patch series naming is a bit wrong
here, but keeps patches together in ordering, whilst reducing files
touched in this commit.
Without this patch, when adding config of
CONFIG_PSE_CONTROLLER=y
CONFIG_PSE_REGULATOR=y
CONFIG_PSE_TPS23881=y
CONFIG_REGULATOR=y
The following errors occur:
drivers/net/pse-pd/pse_core.c:446:9:
error: implicit declaration of function 'regulator_free_power_budget'
drivers/net/pse-pd/pse_core.c:559:16:
error: implicit declaration of function 'regulator_request_power_budget'
Signed-off-by: Bevan Weiss <bevan.weiss@gmail.com>
Link: https://github.com/openwrt/openwrt/pull/21996
Signed-off-by: Robert Marko <robimarko@gmail.com>
Do better error checks during bus probing. Give meaningful return codes
in case of invalid DTS data (EINVAL instead of ENODEV). Decrease node
reference in case of errors.
Signed-off-by: Markus Stockhausen <markus.stockhausen@gmx.de>
Link: https://github.com/openwrt/openwrt/pull/21968
Signed-off-by: Robert Marko <robimarko@gmail.com>
The mdio bus no longer mixes reset and polling setup. There is now
a clear distinction between both parts and polling setup can rely
on an initialized bus. With that in place skip the open coded phy
detection and use standard kernel functions instead.
Signed-off-by: Markus Stockhausen <markus.stockhausen@gmx.de>
Link: https://github.com/openwrt/openwrt/pull/21968
Signed-off-by: Robert Marko <robimarko@gmail.com>
Let the mdio bus autodetect the attached phys by providing a proper
scan mask. Although this breaks the linkage to the DTS it is better
than adding phys manually.
Signed-off-by: Markus Stockhausen <markus.stockhausen@gmx.de>
Link: https://github.com/openwrt/openwrt/pull/21968
Signed-off-by: Robert Marko <robimarko@gmail.com>
The mdio bus detection will be changed from DTS based detection to
autoscan. To avoid spurious WARN_ONCE() messages return -EIO for
reads to register 2 during C22 scan when phy is on a c45 based bus.
The C45 rescan afterwards will detect the phy normally.
Signed-off-by: Markus Stockhausen <markus.stockhausen@gmx.de>
Link: https://github.com/openwrt/openwrt/pull/21968
Signed-off-by: Robert Marko <robimarko@gmail.com>
Now that reset() and setup_polling() functions are split, clarify the
documentation about the C22/C45 register setup. It is important for
all phy accesses and must be configured during reset. Of course a side
effect is, that the SoC adapts its polling.
Signed-off-by: Markus Stockhausen <markus.stockhausen@gmx.de>
Link: https://github.com/openwrt/openwrt/pull/21968
Signed-off-by: Robert Marko <robimarko@gmail.com>
The reset function of the RTL838x mdio bus does not only reset
things but sets up polling parameters too. Split this function.
While we are here give an anonymous bit a meaningful name.
Signed-off-by: Markus Stockhausen <markus.stockhausen@gmx.de>
Link: https://github.com/openwrt/openwrt/pull/21968
Signed-off-by: Robert Marko <robimarko@gmail.com>
There is a misunderstanding of the chip version detection in the
rt-loader. For all SoCs the data is gathered from the registers
MODEL_NAME_INFO and CHIP_INFO. Sadly the bits are shuffled around
with each hardware. Currently the loader gathers the wrong bits
for RTL839x and RTL93xx. Fix that.
While we are here write the if statements vice versa for better
readability and give some variables better names. Align the
ouput with that from the kernel.
Fixes: ccbff8b ("realtek: add rt-loader (runtime loader)"
Signed-off-by: Markus Stockhausen <markus.stockhausen@gmx.de>
Link: https://github.com/openwrt/openwrt/pull/21994
Signed-off-by: Robert Marko <robimarko@gmail.com>
Fix two hardware initialization issues in the EN7581 PCIe controller
and add support for x2 (2-lane) link mode.
Fixes:
The upstream EN7581 PCIe initialization writes EQ presets and PIPE
configuration registers before clk_bulk_prepare_enable(). Since the
MAC clocks are not yet running at that point, these register writes
are silently dropped, leaving the hardware with default values. This
can cause link training failures or suboptimal equalization.
Additionally, after link training the MAC may only advertise Gen1-Gen2
capability in the Link Capabilities 2 register despite the PHY being
configured for Gen3. A serdes reset toggle forces the MAC to re-read
PHY capability, recovering Gen3 8GT/s link speed.
Both issues are addressed by separating PERST from the clock callbacks
(patch 911), allowing the PCIe controller driver to properly sequence
PERST, clock enable, and register writes (patch 912).
New feature:
PCIe x2 mode support for EN7581 using the NP_SCU system controller
for serdes mux routing, PERST management, and lane configuration.
Both bonded MACs are configured for x2 operation with proper EQ
presets before link training begins.
Signed-off-by: Ryan Chen <rchen14b@gmail.com>
Link: https://github.com/openwrt/openwrt/pull/21978
Signed-off-by: Robert Marko <robimarko@gmail.com>
The MAC addresses for eth0 and the individual LAN ports are now
configured via device tree. The assignment itself stays the same as
before, matching factory firmware.
The 02_network script still sets the bridge MAC address, as it is
different from the lowest port MAC address.
Signed-off-by: Jan Hoffmann <jan@3e8.eu>
Link: https://github.com/openwrt/openwrt/pull/21976
Signed-off-by: Robert Marko <robimarko@gmail.com>
There has been some modified device trees floating on forums to
make this device work, collect the work and integrate it into
OpenWrt so it hopefully works for users.
Link: https://github.com/openwrt/openwrt/pull/21998
Signed-off-by: Linus Walleij <linusw@kernel.org>
This fixes a previous commit for Sophos XG 210r3 which was missing
board_name mapping and adds support for the SG related version and the
XG/SG 230r2 which is the same hardware with a faster processor.
Sophos board_name mapping was modified to support all Sophos
SG/XG devices.
Sophos SG/XG 210r3 and SG/XG 230r2 are rackmounted x86 based firewall
with 6 RJ-45 gigabit ethernet ports (eth0-5) and 2 SFP gigabit ethernet
ports (eth6, eth7) all running Intel NICs supported by igb driver. The 210r3
and 230r2 only differ in the processor used. This board update maps
eth1 (marked as WAN) as wan and eth0 and eth2-5 as lan. Leaving the
two SFP ports unmapped.
Fixes: 4880e8e338 ("x86: add board mapping for Sophos XG 210r3")
Signed-off-by: Raylynn Knight <rayknight@me.com>
Link: https://github.com/openwrt/openwrt/pull/21959
Signed-off-by: Hauke Mehrtens <hauke@hauke-m.de>
Add dependencies for Turris MOX board modules directly as
DEVICE_PACKAGES. (So that users don't have to add them manually.)
The device uses an SD card for primary storage so space shouldn't be an
issue.
Signed-off-by: Tomáš Macholda <tomas.macholda@nic.cz>
Link: https://github.com/openwrt/openwrt/pull/21151
Signed-off-by: Hauke Mehrtens <hauke@hauke-m.de>
RIPE Atlas Probe v5 is a network measurement device based on Turris MOX.
u-boot bootscript supports booting both from the original Turris BTRFS
layout and default OpenWrt ext4 boot + root partition layout.
Specifications:
* SoC: Marvell ARMADA 3720
* RAM: 512 MiB, DDR3
* eMMC: 4G
* Ethernet: 1x 1GbE
MAC:
LAN MAC: label on board
Flash instructions:
* For using the default ext4 layout, boot into a live system using
tftpboot in u-boot and flash an OpenWrt SD image onto /dev/mmcblk0.
* For the Turris layout, put the new rootfs into subvolume '@', not
forgetting to add Image, device tree, and boot.scr to /boot.
Misc:
* USB connection is only for power. For UART access use the pin header:
1: GND
2: +1.8V
5: TX
6: RX
* Flashing the image onto Turris Shield won't work. Use Turris MOX image
instead.
Signed-off-by: Tomáš Macholda <tomas.macholda@nic.cz>
Link: https://github.com/openwrt/openwrt/pull/20031
Signed-off-by: Hauke Mehrtens <hauke@hauke-m.de>
This adds support for the Gemini-based Verbatim S08V1901-D1
also known as Gigabit Ethernet Hard Drive and perhaps other
funny names.
Link: https://github.com/openwrt/openwrt/pull/21989
Signed-off-by: Linus Walleij <linusw@kernel.org>
SerDes attached ports that are connected during switch
boot might not be able to transmit any data after SerDes
setup. Especially ports that passed traffic before (e.g.
for tftp initramfs boot) seem to be affected. Ports that
are connected later do not show this issue.
It turns out that the old SerDes setup never really worked
on RTL8382 and the pcs refactoring (with dynamic SerDes
start and stop) totally changed the order of network bringup
in contrast to Realtek SDK.
Fix this by restaring the switch queue whenever a SerDes
goes up for the first time.
Fixes: e956adf ("realtek: rtl838x: setup SDS in PCS driver")
Signed-off-by: Markus Stockhausen <markus.stockhausen@gmx.de>
Link: https://github.com/openwrt/openwrt/pull/21956
Signed-off-by: Robert Marko <robimarko@gmail.com>
The write protection register (0x1b000058) is opened up in prom init
but closed later in rtl838x_pie_init(). From that moment no more
special register writes are possible.
Only unlock the write protection register once during prom init.
Remove all other references. The error has been active since ages
but was not visible until pcs refactoring. For reference blame the
refactoring commit.
Fixes: e956adf ("realtek: rtl838x: setup SDS entirely in PCS driver")
Signed-off-by: Markus Stockhausen <markus.stockhausen@gmx.de>
Link: https://github.com/openwrt/openwrt/pull/21956
Signed-off-by: Robert Marko <robimarko@gmail.com>
Setup of register PLL_CML_CTRL has two issues.
- It clears out bits 4-31 due to a wrong mask
- Setup of bits 0-3 is not generic but depends on the mode of
serdes 0/1
Fix that by relocating the code and adapting the mask. The error
exists for longer but it has survived the pcs refactoring. Thus
blame the corresponding refactoring commit.
Fixes: b670d48 ("realtek: pcs: rtl838x: refactor imported code")
Signed-off-by: Markus Stockhausen <markus.stockhausen@gmx.de>
Link: https://github.com/openwrt/openwrt/pull/21956
Signed-off-by: Robert Marko <robimarko@gmail.com>
Drop leftovers from refactoring. Additionally convert all references
to the old dynamically calculated rings/ringsizes to the new ones.
Signed-off-by: Markus Stockhausen <markus.stockhausen@gmx.de>
Link: https://github.com/openwrt/openwrt/pull/21856
Signed-off-by: Robert Marko <robimarko@gmail.com>
Make use of the new structures and redesign the receive path.
Especially
- reduce lock usage
- drop KSEG() macros
- use DMA mapping instead of uncached access
Signed-off-by: Markus Stockhausen <markus.stockhausen@gmx.de>
Link: https://github.com/openwrt/openwrt/pull/21856
Signed-off-by: Robert Marko <robimarko@gmail.com>
Define the needed structures for the redesign of the ethernet
receive path. They are closely aligned with the already refactored
transmit path.
The only exception is the additional data buffer where the
hardware can place the incoming data. This is allocated non-
coherent and data will be manually synchronized. The old design
used coherent (aka uncached) memory access.
Signed-off-by: Markus Stockhausen <markus.stockhausen@gmx.de>
Link: https://github.com/openwrt/openwrt/pull/21856
Signed-off-by: Robert Marko <robimarko@gmail.com>
Realtek switches have either 8 or 32 receive queues on the CPU port.
This is an overkill. Not only the CPUs have low performance but also
the queues need memory (currently ~4MB) and lots of them are rarely
used.
To mitigate that situation add a new setup routine that enforces CPU
packet receiving to a fixed number of queues. From observations one
can see that most of the packets (especially TCP) are received on a
single queue. To align with the transmit path, start with a limit of
2 receive queues.
To make it clear: This commit does not change the receive path or its
structures. It simply limits the number of queues that are filled by
the hardware.
Signed-off-by: Markus Stockhausen <markus.stockhausen@gmx.de>
Link: https://github.com/openwrt/openwrt/pull/21856
Signed-off-by: Robert Marko <robimarko@gmail.com>
The ring counters on RTL83xx allow a space of up to 15 entries.
But rings can be filled faster than data is received and might be
much larger defined (128 at the moment). Also NAPI processing
allows much more than 15 packets to be processed in one chunk.
Disable the counters and let the hardware automatically detect
the available buffers by the ownership flag. With this disable
a pseudo workaround that tried to mitigate the buffer filling
on RTL838x due to wrong setup.
Remark. This commit fixes several inconsistencies in the setup
code. RTL838x runs the setup twice with different values. RTL839x
does not run the setup at all.
Signed-off-by: Markus Stockhausen <markus.stockhausen@gmx.de>
Link: https://github.com/openwrt/openwrt/pull/21856
Signed-off-by: Robert Marko <robimarko@gmail.com>
Refresh the patches to make them apply cleanly again.
Fixes: 105eb9ca95 ("kernel: add cake-mq support")
Signed-off-by: Hauke Mehrtens <hauke@hauke-m.de>
There is now an implementation of .set_autoneg and .restart_autoneg for
all variants. Remove the helper function which checks for it, and just
call the operation directly.
Signed-off-by: Jan Hoffmann <jan@3e8.eu>
Link: https://github.com/openwrt/openwrt/pull/21934
Signed-off-by: Hauke Mehrtens <hauke@hauke-m.de>
RTL83xx uses the BMCR and ADVERTISE registers like RTL93xx to configure
in-band auto-negotiation. Split out the common parts as a new generic
implementation and use it for RTL83xx. RTL93xx retains its own variant
of set_autoneg to support XSGMII, but calls into the generic version for
all other modes.
Tested 1000Base-X auto-negotiation on HPE 1920-8G (RTL8380). Also tested
HPE 1920-24G (RTL8382) and HPE-1920-48G (RTL8393) to make sure this does
not affect PHY ports.
Signed-off-by: Jan Hoffmann <jan@3e8.eu>
Link: https://github.com/openwrt/openwrt/pull/21934
Signed-off-by: Hauke Mehrtens <hauke@hauke-m.de>
Add support for the TP-Link EAP683-LR, an AX6000 Ceiling Mount WiFi 6
AP.
Hardware:
* SoC: MediaTek MT7896AV
* RAM: 1GiB DDR4 (Samsung K4A8G165WC-BCTD)
* Flash: 128MiB SPI-NAND (ESMT F50L1G41LB)
* Ethernet: 1x 10/100/1000/2500 Mbps PoE-PD (MaxLinear GPY211C)
* WiFi: MT7976AN/MT7976GN 2.4/5GHz 4T4R
* LEDS: 3x blue connected to a single GPIO line
* Buttons: 1x reset
* BLE/Thread/Zigbee: CC2652
Stock firmware uses a random MAC address for ethernet, label MAC for
2.4 and label MAC + for 5GHz.
Installation via bootloader:
* Solder JST??? connector on J255, alternatively solder wires on the
TP13-TP15 pads. Pinout: TP13: TX, TP14: RX, TP15: GND, TP16: VCC.
The pins for J255 are in the same order.
* Interrupt boot process by repeatedly pressing Ctrl+b during boot
* In the boot menu, select U-Boot console
* Ensure the U-Boot environment variable "tp_boot_idx" is not set:
# setenv tp_boot_idx
# saveenv
* Boot the OpenWrt initramfs:
# tftpboot openwrt-mediatek-filogic-tplink_eap683-lr-initramfs-kernel.bin
# bootm
* copy openwrt-mediatek-filogic-tplink_eap683-lr-squashfs-sysupgrade.bin
to /tmp and install it using sysupgrade
Flashing via OEM firmware is currently not supported. The
tplink-safeloader utility does not recognize the OEM firmware:
DEBUG: can not find fwuphdr
Firmware image partitions:
base size name
Segmentation fault (core dumped)
To revert to the OEM firmware, you can set the U-Boot environment
variable "tp_boot_idx" to 1 via bootloader, or using fw_setenv via
OpenWrt. This should result in booting from the ubi1 partition, which
OpenWrt should not touch. Then use the web interface to upgrade
firmware: System > Firmware Update.
The OEM firmware uses 0x800000 for the runtime_backup partition size.
This causes the following warning:
mtd: partition "runtime_backup" extends beyond the end of device "nmbm_spim_nand" -- size truncated to 0x600000
This is due to the NMBM reserved blocks. Use 0x600000 in our DTS.
Thanks to init Lab's user890104, who soldered jumper wires on the TTL
pads for me so I could have serial console. My soldering skills just
aren't good enough to pull that off without risk damaging things.
Signed-off-by: Stijn Tintel <stijn@linux-ipv6.be>
Add the required patches in order to backport cake-mq from Linux 7.0.
Many thanks to Toke Høiland-Jørgensen for providing the git trees with backports
for both 6.12 and 6.18.
Signed-off-by: Rui Salvaterra <rsalvaterra@gmail.com>
Link: https://github.com/openwrt/openwrt/pull/21964
Signed-off-by: Christian Marangi <ansuelsmth@gmail.com>
Bootlog has the following line:
mt7915e 0000:01:00.0: missing precal data, size=403472
It is because precal was not included in the previous NVMEM conversion.
Fix this by adding it to the dts.
Fixes: dbc2923cbe ("mediatek: filogic: convert Acer Predator W6 to use NVMEM framework")
Signed-off-by: Zhi-Jun You <hujy652@protonmail.com>
Link: https://github.com/openwrt/openwrt/pull/21894
Signed-off-by: Hauke Mehrtens <hauke@hauke-m.de>
Bootlog has the following line:
mt7915e 0000:01:00.0: missing precal data, size=403472
It is because precal was not included in the previous NVMEM conversion.
Fix this by adding it to the common dts.
Fixes: dbc2923cbe ("mediatek: filogic: convert Acer Predator W6 to use NVMEM framework")
Signed-off-by: Zhi-Jun You <hujy652@protonmail.com>
Link: https://github.com/openwrt/openwrt/pull/21894
Signed-off-by: Hauke Mehrtens <hauke@hauke-m.de>
Bootlog has the following line:
mt798x-wmac 18000000.wifi: missing precal data, size=403472
It is because precal was not included in the previous NVMEM conversion.
Fix this by adding it to the common dtsi.
Fixes: dbc2923cbe ("mediatek: filogic: convert Acer Predator W6 to use NVMEM framework")
Signed-off-by: Zhi-Jun You <hujy652@protonmail.com>
Link: https://github.com/openwrt/openwrt/pull/21894
Signed-off-by: Hauke Mehrtens <hauke@hauke-m.de>
Convert the malta target from the legacy Image/BuildKernel and
Image/Build pattern to the modern Device macro system. This is the
last target still using the legacy pattern.
The Device macro system automatically generates per-image JSON
metadata files which get aggregated into profiles.json, enabling
firmware selector and other tooling support for all malta subtargets
(be, le, be64, le64).
The kernel ELF is produced via KERNEL_NAME := vmlinux.elf (matching
octeon), uImage artifacts are built using the standard Build/lzma,
Build/gzip and Build/uImage commands with the existing load address
0x80100000, and rootfs images use append-rootfs with optional gzip
compression.
The device is named 'generic' following the convention used by other
virtual/emulated targets (x86, armsr, octeon).
Signed-off-by: Paul Spooren <mail@aparcar.org>
These devices share the same "compatible" in device tree causing some
incompatibilities (sysupgrades, ASU profile identification), assign a
unique "compatible" and "model" to each variant.
Context:
Commit [1] added each variant's dts compatible to the SUPPORTED_DEVICES
field of the other variant to make easy sysupgrades between these
physically indistinguishable devices variants possible.
But there were found three issues which does not allow this:
- the sysupgrade's stricter check still used in some sysupgrade
paths(this check is being replaced(and redundant) with the newer fwtool's
SUPPORTED_DEVICES check using the info in images METADATA), this check
will fail when sysupgrading from a different board_name(compatible dts)
that the image was created for (image profile name).[2]
- ASU needs unique "dts compatible" to identify the devices profile.
- and an ASU's profile identification limitation when several devices from
a common target share SUPPORTED_DEVICES entries.[3]
There is a proposal for these issues but not yet implemented [4][3].
Until these issues are fixed we won't allow "easy" sysupgrades between
these two device variants.
Commit [5] avoided the ASU profile identification limitation but
missed the required two unique dts compatibles in order to make the two
variants fully work, although not allowing easy sysupgrade between them.
[1]: 8d30e07180
[2]: sysupgrade stricter check https://github.com/openwrt/openwrt/issues/20566#issuecomment-3583555482
[3]: ASU proposal https://github.com/openwrt/asu/pull/1533
[4]: allow easy sysupgrade proposal https://github.com/openwrt/openwrt/pull/20947
[5]: b71f4665cd
Fixes: b71f466 ("mediatek: filogic: fix supported_devices list for gl-mt2500")
Fixes: 8d30e07 ("mediatek: filogic: fix for new GL.iNet GL-MT2500/GL-MT2500A hardware revision")
Fixes: https://github.com/openwrt/openwrt/issues/20566
Fixes: https://github.com/openwrt/asu/issues/1525
Signed-off-by: Mario Andrés Pérez <mapb_@outlook.com>
Link: https://github.com/openwrt/openwrt/pull/21842
Signed-off-by: Hauke Mehrtens <hauke@hauke-m.de>
This reverts commit 66a7e04e9e.
Doing so makes the u-boot unable to find the node for this pcie
controller and disable it on mx60, resulting boot failure, as reported
in https://github.com/openwrt/openwrt/issues/21649 .
If we keep on treating mx60 and mx60w the same target, we might have
to endure the warning which 66a7e04 wants to eliminate.
Signed-off-by: Edward Chow <equu@openmail.cc>
Link: https://github.com/openwrt/openwrt/pull/21941
Signed-off-by: Robert Marko <robert.marko@sartura.hr>
Only configure the eth0 MAC address when it is not already done in the
device tree. To do this, create a new variable "eth0_mac".
Also avoid setting "label_mac" for devices already having it defined in
the device tree.
Signed-off-by: Jan Hoffmann <jan@3e8.eu>
Link: https://github.com/openwrt/openwrt/pull/21644
Signed-off-by: Hauke Mehrtens <hauke@hauke-m.de>
Explicitly specify all devices where the MAC address is configured based
on the U-Boot environment.
This change makes it clearer which devices use this method. Also makes
things simpler for any future devices which handle MAC address
configuration entirely via device tree.
Signed-off-by: Jan Hoffmann <jan@3e8.eu>
Link: https://github.com/openwrt/openwrt/pull/21644
Signed-off-by: Hauke Mehrtens <hauke@hauke-m.de>
Currently, the 02_network script always configures MAC addresses for
each individual LAN port unless "lan_mac_start" is set to "skip". This
behaviour can be unexpected, and is also somewhat broken, as it even
continues to do so when "lan_mac_start" is empty.
Change it to only do the configuration if "lan_mac_start" is non-empty,
and also remove the fallback to "lan_mac", making this more obvious and
less error-prone.
Signed-off-by: Jan Hoffmann <jan@3e8.eu>
Link: https://github.com/openwrt/openwrt/pull/21644
Signed-off-by: Hauke Mehrtens <hauke@hauke-m.de>
The MAC address assignment for XikeStor SKS8300-8T and SKS8300-12E2T2X
is semantically identical to the first case, so let's combine them.
Signed-off-by: Jan Hoffmann <jan@3e8.eu>
Link: https://github.com/openwrt/openwrt/pull/21644
Signed-off-by: Hauke Mehrtens <hauke@hauke-m.de>
There is a missing tab in one of the cases of MAC address configuration.
Signed-off-by: Jan Hoffmann <jan@3e8.eu>
Link: https://github.com/openwrt/openwrt/pull/21644
Signed-off-by: Hauke Mehrtens <hauke@hauke-m.de>
patch netlink headers for netifd PSE support
& fix PSE backports for PSE Prio
The 626-* patches are backporting net PSE-PD from
linux 6.18 to 6.12. The 627-02 is a nearly verbatim
copy of the upstream commit. The 6.12-01 patches the
auto generated ethtool_netlink_generated header.
The 6.12 build tools do not have the build system
feature for generating the correct netlink
headers related to the backports.
Signed-off-by: Carlo Szelinsky <github@szelinsky.de>
Link: https://github.com/openwrt/openwrt/pull/21926
Signed-off-by: Hauke Mehrtens <hauke@hauke-m.de>
Upstream solution came with 6.4. Seems quilt refreshed it to the extent
that it basically gets applied twice.
Signed-off-by: Rosen Penev <rosenp@gmail.com>
Link: https://github.com/openwrt/openwrt/pull/21954
Signed-off-by: Hauke Mehrtens <hauke@hauke-m.de>
Use the added support for generating per device targz rootfs so that images
generated for Methode devices when CONFIG_TARGET_MULTI_PROFILE and
CONFIG_TARGET_PER_DEVICE_ROOTFS are set, we actually get the targz rootfs
that respects DEVICE_PACKAGES.
Currently, buildbot generated images have no networking, LM75 nor I2C
working, as the generated images do not include required kmods that are
listed in DEVICE_PACKAGES.
While at it, there is no need for tar to run in verbose mode.
Fixes: 7dff6a8c89 ("mvebu: uDPU: add sysupgrade support")
Signed-off-by: Robert Marko <robert.marko@sartura.hr>
Mikrotik RBM33G has got a USB-A port and mPCIe slots with USB 3.0 and USB
2.0 interfaces in use. The MediaTek MT7621 SoC has got an xHCI to provide
these interfaces. Therefore, enable kmod-usb3 to support them.
Fixes: 5684d08741 ("ramips: Add support for Mikrotik RouterBOARD RBM33g")
Signed-off-by: Chester A. Unal <chester.a.unal@arinc9.com>
The bus reset functions currently configure a lot of things. Looking
closely they have a topology setup and a polling setup part. Split the
big chunk in smaller better readable functions.
Signed-off-by: Markus Stockhausen <markus.stockhausen@gmx.de>
Link: https://github.com/openwrt/openwrt/pull/21906
Signed-off-by: Robert Marko <robimarko@gmail.com>
The downstream Realtek phy module is currently known as rtl83xx-phy.c
and its kernel config REALTEK_SOC_PHY. It has been simplified, cleaned
and now aligns to Realtek main module (upstream Realtek phy). It is no
longer tied to the Realtek switch SoC but serves as generic module for
1Gbit multiport phys. Adapt it as follows:
- place it into the realtek folder aside its upstream sibling
- rename it to realtek_multiport.c
- remove SoC dependency in Kconfig and Makefile
- change kernel configs for the targets accordingly
Signed-off-by: Markus Stockhausen <markus.stockhausen@gmx.de>
Link: https://github.com/openwrt/openwrt/pull/21929
Signed-off-by: Robert Marko <robimarko@gmail.com>
Drop some lines that are not needed any longer.
Signed-off-by: Markus Stockhausen <markus.stockhausen@gmx.de>
Link: https://github.com/openwrt/openwrt/pull/21929
Signed-off-by: Robert Marko <robimarko@gmail.com>
If nvmem is used for ethernet mac address, we need to defer loading to
get the proper mac.
Move to probe as ndo_init is the wrong place to handle EPROBE_DEFER.
Signed-off-by: Rosen Penev <rosenp@gmail.com>
Link: https://github.com/openwrt/openwrt/pull/21920
Signed-off-by: Robert Marko <robimarko@gmail.com>
The Sophos SG/XG-125 revision 3 like the already supported SG/XG-135
revision 3 has odd numbering of eth ports where the WAN port (as marked
on the case) is: `eth6` and `eth0`, `eth1`, `eth2`, `eth3`, `eth5`, `eth7`,
`eth8` are LAN ports.
Port `eth4` confirmed to be the SFP port.
Signed-off-by: Raylynn Knight <rayknight@me.com>
Link: https://github.com/openwrt/openwrt/pull/21914
Signed-off-by: Hauke Mehrtens <hauke@hauke-m.de>
meraki_loadaddr=1000000 may not enough to boot openwrt 25.12+ on mx60,
so directly sysupgrade without changing meraki_loadaddr would result
broken, but the u-boot-env partition used to be marked read-only, so
compat_version had better be incremented to show a notification to
direct users to the wiki to prepare the sysupgrade manually.
Signed-off-by: Edward Chow <equu@openmail.cc>
Link: https://github.com/openwrt/openwrt/pull/21912
Signed-off-by: Robert Marko <robimarko@gmail.com>
The main point of it currently is to extract mac addresses. That is not
being done as MAC addresses are elsewhere.
Disable it until it becomes more feature packed and there's an actual
use for it.
All devices already have config definitions. NVMEM prevents redundant
support as well as write support.
Signed-off-by: Rosen Penev <rosenp@gmail.com>
Link: https://github.com/openwrt/openwrt/pull/16618
Signed-off-by: Robert Marko <robimarko@gmail.com>
