Use upstream standard for plural of bus.
Signed-off-by: Markus Stockhausen <markus.stockhausen@gmx.de>
Link: https://github.com/openwrt/openwrt/pull/23299
Signed-off-by: Robert Marko <robimarko@gmail.com>
The mdio driver currently leaves the phy polling disabled after
setup. The dsa driver takes over and mangles the polling registers
so that they fit its needs. While polling is something in between
mdio (PHY) and dsa (MAC) it should be controlled by the mdio
driver.
Add a final "polling enable" function to the mdio driver so that
the MAC registers are filled automatically. For this
- split valid_ports into phy_ports (attached to PHY) and sds_ports
(attached to SerDes)
- Improve the probing so it can differentiate between a phy and a
sds port. This is resolved by the "phy-handle" attribute.
- Split the for_each_port macro into a phy and sds version.
- After probing enable polling for all phy and sds ports.
With this in place the dsa driver can remove the polling setup
completely.
Signed-off-by: Markus Stockhausen <markus.stockhausen@gmx.de>
Link: https://github.com/openwrt/openwrt/pull/23299
Signed-off-by: Robert Marko <robimarko@gmail.com>
Airoha reported some additional bug and fixes were pushed for the ethernet
driver. Backport the additional patch merged upstream and refresh all
affected patch.
Signed-off-by: Christian Marangi <ansuelsmth@gmail.com>
The NOR Flash mtd erase block size is 4 KB on ath79 tiny sub-target.
Squashfs-split driver always check and create the jffs2 rootfs_data
partition on the first free block. However, sysupgrade script append
the config backup to the end of the sysupgrade image. If we pad the
image to the 64 KB boundary, the kernel will be unable to find a
valid jffs2 partition and then recreate the rootfs_data partition.
Users may lose their config during upgrades. Fix this issue by setting
BLOCKSIZE to 4 KB so that the sysupgrade image can be aligned to the
4 KB boundary.
Fixes: https://github.com/openwrt/openwrt/issues/20495
Fixes: 05d35403b2 ("ath79-tiny: enable 4k sectors")
Signed-off-by: Shiji Yang <yangshiji66@outlook.com>
Link: https://github.com/openwrt/openwrt/pull/22497
Signed-off-by: Robert Marko <robimarko@gmail.com>
The current code permits support of the standalone PCS feature only for
in-tree kernel module but doesn't correctly support PCS from external
kernel module.
This is caused by the fact that the FWNODE_PCS config flag is internally
selected by any PCS driver and can't be selected directly. This is
problematic for any external kernel module that wants to use the standalone
PCS feature and needs the OPs provided by the generic PCS code.
Moreover compiling the standalone PCS code as a module is problematic and
would cause link error caused by the late PCS code that introduce a
notifier where phylink code depends on.
To address both problem, permit to select the FWNODE_PCS and change it to a
simple bool preventing it to compile as a module.
Link: https://github.com/openwrt/openwrt/pull/23349
Signed-off-by: Christian Marangi <ansuelsmth@gmail.com>
After the standalone Airoha PCS driver and pcs-handle binding, wan (gdm2)
and lan2 (gdm4) netdevs probe but do not pass traffic.
Similar to the Aeonsemi PHY it seems also the RTL PHY needs in-band to the
PCS for USXGMII to work correctly. This still needs to be better
investigated but in the meantime lets apply this workaround to restore
traffic.
Signed-off-by: Daniel Pawlik <pawlik.dan@gmail.com>
[ improve commit description ]
Link: https://github.com/openwrt/openwrt/pull/23383
Signed-off-by: Christian Marangi <ansuelsmth@gmail.com>
This commit adds support for the netis MEX605, which is a variant based on the netis NX30 V2.
1. Update brand naming from Netis to netis to follow the official branding.
2. Rename NX30V2 to NX30 V2 to correctly reflect it as the second version of the NX30.
3. Update variant notation for consistency.
cherry picked from commit c982357
1. Add 'model' to the DTS for netis NX30 V2 and define WiFi LED.
4. Fix typo.
Signed-off-by: Zhiwei Cao <bfdeh@126.com>
Signed-off-by: David Han <h96643864@gmail.com>
Link: https://github.com/openwrt/openwrt/pull/22726
Signed-off-by: Hauke Mehrtens <hauke@hauke-m.de>
This was used for non nvmem-layout ubootenv support. Since that's gone
and it's not even used anyway, remove.
Signed-off-by: Rosen Penev <rosenp@gmail.com>
Link: https://github.com/openwrt/openwrt/pull/22367
Signed-off-by: Hauke Mehrtens <hauke@hauke-m.de>
Before the env-size property was introduced, the solution was to wrap
the nvmem-layout in a correctly sized partition.
Remove now that it's not needed.
Signed-off-by: Rosen Penev <rosenp@gmail.com>
Link: https://github.com/openwrt/openwrt/pull/22367
Signed-off-by: Hauke Mehrtens <hauke@hauke-m.de>
This was needed before the env-size binding was available to restrict it
to a specific size. No longer a need for this.
This should be no-op since status = "disabled";
Signed-off-by: Rosen Penev <rosenp@gmail.com>
Link: https://github.com/openwrt/openwrt/pull/22367
Signed-off-by: Hauke Mehrtens <hauke@hauke-m.de>
latch_enabled should be false when unlocking. it's set to true when
locking. Probably copy/paste bug.
Signed-off-by: Rosen Penev <rosenp@gmail.com>
Link: https://github.com/openwrt/openwrt/pull/23150
Signed-off-by: Hauke Mehrtens <hauke@hauke-m.de>
It was discovered that the internal PHY interrupt are not always connected
and PHY link up/down is not correctly detected.
This is the case of the Nokia Valyrian board that suffer from this problem.
To handle this, drop the internal PHY interrupt property from DTSI and add
it only to the Gemtek W1700K DTS where it was reported to work correctly.
Signed-off-by: Christian Marangi <ansuelsmth@gmail.com>
The EN751627 EcoNet subtarget consists of the EN7516 DSL SoC and the
(rare) EN7527 xPON SoC.
We currently support pci / wifi, usb and flash, but the EN751221 eth
driver is not portable to this family right now.
Zyxel EX3301-T0 is a wifi router based on the EN7516, it is a DSL SoC
but lacks the DSL port.
Installation instructions:
1. Serial access is required, stop the Zyxel bootloader.
2. Use ATENv3 https://github.com/cjdelisle/ATENv3 to unlock bootloader
3. "ATLD x" on the prompt to start a TFTP server
4. Connect ethernet cable from any lan (yellow) port on modem to a
device.
5. On your device, configure network to 192.168.1.2/30
6. On your device, send TRX file to 192.168.1.1 with name x, i.e.
tftp -p -l ./econet/tclinux -r x 192.168.1.1
7. On modem, you should see a line like this:
"Total 8022324 (0x7A6934) bytes received" note the hex value
8. "ATGU" to enter econet bootloader
9. "flash 80000 80020000 <the hex number without 0x>"
For example: flash 80000 80020000 7A6934
10. "reboot 1" -- start the system
If it boots back into the factory OS, you need to switch OS, from the
ZHAL prompt:
1. "ATCB" -- load data from flash
2. "ATCF 0" -- switch to OS 0
3. "ATBT 1" -- enable flash write
4. "ATSB" -- save data
5. "ATSR 1" -- reboot system
Signed-off-by: Caleb James DeLisle <cjd@cjdns.fr>
Link: https://github.com/openwrt/openwrt/pull/22945
Signed-off-by: Hauke Mehrtens <hauke@hauke-m.de>
This improves on openwrt/openwrt@aeb9028aab by adding support for
other Dell EMC Edge620/640/680 devices and mapping
the interfaces to match the markings on the device.
This modifies the netdevices.mk file to set the boot flag for
ixgbe driver to load it in early stage of the boot process to
allow for proper mapping of the network interface PCI paths
inside the 02_network script. This will also allow other devices
using the ixgbe driver to do proper mapping in 02_network script.
The 02_network script is then modified to support all
dell-emc-620/640/680 devices. It now maps the network
interfaces via PCI paths to match the markings on the device.
The interface marked GE6 is still used for WAN with
interfaces GE1-GE5 used for LAN.
The SFP1 and SFP2 interfaces are left to be assigned by
the user.
Signed-off-by: Raylynn Knight <rayknight@me.com>
Link: https://github.com/openwrt/openwrt/pull/23110
Signed-off-by: Hauke Mehrtens <hauke@hauke-m.de>
This patch adds support for Huawei HG2821T-U, EPON ONU and home router,
often comes with ISP service.
Specifications
==============
* SoC: Econet EN7526GT
* RAM: 512MiB DDR3L (MT41K256M16TW-107)
* Flash: 256MiB SPI NAND (TC58CVG1S3HRAIG)
* WiFi 2.4GHz: MT7592N
* WiFi 5GHz: MT7612EN
* Ethernet: builtin switch
* LED: Power, Internet, WiFi, USB
* Buttons: Reset
* UART: Serial console (115200 8n1)
* USB: 1 x USB2
* Other: Phone jack, XPON fiber port
!!! BACKUP YOUR ROM !!!
=======================
Please always have your FULL flash image backup before flashing
anything. The vendor firmware varies a lot depending on your ISP and
location. You will have a hard time finding the right regional firmware
if you don't have a backup.
Notes
=====
* Due to the target `econet` being incomplete, WiFi, DSA switch, and
many other features are not supported yet. Do not flash the image unless
you know the consquences or `econet` is declared stable.
* This device, and apparently many other devices of this platform, use
a dual-image layout. OpenWRT (with `econet` target) only uses slot A.
Slot B is not used by OpenWRT, and is applicable for dual-booting to
vendor firmware.
* If you do not use vendor firmware anymore, you can erase and reuse
anything after `configuration_b`, which gives you ~110 MiB free space.
Again, backup your flash first.
Installation
============
Within shell
------------
Note that acquiring the shell access to the vendor firmware can be a bit
tricky depending on the firmware variation. If you can't play with the
vendor firmware, boot to OpenWrt using debricking method below.
0. (Optional) Back up your flash, and / or move the vendor firmware to
slot B
1. Build and then locate the `kernel.bin` and `rootfs.bin` image files
2. Upload `kernel.bin` and `rootfs.bin` to the device (via HTTP or USB
stick), then type:
```
mtd write -f -e KernelA kernel.bin KernelA
mtd erase RootfsA
mtd write -f -r -e AppA rootfs.bin AppA
```
From bootloader
---------------
1. Build and then locate the `kernel.bin` and `rootfs.bin` image files
2. Switch device on and press a key within 3 seconds
3. Upload `kernel.bin` via TFTP as described below
4. Once the transfer has completed successfully, bootloader will give
you the file length in "Total %d (0x%X) bytes received", then type
`flash 200000 80020000 <file length hex>`
5. Upload `rootfs.bin` then flash with
`flash 600000 80020000 <file length hex>`
6. Restart the device to boot into OpenWRT
> [!IMPORTANT]
> Do not try `httpd` in the bootloader. It writes to the wrong address
and will corrupt the flash.
Debricking
==========
1. Build and then locate the `initramfs-kernel.bin` image files
2. Switch device on and press a key within 3 seconds
3. Connect to device via ethernet, set the IP address to `192.168.1.X`,
then upload the image via TFTP
`tftp 192.168.1.1 -m binary -v -c put initramfs-kernel.bin`
The file name can be anything except `tcboot.bin` or `tclinux.bin`,
they will corrupt the flash.
4. Type `jump 80020000` to boot the kernel from memory
Dual boot
=========
Use `en75_chboot` tool to switch between vendor firmware and OpenWrt. If
you are soft-locked, you can also switch the flag in the bootloader:
1. Switch device on and press a key within 3 seconds
2. Select the kernel that you wish to use:
- `memwl 80020000 30ffffff` for `KernelA` (OpenWrt)
- `memwl 80020000 31ffffff` for `KernelB` (Factory)
3. Select the rootfs, which should be the same as the kernel:
- `memwl 80020004 30ffffff` for `RootfsA` (OpenWrt)
- `memwl 80020004 31ffffff` for `RootfsB` (Factory)
3. Commit the data to flash: `flash 1e0000 80020000 8`
4. Restart the device to boot into the selected OS
MAC addresses
=============
`//configuration_a/factory.conf` contains MAC addresses, along with
other pre-configured settings. OpenWrt uses `brmac`, `internetmac`,
`APMAC`, and `APMAC_5G`, while `tr069mac`, `voipmac`, `priprotocolmac`,
and `PONMac` are not used for now.
Signed-off-by: David Yang <mmyangfl@gmail.com>
Link: https://github.com/openwrt/openwrt/pull/23131
Signed-off-by: Hauke Mehrtens <hauke@hauke-m.de>
Extend the EN7528 PCIe driver to EN751221 with a specific PHY
tuning ritual. Also enable wifi drivers on SmartFiber XP8421-B,
TpLink Archer VR1200V v2 and Zyxel PMG5617GA.
Signed-off-by: Caleb James DeLisle <cjd@cjdns.fr>
Link: https://github.com/openwrt/openwrt/pull/22208
Signed-off-by: Hauke Mehrtens <hauke@hauke-m.de>
The AN7531N SoC has currently problems communicating using `phy_mmd_...`
when irqbalance is active. But when there is a communication error in the
interrupt handler, the interrupt will be disabled. This can usually be seen
in the logs as:
irq 53: nobody cared (try booting with the "irqpoll" option)
CPU: 0 UID: 0 PID: 0 Comm: swapper/0 Tainted: G O 6.12.77 #0
Tainted: [O]=OOT_MODULE
Hardware name: Gemtek W1700K (OpenWrt U-Boot layout) (DT)
Call trace:
dump_backtrace.part.0+0xbc/0xcc
show_stack+0x14/0x20
dump_stack_lvl+0x58/0x74
dump_stack+0x14/0x1c
__report_bad_irq+0x48/0xf8
note_interrupt+0x2f4/0x340
handle_irq_event+0xac/0xe0
handle_simple_irq+0xa8/0xfc
handle_irq_desc+0x30/0x54
generic_handle_irq+0x1c/0x24
airoha_irq_handler+0x90/0xe0
__handle_irq_event_percpu+0x44/0x11c
handle_irq_event+0x40/0xe0
handle_fasteoi_irq+0xb4/0x240
handle_irq_desc+0x30/0x54
generic_handle_domain_irq+0x18/0x20
gic_handle_irq+0x60/0xec
do_interrupt_handler+0x4c/0x84
el1_interrupt+0x30/0x4c
el1h_64_irq_handler+0x14/0x1c
el1h_64_irq+0x68/0x6c
handle_softirqs+0x98/0x210
__do_softirq+0x10/0x18
____do_softirq+0xc/0x20
call_on_irq_stack+0x30/0x50
do_softirq_own_stack+0x18/0x20
irq_exit_rcu+0x80/0xb8
el1_interrupt+0x34/0x4c
el1h_64_irq_handler+0x14/0x1c
el1h_64_irq+0x68/0x6c
default_idle_call+0x24/0x34
do_idle+0x98/0xf0
cpu_startup_entry+0x30/0x38
kernel_init+0x0/0x130
console_on_rootfs+0x0/0x64
__primary_switched+0x80/0x88
handlers:
[<000000002b75be58>] irq_default_primary_handler threaded
[<000000006d87ada6>] phy_interrupt
Disabling IRQ #53
This is not a problem with the rtl8261n driver because it is not
registering an interrupt handler. But with the kernel realtek PHY driver, a
interrupt handler is registered which can trigger this problem on bootup.
To avoid is, disable the interrupt and use the PHY polling mode also wit
the upcoming realtek PHY driver support for RTL8261.
Co-authored-by: Aleksander Jan Bajkowski <olek2@wp.pl>
Co-authored-by: Sven Eckelmann <sven@narfation.org>
Signed-off-by: Daniel Pawlik <pawlik.dan@gmail.com>
Link: https://github.com/openwrt/openwrt/pull/23078
Signed-off-by: Hauke Mehrtens <hauke@hauke-m.de>
Some W1700K and XR1701G boards with Realtek RTL8261N/RTL8261BE 10G PHYs
fail to bring up the USXGMII link on cold boot. The PHY enters a bad
state during initialization and the link stays down permanently until
power cycle.
Root cause: the GPIO reset assert/deassert timing (40ms/150ms) is too
short for the RTL8261N to complete its internal firmware load. The OEM
firmware uses 200ms/200ms.
Increase both PHY reset timings to 200ms/200ms to match OEM values.
Confirmed to fix intermittent boot failures on both W1700K (Gemtek)
and XR1701G boards.
Signed-off-by: Ryan Chen <rchen14b@gmail.com>
Link: https://github.com/openwrt/openwrt/pull/22564
Signed-off-by: Hauke Mehrtens <hauke@hauke-m.de>
The RTL8365MB_DIGITAL_INTERFACE_SELECT_MODE_MASK macro was shifting
the 4-bit mask (0xF) by only (_extint % 2) bits instead of
(_extint % 2) * 4. This caused the mask to overlap with the adjacent
nibble when configuring odd-numbered external interfaces, selecting
the wrong bits entirely.
Align the shift calculation with the existing ...MODE_OFFSET macro.
Signed-off-by: Mieczyslaw Nalewaj <namiltd@yahoo.com>
Link: https://github.com/openwrt/openwrt/pull/23285
Signed-off-by: Hauke Mehrtens <hauke@hauke-m.de>
Ethernet LAN port is set to `eth1` (silkscreen "ETH2" and case label "2") next to the 2x USB Type-A
ports and WAN is set to `eth0` (silkscreen "ETH1" and case label "1") next to the USB Type-C port.
The USER ("reset") button serves as the reset button. A short press will reboot and a long press
will reset to factory settings (deleting all data) if using squashfs image.
MASK ("maskrom") and RCRY ("recovery") buttons are enabled but are not set to any specific function
Pressing the POWER button will `poweroff` the device and it will stay off until a power cycle.
Hardware
---------------
* SoC: RockChip RK3576 64-bit ARMv8-A 8 cores big.LITTLE (4x A72 and 4x A53)
* RAM: 3/4GB LPDDR4X or 8/16GB LPDDR5
* Ethernet: 2x GbE (SoC RGMII MAC, RTL8211F PHY)
* 3x LEDs (SYS - red / 1 (WAN) - green / 2 (LAN) - green)
* 4x Buttons (MASK ("maskrom"), RCRY ("recovery"), USER ("reset" - OpenWrt reset), POWER)
* 1x 16MiB SPI NOR on board
* 1x UFS slot for optional UFS 2.0 module (currently not supported)
* 1x microSD card slot (UHS-I)
* 1x HDMI OUT
* 1x Headphone OUT 3.5mm
* 1x M.2 M-key 2280 PCIe slot (PCIe 2.1 x1 supports NVMe SSD)
* 1x M.2 E-key *SDIO* slot for optional RTL8822CS Wi-Fi 5
* the case has integrated antennae as well as 2x knockouts
* the device tree is missing the nodes relevant to Wi-Fi operations so it's not supported for now.
* 2x USB 3.2 Gen 1 Type-A Ports
* Power: 1x USB Type-C 6V-20V with both DC and USB PD supported
* Serial: 1500000 8N1 3.3V - 2.54mm 3-pin header next to HDMI
MAC addresses
---------------
WAN (`eth0` case label "1"): generated from /sys/.../mmcblk0/cid (CID of SD card)
LAN (`eth1` case label "2"): WAN + 1
Installation
---------------
Decompress the archive of the OpenWrt sysupgrade image and write it to a microSD card using `dd`
or use Balena Etcher (no need to decompress).
Boot
---------------
Insert microSD card, set boot switch to "UFS/SD" and then supply power.
Signed-off-by: Ryan Leung <untilscour@protonmail.com>
Link: https://github.com/openwrt/openwrt/pull/23008
Signed-off-by: Hauke Mehrtens <hauke@hauke-m.de>
Select `CONFIG_ROCKCHIP_SARADC=y` to enable Rockchip SAR ADC
Add ADC Ladder Buttons driver as a kernel module as well as `kmod-button-hotplug` to the list of
default packages for Rockchip targets that have buttons connected to ADC, not including some
devices (e.g. NanoPi R76S) that have ADC buttons which are not in the device tree.
This is needed to use buttons on Rockchip devices that are connected to ADC and not GPIO
Tested on FriendlyELEC NanoPi M5
Signed-off-by: Ryan Leung <untilscour@protonmail.com>
Link: https://github.com/openwrt/openwrt/pull/23008
Signed-off-by: Hauke Mehrtens <hauke@hauke-m.de>
Add chip info entry for the Realtek RTL8367SB switch. This device has
chip ID 0x6367 and version 0x0010. It exposes two external interfaces:
port 6 supports MII, TMII, RMII, RGMII, SGMII and HSGMII, while port 7
supports MII, TMII, RMII and RGMII. Use the existing 8365MB-VC jam table
for initialization.
Signed-off-by: Mieczyslaw Nalewaj <namiltd@yahoo.com>
Link: https://github.com/openwrt/openwrt/pull/23345
Signed-off-by: Hauke Mehrtens <hauke@hauke-m.de>
The RG-EW1300G is a router with 1 x WAN and 3 x LAN gigabit ports.
The router runs on Ruijie OS by default.
- Specifications:
* SoC: MT7621A
* RAM: 128MB DDR3
* Flash: 16MB SPI NOR flash (GD25Q128C)
* WiFi0: Mediatek MT7615 2.4GHz 802.11b/g/n
* WiFi1: Mediatek MT7615 5GHz 802.11ac
* Ethernet: MT7530, 4x 1000Base-T.
* UART: Serial console - As marked on PCB, baudrate is 57600. DO NOT CONNECT 3.3V.
* Buttons: Reset, WPS.
* LED: Programmable LEDs via GPIO working for Red+Green status, and Mesh/WPS at the rear of the chassis.
- Default Flash:
```
GD25Q128C(c8 40180000) (16384 Kbytes)
mtd .name = raspi, .size = 0x01000000 (16M) .erasesize = 0x00010000 (64K) .numeraseregions = 0
6 cmdlinepart partitions found on MTD device raspi
Creating 6 MTD partitions on "raspi":
0x000000000000-0x000000050000 : "u-boot"
0x000000050000-0x000000060000 : "u-boot-env"
0x000000060000-0x000000070000 : "Factory"
0x000000070000-0x000000080000 : "product_info"
0x000000080000-0x000000090000 : "kdump"
0x000000090000-0x000001000000 : "firmware"
0x00000031a847-0x000001000000 : "rootfs"
mtd: partition "rootfs" must either start or end on erase block boundary or be smaller than an erase block -- forcing read-only
mtd: partition "rootfs_data" created automatically, ofs=0xae0000, len=0x520000
0x000000ae0000-0x000001000000 : "rootfs_data"
register mt_drv
```
```
cat /proc/mtd
dev: size erasesize name
mtd0: 00050000 00010000 "u-boot"
mtd1: 00010000 00010000 "u-boot-env"
mtd2: 00010000 00010000 "factory"
mtd3: 00010000 00010000 "product_info"
mtd4: 00010000 00010000 "kdump"
mtd5: 00f70000 00010000 "firmware"
mtd6: 0028a847 00010000 "kernel"
mtd7: 00ce57b9 00010000 "rootfs"
mtd8: 00520000 00010000 "rootfs_data"
```
- Installation:
1. Open the case, solder to the marked 4 pin header
2. Connect it to a USB-UART TTL (do not connect to 3.3v)
3. Open a terminal with baud 57600.
4. Power on device, and repeatedly press "2" key to catch bootloader option
5. Set IP, TFTP server IP, and image file to load (eg, openwrt-ramips-mt7621-ruijie_rg-ew1300g-v1-squashfs-sysupgrade.bin)
6. System will reboot into OpenWRT.
Signed-off-by: Matt Brent <git@mattzfiber.co.za>
Link: https://github.com/openwrt/openwrt/pull/21864
Signed-off-by: Hauke Mehrtens <hauke@hauke-m.de>
With new PCS implementation, the pcs property needs to be updated to the
new name of 'pcs-handle' to correctly work with PCS fwnode
consumer/provider.
Fixes: 4d5f579a81 ("airoha: update PCS node in DTSI for new PCS implementation")
Signed-off-by: Christian Marangi <ansuelsmth@gmail.com>
The nRESET pins of the RTL8224 PHYs on the PSX8/PSX10 are wired to GPIO6
(lan1-4) + GPIO10 (lan5-8) of the SoC, but this was never described in the
devicetree.
GPIO 6 is the global reset shared by (logical) PHYs 0-3 on MDIO bus0. GPIO
10 is the global reset shared by (logical) PHYs 8-11 on mdio bus0. It is
intentionally not declared as reset-gpios on any bus: the MDIO driver /
phylink only support a single reset GPIO per bus, not two (or more). And a
GPIO can only be used as reset-gpio on a single PHY. Attaching it to a
single PHY would still reset the other PHYs on the same chip as a side
effect, leaving their software state out of sync with the hardware and
likely breaking them.
Signed-off-by: Sven Eckelmann <se@simonwunderlich.de>
Link: https://github.com/openwrt/openwrt/pull/23297
Signed-off-by: Robert Marko <robimarko@gmail.com>
The nRESET pins of the RTL8224 PHYs on the PSX28/ESX28 are wired to GPIO29
of the SoC, but this was never described in the devicetree.
GPIO 29 is the global reset shared by all PHYs across all MDIO busses. It
is intentionally not declared as reset-gpios on any bus: the MDIO driver /
phylink only support a reset GPIO per bus, not on the parent controller.
Attaching it to a single bus would still reset the PHYs on the other busses
as a side effect, leaving their software state out of sync with the
hardware and likely breaking them.
Signed-off-by: Sven Eckelmann <se@simonwunderlich.de>
Link: https://github.com/openwrt/openwrt/pull/23297
Signed-off-by: Robert Marko <robimarko@gmail.com>
This commit adds support for the Meraki Z3C "Teleworker" device with
802.11ac, LTE Cat 3 modem, and an integrated 5 port Gigabit switch.
Port 5 has POE output (802.3af). The WAN port is used for tftp booting
in U-Boot.
This device ships with secure boot, and cannot be flashed without an
external programmer.
|||
|--|--|
|Model|Z3C|
|CPU|Qualcomm Atheros IPQ4029|
|Flash MB|128 NAND|
|RAM MB|512|
|WLAN Hardware|Qualcomm Atheros IPQ4029|
|WLAN 2.4GHz|b/g/n 2x2|
|WLAN 5.0GHz|a/n/ac 2x2|
|WWAN|LTE Cat 3|
|Ethernet 1Gbit ports|5|
The LAN/WiFi MAC addresses are sourced from an internal I2C EEPROM.
Z3C-HW-NA (NA: North America) supports LTE bands: 2,4,5,13,17
Z3C-HW-WW (WW: World-wide) supports LTE bands: 1,3,7,8,20
Disassembly:
Remove the four T8 screws on the bottom of the device under the rubber feet.
Using a guitar pick or similar plastic tool, insert it on the side between
the bottom case and the side, pry up gently. The plastic bottom has 18 latches
around the perimeter (but none on the rear by the Ethernet ports).
Remember to remove the SIM tray!
Gently remove the metal RF shield on the bottom of the PCB.
The TSOP48 NAND flash (U30, Spansion S34ML01G200TFV00) is located on the bottom
side of the PCB (facing you as you remove the bottom plastic). To flash, you
will need to desolder the TSOP48. Attempts to flash in-circuit using a 360 clip
were unsuccessful.
The SOIC8 I2C EEPROM (U32, Atmel 24C64) is located on the bottom side of the PCB
under a metal RF shield. It can be flashed in circuit using a chip clip. You may
have to bend the RF shield up to fit the chip clip.
The UART header is on the top (opposite) side of the PCB. You do not need to
remove any more screws to remove the PCB. The PCB has some thermal interface
material for heat dissipation and will be slightly difficult to remove the
first time. Gently pry up on the green PCB from one of the front corners until
the thermal pads break contact with the top case. You can then lift out the
entire PCB, including the attached LTE/WiFi antennas.
Installation:
The dumps to flash can be found in this repository:
https://github.com/halmartin/meraki-openwrt-docs/tree/main/z3c
The device has the following flash layout (offsets with OOB data):
```
0x000000000000-0x000000100000 : "sbl1"
0x000000100000-0x000000200000 : "mibib"
0x000000200000-0x000000300000 : "bootconfig"
0x000000300000-0x000000400000 : "qsee"
0x000000400000-0x000000500000 : "qsee_alt"
0x000000500000-0x000000580000 : "cdt"
0x000000580000-0x000000600000 : "cdt_alt"
0x000000600000-0x000000680000 : "ddrparams"
0x000000700000-0x000000900000 : "u-boot"
0x000000900000-0x000000b00000 : "u-boot-backup"
0x000000b00000-0x000000b80000 : "ART"
0x000000c00000-0x000007c00000 : "ubi"
```
* Dump your original NAND (if using nanddump, include OOB data).
* Decompress `u-boot.bin.gz` dump (contains OOB data) and overwrite the
`u-boot` portion of NAND from `0x738000-0x948000` (length `0x210000`).
* Decompress `ubi.bin.gz` dump (contains OOB data) and overwrite the `ubi`
portion of NAND from `0xc60000-0x8400000` (length `0x77a0000`).
* Dump your original EEPROM. Change the byte at offset `0x49` to `0x1e`
(originally `0x2a`). Remember to re-write the EEPROM with the
modified data.
* This can be done on Linux via the following command:
`printf "\x1e" | dd of=/tmp/eeprom.bin bs=1 seek=$((0x49)) conv=notrunc`
**Note**: the device will not boot if you modify the board major number and
have not yet overwritten the `ubi` and `u-boot` regions of NAND.
* Resolder the NAND after overwriting the `u-boot` and `ubi` regions.
OpenWrt Installation:
* After flashing NAND and EEPROM with external programmers. Plug in an
Ethernet cable and power up the device.
* The new U-Boot build uses the space character `" "` (without quotes) to
interrupt boot.
* Interrupt U-Boot and `tftpboot` the OpenWrt initramfs image from your
tftp server
```
dhcp
setenv serverip <your_tftp>
tftpboot openwrt-ipq40xx-generic-meraki_z3c-initramfs-uImage.itb
```
* Once booted into the OpenWrt initramfs, created the `ART` ubivol with
the WiFi radio calibration from the mtd partition:
```
cat /dev/mtd10 > /tmp/ART.bin
ubiupdatevol /dev/ubi0_1 /tmp/ART.bin
```
* `scp` the `sysupgrade` image to
the device and run the normal `sysupgrade` procedure:
```
scp -O openwrt-ipq40xx-generic-meraki_z3c-squashfs-sysupgrade.bin root@192.168.1.1:/tmp/
ssh root@192.168.1.1 "sysupgrade -n /tmp/openwrt-ipq40xx-generic-meraki_z3c-squashfs-sysupgrade.bin"
```
* OpenWrt should now be installed on the device.
* Note: To use the LTE modem as a WWAN, you must install `modemmanager`
(you probably also want `luci-proto-modemmanager`) and then configure
the modem for your provider.
Due to OpenWrt policies these packages are not included in the
initramfs/sysupgrade image.
Signed-off-by: Hal Martin <hal.martin@gmail.com>
Link: https://github.com/openwrt/openwrt/pull/23307
Signed-off-by: Robert Marko <robimarko@gmail.com>
Fix small nits in the Meraki device trees, identified by Claude
during a new device PR.
Signed-off-by: Hal Martin <hal.martin@gmail.com>
Link: https://github.com/openwrt/openwrt/pull/23307
Signed-off-by: Robert Marko <robimarko@gmail.com>
Remove target/linux/ipq40xx/dts/qcom-ipq4029-wired-qca-common.dtsi
This file is no longer used after the ipq40xx Meraki device tree
refactoring that occurred last year when adding support for the MR30H.
Signed-off-by: Hal Martin <hal.martin@gmail.com>
Link: https://github.com/openwrt/openwrt/pull/23307
Signed-off-by: Robert Marko <robimarko@gmail.com>
Update the PCS node in AN7581/AN7583 .dtsi for new PCS implementation.
The #pcs-cell is now needed for the produced/consumer implementation.
Also add entry for USB and PCIe PCS for AN7581 but keep them disabled
by default. USB and PCIe PCS for AN7583 node will be added later once PHY
code will stabilize.
Link: https://github.com/openwrt/openwrt/pull/23271
Signed-off-by: Christian Marangi <ansuelsmth@gmail.com>
Migrate Airoha PCS/Ethernet pending patch to PCS standalone implementation.
This new implementation drop the hack of reading and accessing the dev from
a different device and drop the legacy pcs_create/drop implementation in
favor of fwnode one with a provider/consumer approach.
This is also to sync with the proposed series posted upstream for revision.
The new PCS patch for AN7581 implement full support for USB and PCIe PCS.
Link: https://github.com/openwrt/openwrt/pull/23271
Signed-off-by: Christian Marangi <ansuelsmth@gmail.com>
Backport pending PCS standalone feature for kernel 6.12 and all the
required dependency patch.
All affected patch automatically refreshed.
Link: https://github.com/openwrt/openwrt/pull/23271
Signed-off-by: Christian Marangi <ansuelsmth@gmail.com>
Backport phylink_replay_link() API patch from upstream kernel. This is
mostly needed for force_major_config bool in phylink struct needed for new
standalone PCS series.
While at it also rename the current 703 patch to 703-01 as it's part of the
same series merged upstream.
All patch automatically refreshed.
Link: https://github.com/openwrt/openwrt/pull/23271
Signed-off-by: Christian Marangi <ansuelsmth@gmail.com>
With Kernel 6.18 the kernel size exceeds 4MB. Without additional changes
to the partition layout or kernel size reduction, the image will not be
usable. Disable this sub-target until necessary changes or a decision
regarding its removal have been made.
Signed-off-by: Stefan Kalscheuer <stefan@stklcode.de>
Link: https://github.com/openwrt/openwrt/pull/22761
Signed-off-by: Hauke Mehrtens <hauke@hauke-m.de>
Without explicit dependency between these two packages compilation
against Kernel 6.18 fails with the following error:
Package kmod-leds-turris-omnia is missing dependencies for the
following libraries: turris-omnia-mcu.ko
Make the dependency explicit to resolve this issue.
Signed-off-by: Stefan Kalscheuer <stefan@stklcode.de>
Link: https://github.com/openwrt/openwrt/pull/22761
Signed-off-by: Hauke Mehrtens <hauke@hauke-m.de>
Add new and remove obsolete symbols for Kernel 6.18
Signed-off-by: Stefan Kalscheuer <stefan@stklcode.de>
Link: https://github.com/openwrt/openwrt/pull/22761
Signed-off-by: Hauke Mehrtens <hauke@hauke-m.de>
This is an automatically generated commit.
When doing `git bisect`, consider `git bisect --skip`.
Signed-off-by: Stefan Kalscheuer <stefan@stklcode.de>
Link: https://github.com/openwrt/openwrt/pull/22761
Signed-off-by: Hauke Mehrtens <hauke@hauke-m.de>
Although the AN8855 eFuse driver was merged upstream, other
drivers were not. Restore Kconfig dependencies to enable it.
Also remove useless change logs from the patch.
Fixes: 2129465 ("mediatek: fix patches for Linux 6.18")
Signed-off-by: Chukun Pan <amadeus@jmu.edu.cn>
Link: https://github.com/openwrt/openwrt/pull/23250
Signed-off-by: Christian Marangi <ansuelsmth@gmail.com>
The vendor firmware checks for a bmt header in the last 528 erase blocks
of flash. The OpenWrt partition table did not respect that requirement,
and therefore the vendor and openwrt chainloader fight over those blocks
on every boot, potentially corrupting data stored in UBI blocks there.
This commit increases the size of the reserved_bmt partition to avoid
that fight.
Although the vendor bootloader only seems to touch the final 250 erase
blocks[1], the original vendor firmware system partition ended at
0x1be00000[2], so to be conservative, the consensus is to use that as
the end of mtd2 (ubi) partition and leave the last 528 blocks for mtd3
(reserved_bmt).
From https://openwrt.org/toh/gemtek/mxf-w1700k:
[1] OEM bootlog: [ 5.324337] bmt pool size: 250
[2] OEM bootlog: [ 5.478927] 0x000008600000-0x00001be00000 : "system"
Adds a compat_version to warn users to re-install to accomodate the
shrunken mtd2 ubi partition.
Fixed two nits suggested by Claude, zero padding a hex value and removed
an extra space.
Removed the wildcard setting of compat_version for other boards, as
suggested by Robert Marko, set compat_version only for the w1700k.
Reported-by: Loïc Yhuel <loic.yhuel@gmail.com>
Signed-off-by: Russell Senior <russell@personaltelco.net>
Link: https://github.com/openwrt/openwrt/pull/23061
Signed-off-by: Robert Marko <robimarko@gmail.com>
The RTL930x calibration code is especially chatty. There are debug
prints for every start and end of a section corresponding to the
sections the SDK uses. In the end, this doesn't help a user much and
just wastes CPU cycles. Moreover it doesn't help in understand what is
done there. As a first step, drop "start" and "end" prints but preserve
their meaning as comments.
While at it, slightly adjust two other prints and drop one confusing
print.
Signed-off-by: Jonas Jelonek <jelonek.jonas@gmail.com>
Link: https://github.com/openwrt/openwrt/pull/23288
Signed-off-by: Robert Marko <robimarko@gmail.com>
There is no need to be extra chatty for simple writes which set a single
bit. As a nice side effect, without the prints there's no need to have
open-coded register access when there a helper that covers that.
Signed-off-by: Jonas Jelonek <jelonek.jonas@gmail.com>
Link: https://github.com/openwrt/openwrt/pull/23288
Signed-off-by: Robert Marko <robimarko@gmail.com>
The SerDes setup code for RTL931x still has a lot of debug prints as
pr_info from former times. A lot has changed and we don't need that
rather useless chattiness anymore. We reached a state where we have a
standalone setup of most hardware modes. The registers printed are still
"documented" in rtpcs_931x_sds_config_hw_mode and
rtpcs_93xx_sds_config_cmu. For every other issues we rely on comparison
of full SerDes dumps instead of cherry-picked registers.
Signed-off-by: Jonas Jelonek <jelonek.jonas@gmail.com>
Link: https://github.com/openwrt/openwrt/pull/23288
Signed-off-by: Robert Marko <robimarko@gmail.com>
Specifications
==============
- SoC: RTL9302C
- Flash: 32 MiB SPI NOR flash
- RAM: 256 MiB
- Ethernet: 8x 10/100/1000/2500 Mbps (RTL8224)
- PoE: 802.3 af/at/bt on 8x RJ45 ports
- 60W per port, 130W total budget
- SFP: 2x SFP+ cages
- UART: 1x 4 pins serial header, 115200 bauds, 8n1, 3.3v logic levels,
pinout: unused (top), TX, RX, GND (bottom)
- Buttons: 1x "Restore" button, 1x "LED mode" button
MAC address
===========
Single MAC address derived from board partition with vendor-specific
format. MAC address is 70:49:a2:xx:xx:xx and applied to all switch
ports.
PoE
===
PoE is supported by realtek-poe package. To make it work, additional
options in the realtek-poe configuration file /etc/config/poe must be
set:
config globals
option force_baudrate '115200'
option force_dialect 'realtek'
Disclaimer
==========
Flashing OpenWrt will overwrite BootExtension + ZyNOS. BootExtension
functionality is not available anymore then. The U-boot/Bootbase still
has some limited functionality which can be used in emergency cases.
Installation
============
Simple web upgrade:
1. Take the OpenWrt factory.bin image generated by the build.
2. In the ZyNOS web UI, login and go to Maintenance -> Firmware Upgrade.
3. Under "Boot Image", make sure the Config Boot Image is set to 1. In
other words, make sure the switch booted from firmware image 1 or it
will do so on next reboot.
This is crucial, otherwise OpenWrt cannot boot.
4. Below, select and upload the factory.bin image. After clicking
upgrade, the image will be flashed.
5. After flashing has finished, reboot the switch. It will now boot into
OpenWrt.
U-Boot
======
This device ships with U-boot masked as Bootbase. After the device is
powered, a DRAM test is performed. Spamming $ during that test will drop
you into a shell after test finished. You'll have a limited command set
at first.
Unlocking the shell with [1] or [2] will give you a normal U-boot
command set. From here, you can perform initramfs boot or recovery.
Initramfs boot:
> loady 0x82000000 + go 0x82000000
Recovery:
> upgradeY image2 0x82000000 115200
Return to stock firmware
========================
1. Download the firmware for the switch from Zyxel website.
2. Unzip the download, there should be a .bin file with a alphanumeric
name.
3. Upload this file to running OpenWrt.
4. Run (use -F since the image doesn't have image metadata):
> sysupgrade -F <stock-firmware>.bin
5. Wait for the sysupgrade to succeed and the switch reboot. At the next
boot, ZyNOS should come up again.
Signed-off-by: Jonas Jelonek <jelonek.jonas@gmail.com>
Link: https://github.com/openwrt/openwrt/pull/23218
Signed-off-by: Robert Marko <robimarko@gmail.com>
RTL930x SoCs have a second serial interface UART1 which is exposed on
dual-function pins shared with JTAG. The SoC defaults to the JTAG
functionality after reset. Similar to existing pinmux registers, there's
a separate register for that where a selector decides about JTAG vs
UART.
Add a now pinctrl node for that register and a pinmux node to enable
UART1 functionality. Reference the pinmux in the (by default disabled)
uart1 node. Without this, UART1 doesn't work when it is actually needed.
This is e.g. the case with some PoE-capable switch where the PSE MCU
communicates with the SoC via UART instead of I2C.
Signed-off-by: Jonas Jelonek <jelonek.jonas@gmail.com>
Link: https://github.com/openwrt/openwrt/pull/23218
Signed-off-by: Robert Marko <robimarko@gmail.com>
The XMG1915 is a switch family with multiple variants sharing nearly
all hardware (same SoC, PHYs, SFP cages, LEDs) and mainly differing
in PoE and minor details.
In preparation for adding further variants, move the bulk of the
device tree into a shared rtl9302_zyxel_xmg1915.dtsi and reduce the
per-device dts to the device identity (compatible, model) plus any
variant-specific nodes.
For images, factor a Device/zyxel_xmg1915 template holding the shared
build settings so per-device definitions only need DEVICE_MODEL.
No functional change for XMG1915-10E.
Signed-off-by: Jonas Jelonek <jelonek.jonas@gmail.com>
Link: https://github.com/openwrt/openwrt/pull/23218
Signed-off-by: Robert Marko <robimarko@gmail.com>
So far the XMG1915-10E used the rt-loader-bootbase recipe which
produces a separate loader.bin and only allows installation/upgrade
from the CLI side, not via the Zyxel web UI.
Switch to the standard zyxel_zynos image recipe shared with the other
Zyxel rtl930x devices. The loader now lives inside the 'factory'
parent partition introduced in the previous commit, so the resulting
single sysupgrade image can be flashed both from the vendor web UI
and via sysupgrade. Hook the device into the existing xs1930 case in
platform.sh which sets PART_NAME=factory and calls default_do_upgrade.
This makes the installation and revert procedure in 94607d6285
("realtek: add support for Zyxel XMG1915-10E") mostly obsolete and
partly not working anymore (due to different build images that are
emitted).
Signed-off-by: Jonas Jelonek <jelonek.jonas@gmail.com>
Link: https://github.com/openwrt/openwrt/pull/23218
Signed-off-by: Robert Marko <robimarko@gmail.com>
When support for this device was added, the partition layout was defined
in a way that doesn't use space as intended and wastes quite a lot of
it.
(1) firmware partition starts at offset 0x1260000. This is the second
partition/B partition in the A/B scheme used by Zyxel. While the
commit mentions the image is written to A, the firmware partition
is defined in the B space.
(2) firmware partition only ~16MB in size. The device has a total of
32MB of flash. The vendor uses an A/B scheme but OpenWrt doesn't use
it. Thus, OpenWrt can make use of the full available space.
(3) loader partition too big. Other devices using rt-loader explicitly
in a partition use a size of 0x10000. This is more than enough
already. The device here uses 0x30000 which is mostly wasted.
Those issues are fixed accordingly. While at it, move partitions 'loader'
and 'firmware' into a parent partition 'factory'. This is a preparation
for adding web upgrade support for this device.
Fixes: 94607d6285 ("realtek: add support for Zyxel XMG1915-10E")
Signed-off-by: Jonas Jelonek <jelonek.jonas@gmail.com>
Link: https://github.com/openwrt/openwrt/pull/23218
Signed-off-by: Robert Marko <robimarko@gmail.com>
CONFIG_JUMP_LABEL is no longer meant to be set explicitly in target
kernel configs after 3be02c118f ("kernel: enable static key").
Signed-off-by: Mieczyslaw Nalewaj <namiltd@yahoo.com>
Link: https://github.com/openwrt/openwrt/pull/23293
Signed-off-by: Robert Marko <robimarko@gmail.com>
Until now there is a O(n) loop that looks up a port for a
given bus/phy combination. This is slow for high port count
devices (RTL839x and RTL931x). Implement a efficient reverse
lookup table for that.
While we are here adapt tiny bits of the documentation to
better reflect the driver logic after the recent refactoring.
Signed-off-by: Markus Stockhausen <markus.stockhausen@gmx.de>
Link: https://github.com/openwrt/openwrt/pull/23230
Signed-off-by: Robert Marko <robimarko@gmail.com>
Use modern compound literal assignment instead.
Signed-off-by: Markus Stockhausen <markus.stockhausen@gmx.de>
Link: https://github.com/openwrt/openwrt/pull/23230
Signed-off-by: Robert Marko <robimarko@gmail.com>
Upstream is slowly converting from "of_" to "fwnode_" handling.
This is a more modern and generic approach. Make use of it.
Signed-off-by: Markus Stockhausen <markus.stockhausen@gmx.de>
Link: https://github.com/openwrt/openwrt/pull/23230
Signed-off-by: Robert Marko <robimarko@gmail.com>
The long prefix distracts the reader from the real variables,
functions and defines. Shorten it to "rtmd_" that is not
used by any other upstream driver.
Signed-off-by: Markus Stockhausen <markus.stockhausen@gmx.de>
Link: https://github.com/openwrt/openwrt/pull/23230
Signed-off-by: Robert Marko <robimarko@gmail.com>
Improve error checking and code flow.
Signed-off-by: Markus Stockhausen <markus.stockhausen@gmx.de>
Link: https://github.com/openwrt/openwrt/pull/23230
Signed-off-by: Robert Marko <robimarko@gmail.com>
Until now the driver works as follows:
- low level functions do a bulk write
- high level functions have device specific structures
Turn this upside down and hide the register logic in the low
level functions. To achieve this:
- add a register map to each device
- change the low level write to use this map
- use only one common unique command structure
- use the command structure in the high level functions
While we are here fix the RTL838x access patterns. The read
functions do not need to set the bitmask.
Signed-off-by: Markus Stockhausen <markus.stockhausen@gmx.de>
Link: https://github.com/openwrt/openwrt/pull/23230
Signed-off-by: Robert Marko <robimarko@gmail.com>
Convert hexadecimal defines to lowercase and remove unneeded
brackets like upstream mdio does. While we are here remove
unused RTMDIO_DATA_MASK macro.
Signed-off-by: Markus Stockhausen <markus.stockhausen@gmx.de>
Link: https://github.com/openwrt/openwrt/pull/23230
Signed-off-by: Robert Marko <robimarko@gmail.com>
Hide the bit mangling in meaningful macros and use similar
coding for both RTL93xx targets.
Signed-off-by: Markus Stockhausen <markus.stockhausen@gmx.de>
Link: https://github.com/openwrt/openwrt/pull/23230
Signed-off-by: Robert Marko <robimarko@gmail.com>
Polling setup silently discards regmap return codes. Change function
signature and add error checking to all regmap commands.
Signed-off-by: Markus Stockhausen <markus.stockhausen@gmx.de>
Link: https://github.com/openwrt/openwrt/pull/23230
Signed-off-by: Robert Marko <robimarko@gmail.com>
Be consistent with the rest of the code and make clear when the
driver accesses ports. For this rename num_phys to num_ports.
Additionally make the device specific port numbers a define and
use them in the configuration structure.
Signed-off-by: Markus Stockhausen <markus.stockhausen@gmx.de>
Link: https://github.com/openwrt/openwrt/pull/23230
Signed-off-by: Robert Marko <robimarko@gmail.com>
In the define section there are still some masks that are not sorted
into the corresponding register. Move them around.
- This makes clear that C22 and command data share a register
- Add a prefix to the PHY_PATCH_DONE mask to align with rest of code
Signed-off-by: Markus Stockhausen <markus.stockhausen@gmx.de>
Link: https://github.com/openwrt/openwrt/pull/23230
Signed-off-by: Robert Marko <robimarko@gmail.com>
There are still some cryptic bit mask calculations. Replace them
with their register/field names for better readability.
Signed-off-by: Markus Stockhausen <markus.stockhausen@gmx.de>
Link: https://github.com/openwrt/openwrt/pull/23230
Signed-off-by: Robert Marko <robimarko@gmail.com>
Each device specific implementation disables the hardware polling
differently. Harmonize this by providing a central helper. With
this
- disable polling at the very beginning
- remove unneeded sleeping (SDK does not need it too)
- add checks for regmap returncodes
Especially for RTL839x avoid to disable hardware polling at all.
It is enough that the port specific polling is disabled during
configuration.
Signed-off-by: Markus Stockhausen <markus.stockhausen@gmx.de>
Link: https://github.com/openwrt/openwrt/pull/23230
Signed-off-by: Robert Marko <robimarko@gmail.com>
The CloudGenix ION 2000 is a discontinued entry-level SD-WAN appliance,
a rebranded Lanner FW-7525 based on the Intel Atom C2XXX family of processors
with 4 integrated GbE ports and 2 additional I210 GbE ports. It can often be
found on eBay starting below USD 30.
Specs:
* CPU: Intel Atom C2558 @2.4GHz (Quad-core)
* RAM: 1x 4GB DDR3 SO-DIMM
* Storage: 1x Compact Flash,
1x 420GB SATA 3.0 SSD
* Ethernet: 6x GbE RJ-45
* USB: 2x USB 2.0
* PCI: 1x Mini-PCIe slot
* Power: 12V/5A
The device's BIOS is password-protected, and the password somehow hasn't leaked,
but OpenWrt can be successfully booted by overwriting the stock OS on the boot
media.
See https://forum.openwrt.org/t/report-openwrt-on-cloudgenix-ion-2000/249315
for more details.
The two I210 NICs and integrated NICs are pinned to their
PCIe paths to ensure consistent interface ordering matching
the physical port layout with eth0 assigned to controller and
acting as WAN with remaining devices as LAN.
Signed-off-by: Raylynn Knight <rayknight@me.com>
Link: https://github.com/openwrt/openwrt/pull/23114
Signed-off-by: Hauke Mehrtens <hauke@hauke-m.de>
Disable IPSEC by default. If needed, install required packages.
Reduce compressed image size by 80 kB.
Signed-off-by: Aleksander Jan Bajkowski <olek2@wp.pl>
Link: https://github.com/openwrt/openwrt/pull/23269
Signed-off-by: Hauke Mehrtens <hauke@hauke-m.de>
Makes it a lot clearer what phy1tpt is, especially since it differs
between ath10k and ath9k.
Signed-off-by: Rosen Penev <rosenp@gmail.com>
Link: https://github.com/openwrt/openwrt/pull/21004
Signed-off-by: Hauke Mehrtens <hauke@hauke-m.de>
It appears 683-of_net-add-mac-address-to-of-tree.patch relies on the
mac-address nvmem property being present. wmac itself doesn't need it as
it takes it from the eeprom but label-mac-device needs it.
Signed-off-by: Rosen Penev <rosenp@gmail.com>
Link: https://github.com/openwrt/openwrt/pull/21035
Signed-off-by: Hauke Mehrtens <hauke@hauke-m.de>
This is already done in userspace. In addition, it's hard to do in nvmem
as they rely on non standard locations.
Signed-off-by: Rosen Penev <rosenp@gmail.com>
Link: https://github.com/openwrt/openwrt/pull/21035
Signed-off-by: Hauke Mehrtens <hauke@hauke-m.de>
This is a ceiling mount AP with only one ethernet port. eth0 is
specified in the dts but not eth1.
Fixes: 935a63c ("ath79: add support for COMFAST CF-E380AC v2")
Signed-off-by: Rosen Penev <rosenp@gmail.com>
Link: https://github.com/openwrt/openwrt/pull/21035
Signed-off-by: Hauke Mehrtens <hauke@hauke-m.de>
Add USB host support for EN7528 SoC:
- New phy-en7528-usb driver with U2 slew rate calibration and U3
RX impedance tuning, based on GPL vendor code and the Airoha
AN7581 USB PHY driver
- xHCI LTSSM timing quirk for TD 6.5 compliance (patch 915)
- USB PHY and xHCI DTS nodes with IPPC register mapping
- VBUS power via regulator-fixed for DASAN H660GM-A
- Enable USB, xHCI, PHY, and regulator kernel configs
Signed-off-by: Ahmed Naseef <naseefkm@gmail.com>
Link: https://github.com/openwrt/openwrt/pull/22498
Signed-off-by: Hauke Mehrtens <hauke@hauke-m.de>
This commit adds support for Qihoo 360T7 (UBI layout).
Aims
----
1. +20 MB additional free space for the packages
2. More reliable storage for the factory and fip partitions (in UBI)
Install (from non-UBI OpenWrt)
------------------------------
1. Navigate http://192.168.1.1/ and download mtd backups
2. Upgrade OpenWrt with installer initramfs image (force upgrade, don't
keep settings). Wait until OpenWrt reboots and until installer:
- Prepare new factory partition
- Format new ubi
- Make ubi volumes
- Write new fip and bl2
3. Navigate http://192.168.1.1/ and Upgrade with OpenWrt 'sysupgrade.bin'
image (don't keep settings)
Installer
---------
Based on OpenWrt UBI Installer Image Generator for Linksys E8450 and
Belkin RT3200
Link: https://github.com/dangowrt/owrt-ubi-installer
Ready installer image
Link: https://github.com/csharper2005/owrt-ubi-installer/tree/qihoo/bin
Installer script
Link: https://github.com/csharper2005/owrt-ubi-installer/blob/qihoo/files/
installer/install.sh
Committing to the parent Daniel's repository is not yet possible because
there are no official images and imagebuilder for Qihoo 360T7 (UBI) yet.
Signed-off-by: Mikhail Zhilkin <csharper2005@gmail.com>
Link: https://github.com/openwrt/openwrt/pull/22797
Signed-off-by: Hauke Mehrtens <hauke@hauke-m.de>
The mt7981b-mercusys-mr85x.dts has redundant executable bit (755 instead
of 644). Fix it.
Fixes: b2648d8 ("mediatek: add support for Mercusys MR85X")
Signed-off-by: Mikhail Zhilkin <csharper2005@gmail.com>
Link: https://github.com/openwrt/openwrt/pull/22797
Signed-off-by: Hauke Mehrtens <hauke@hauke-m.de>
Enable static key (jump label) on all supported architectures. This
lowers overhead and stress on the branch prediction of the CPU and
generally makes the kernel faster.
Signed-off-by: Qingfang Deng <dqfext@gmail.com>
Link: https://github.com/openwrt/openwrt/pull/23073
Signed-off-by: Hauke Mehrtens <hauke@hauke-m.de>
mediatek,mtd-eeprom predates nvmem and is being phased out.
At first glance, it looks like it's doing something useful with its
big-endian binding. However on further inspection, big-endian is handled
in the same function that mediatek,mtd-eeprom is handled. In addition,
the older mtd_read way of extracting the firmware byteswaps the data
on big endian hosts which big-endian byteswaps back. nvmem does not do
such byteswapping.
Signed-off-by: Rosen Penev <rosenp@gmail.com>
Link: https://github.com/openwrt/openwrt/pull/23115
Signed-off-by: Robert Marko <robimarko@gmail.com>
This was not refresh before because of a merge race.
Fixes: 4c942c06b8 ("kernel: bump 6.18 to 6.18.27")
Signed-off-by: Hauke Mehrtens <hauke@hauke-m.de>
The Allwinner T113-s3 (sun8i) SoC features a dual-core Cortex-A7 ARM CPU and
128MB of DDR3 memory in the same physical package. It supports industrial
temperature ranges. Most of the IP blocks are shared with the D1/D1s core.
There are multiple variants of the SoC, which may vary in the included memory
size, with some of them including a C906 RISC-V co-processor.
Boards supported:
- MangoPi MQDual T113
- wireless-only (RTL8723DS)
- MYIR MYD-YT113 eMMC
- 1Gbit ethernet (Motorcomm YT8531 PHY)
- 4GByte eMMC
- M.2-type slot for 4G/5G cards, plus 2x SIM slot
- USB 2.0 ports
- GPIO/I2C/SPI/CAN ports
- FNLink 6131 (rtl8733bu) wifi module
- MYIR MYD-YT113 SPI
- Same as above but with 256Mbyte SPI-NAND flash instead of eMMC
- Rongpin RP-T113
- 100Mbit ethernet (ICplus IP101GR PHY)
- miniPCIe slot for 4G cards, plus 1x SIM slot
- 3x USB 2.0 ports
- RTL8723BS wireless
- HYM8563 RTC
- GPIO/I2C/SPI/CAN ports
- Olimex T113-Olinuxino
- 100Mbit ethernet (ICplus IP101GR)
- UEXT connector (GPIO/I2C/SPI ports)
- 1x USB 2.0
- audio jack, LEDC
Installation:
Use the standard sunxi installation to an SD-card.
Signed-off-by: Zoltan HERPAI <wigyori@uid0.hu>
This is an automatically generated commit.
When doing `git bisect`, consider `git bisect --skip`.
Signed-off-by: Tianling Shen <cnsztl@immortalwrt.org>
Link: https://github.com/openwrt/openwrt/pull/23139
Signed-off-by: Nick Hainke <vincent@systemli.org>
Drop symbols removed in Linux 6.18 and add newly introduced symbols.
Additionally, restore CONFIG_PAGE_BLOCK_MAX_ORDER=10.
Signed-off-by: Til Kaiser <mail@tk154.de>
Link: https://github.com/openwrt/openwrt/pull/22930
Signed-off-by: Nick Hainke <vincent@systemli.org>
Refreshed patches for ipq40xx/patches-6.18
by running make target/linux/refresh.
Signed-off-by: Til Kaiser <mail@tk154.de>
Link: https://github.com/openwrt/openwrt/pull/22930
Signed-off-by: Nick Hainke <vincent@systemli.org>
This is an automatically generated commit.
When doing `git bisect`, consider `git bisect --skip`.
Signed-off-by: Til Kaiser <mail@tk154.de>
Link: https://github.com/openwrt/openwrt/pull/22930
Signed-off-by: Nick Hainke <vincent@systemli.org>
A script was ran that checks the label-mac-device node to see if it has
nvmem definitions as label-mac-device requires nvmem.
This is mostly a change to make the script happy. No indended functional
difference.
Add a change to qca9533_yuncore_cpe830.dts adding an nvmem definition to
wmac. Seems to have been some kind of oversight where it's specified in
nvmem but not used. label-mac-device needs an NVMEM definition.
Signed-off-by: Rosen Penev <rosenp@gmail.com>
Link: https://github.com/openwrt/openwrt/pull/22907
Signed-off-by: Robert Marko <robimarko@gmail.com>
On 25.12.0 the device has not enough free blocks to initialize overlay.
Move the device to tiny target and consume backup with storage
partitions, which were previously unused. This operation will reclaim
~800 KiB of flash memory. OEM used storage partition for configuration,
while backup was used to store copy of U-Boot environment and copy of
calibration data.
Signed-off-by: Tomasz Maciej Nowak <tmn505@gmail.com>
Partially revert 5e3a602def. Unfortunately the ethaddr value in U-Boot
environment is enclosed in double quotes which makes it longer than
ETH_ALEN, thus nvmem returns EINVAL. Switch back to handling the MAC
addresses in user space.
Fixes: 5e3a602def ("ath79: sitecom,wlrx100: use nvmem")
Reviewed-by: Rosen Penev <rosenp@gmail.com>
Signed-off-by: Tomasz Maciej Nowak <tmn505@gmail.com>
The ath9k driver creates an ath9k LED by default. Instead of having a
non functional LED, configure it properly and remove the extra as it's
not needed.
It's also a bit funny matching against phy0 and phy1 when both differ
between ath9k and ath10k.
Signed-off-by: Rosen Penev <rosenp@gmail.com>
Link: https://github.com/openwrt/openwrt/pull/23191
Signed-off-by: Robert Marko <robimarko@gmail.com>
Normally WMAC handles 2.4ghz on ath79 devices. Some older units though
handle 5ghz on WMAC and 2.4ghz on pcie. This can be seen by the
frequemcy limits placed on each interface.
Signed-off-by: Rosen Penev <rosenp@gmail.com>
Link: https://github.com/openwrt/openwrt/pull/23191
Signed-off-by: Robert Marko <robimarko@gmail.com>
The ath9k driver creates an ath9k LED by default. Instead of having a
non functional LED, configure it properly and remove the extra as it's
not needed.
It's also a bit funny matching against phy0 and phy1 when both differ
between ath9k and ath10k.
Signed-off-by: Rosen Penev <rosenp@gmail.com>
Link: https://github.com/openwrt/openwrt/pull/23191
Signed-off-by: Robert Marko <robimarko@gmail.com>
The ath9k driver creates an ath9k LED by default. Instead of having a
non functional LED, configure it properly and remove the extra as it's
not needed.
It's also a bit funny matching against phy0 and phy1 when both differ
between ath9k and ath10k.
Signed-off-by: Rosen Penev <rosenp@gmail.com>
Link: https://github.com/openwrt/openwrt/pull/23191
Signed-off-by: Robert Marko <robimarko@gmail.com>
In ath9k, 1 is specified as the default GPIO unless matched to a
specific device. None of these match to anything and use 1 anyway.
Signed-off-by: Rosen Penev <rosenp@gmail.com>
Link: https://github.com/openwrt/openwrt/pull/23191
Signed-off-by: Robert Marko <robimarko@gmail.com>
Makes it a lot clearer what phy1tpt is, especially since it differs
between ath10k and ath9k.
Signed-off-by: Rosen Penev <rosenp@gmail.com>
Link: https://github.com/openwrt/openwrt/pull/23191
Signed-off-by: Robert Marko <robimarko@gmail.com>
SoC name and system type identifiers are currently separated from
the soc_info structure. This gives no benefit. Relocate that info
into the structure where it belongs.
Signed-off-by: Markus Stockhausen <markus.stockhausen@gmx.de>
Link: https://github.com/openwrt/openwrt/pull/23173
Signed-off-by: Robert Marko <robimarko@gmail.com>
Drop config for Linux 6.12.
Signed-off-by: Mieczyslaw Nalewaj <namiltd@yahoo.com>
Link: https://github.com/openwrt/openwrt/pull/22868
Signed-off-by: Robert Marko <robimarko@gmail.com>
Switch to Linux kernel version 6.18.
Signed-off-by: Mieczyslaw Nalewaj <namiltd@yahoo.com>
Link: https://github.com/openwrt/openwrt/pull/22868
Signed-off-by: Robert Marko <robimarko@gmail.com>
RTL930x and RTL931x program the same physical SerDes IP mode field
(page 0x1f reg 0x09, bits 11:7 hold the 5-bit mode value, bit 6 is
the "force mode" enable), but did so via two unrelated code paths:
RTL930x kept the force bit separate from the value in a __set helper,
while RTL931x had it baked into each switch-case constant.
Add a shared rtpcs_93xx_sds_set_ip_mode() that takes the rtpcs_sds_mode
enum, looks up the 5-bit value from the existing sds_hw_mode_vals
table, and writes value | force-bit in one place.
Convert both variants:
- RTL930x: drop __rtpcs_930x_sds_set_ip_mode and the manual table
lookup; __rtpcs_930x_sds_get_ip_mode is replaced by the shared
rtpcs_93xx_sds_get_ip_mode, which reverse-looks the raw register
value up in sds_hw_mode_vals[] and returns the matching enum
rtpcs_sds_mode (or -ENOENT for an unmapped raw value). The
wrapper that orchestrates power, CMU, state machine and rx-reset
around the mode write is renamed to rtpcs_930x_sds_apply_ip_mode
for clarity.
- RTL931x: drop the per-mode switch and the leftover pr_info debug
print; rename the symerr-clear + MAC-OFF + IP-mode-write wrapper
to rtpcs_931x_sds_apply_ip_mode.
rtpcs_930x_sds_reconfigure_to_pll() now goes through the new shared
get/set helpers: it saves the current IP mode as an enum on entry
and restores it via the enum-taking setter after the PLL reconfigure.
This changes behavior by mapping the raw mode setting through the
hardware mode table, effectively blocking unknown modes which might be
set by bootloader or somewhere else. This is intended and might uncover
unknown behavior instead of hiding it.
As a side-effect, QSGMII is now properly set too for RTL931x. Most code
paths anyway already had support for this mode, but it was missing from
the mode setting.
Signed-off-by: Jonas Jelonek <jelonek.jonas@gmail.com>
Link: https://github.com/openwrt/openwrt/pull/23213
Signed-off-by: Robert Marko <robimarko@gmail.com>
Now that we have a board file, add calibration variant for TP-Link
EAP225-Wall v2 and add ipq-wifi package for it.
Tested-by: Alexander <52272120+alexxela1337@users.noreply.github.com>
Signed-off-by: Christoph Krapp <achterin@gmail.com>
Link: https://github.com/openwrt/openwrt/pull/23216
Signed-off-by: Robert Marko <robimarko@gmail.com>
Device/zyxel_zynos sets COMPILE := loader-$(1).bin to drive the
standalone rt-loader build, but include/image.mk's Device/Init does
not reset COMPILE between TARGET_DEVICES iterations. When a non-zynos
device follows a zynos device, the stale COMPILE entry survives and
Device/Build/compile registers a second recipe for the previous
device's loader-*.bin target. Make warns about the override and the
second (wrong) recipe wins.
Reset COMPILE in Device/Default so each device starts with a clean
slate.
Signed-off-by: Jonas Jelonek <jelonek.jonas@gmail.com>
Link: https://github.com/openwrt/openwrt/pull/23226
Signed-off-by: Robert Marko <robimarko@gmail.com>
FLASH_ADDR is referenced inside Build/rt-loader-standalone but is not
listed in DEVICE_VARS, so include/image.mk's Device/Export does not
emit a per-target FLASH_ADDR := <value> assignment for the standalone
loader recipe. At recipe expansion time $(FLASH_ADDR) therefore
resolves to whatever value the last device in TARGET_DEVICES set
globally, which is not necessarily the value belonging to the loader
being built.
This currently happens to produce correct binaries only because every
device that sets FLASH_ADDR within a given subtarget shares the same
value, so the leaked global matches by coincidence.
Add FLASH_ADDR to DEVICE_VARS so each loader recipe captures its own
device's address.
Signed-off-by: Jonas Jelonek <jelonek.jonas@gmail.com>
Link: https://github.com/openwrt/openwrt/pull/23226
Signed-off-by: Robert Marko <robimarko@gmail.com>
These are all unused by the current targets, clean up and stop
irritating the user with irrelevant grep results.
Signed-off-by: Andre Heider <a.heider@gmail.com>
Link: https://github.com/openwrt/openwrt/pull/23240
Signed-off-by: Robert Marko <robimarko@gmail.com>
Between 6.12 and 6.18, a 'blank' led_status_power has been added into
jh7110-common.dtsi. Update the patches responsible for adding the LED
aliases and add functionality for this LED entry.
Signed-off-by: Zoltan HERPAI <wigyori@uid0.hu>
Several defines still use the old prefix and are not sorted
alphabetically. Rearange the header file and the configuration
structures.
Signed-off-by: Markus Stockhausen <markus.stockhausen@gmx.de>
Link: https://github.com/openwrt/openwrt/pull/23145
Signed-off-by: Robert Marko <robimarko@gmail.com>
The mdio driver has found a simple way to handle phy addresses
for all devices with upstream kernel defaults. Remove all unneeded
hacks from the corresponding patch and reword it.
While we are here increase DSA_MAX_PORTS to 56 to match RTL931x.
Signed-off-by: Markus Stockhausen <markus.stockhausen@gmx.de>
Link: https://github.com/openwrt/openwrt/pull/23186
Signed-off-by: Robert Marko <robimarko@gmail.com>
As of now RTL839x devices have never more than 32 devices on one
mdio bus. Harden the phy address check during probing.
Signed-off-by: Markus Stockhausen <markus.stockhausen@gmx.de>
Link: https://github.com/openwrt/openwrt/pull/23186
Signed-off-by: Robert Marko <robimarko@gmail.com>
The RTL839x actually has two mdio busses.
- mdio bus 0 serves ports 0..23
- mdio bus 1 serves ports 24..51
This is baked into hardware and cannot be changed during mdio driver
setup with any register write. With the recent changes the driver
handles ports, phys and busses in a more logical way. So a port X
is assigned to a bus Y and a phy Z (on that bus). This gives a
mapping like
- port 16 <=> bus 0, address 16
- port 32 <=> bus 1, address 8
This unique assignment is used in the mdio driver as follows:
- Request to read bus 1, address 8
- Lookup corresponding port = 32
- Read from port 32
Looking at RTL839x it becomes clear that bus/phy => port lookup can
be achieved in multiple different ways. The simple reason is, that
for this device the driver cannot setup the smi topology. It is
baked into the hardware. So adding a "virtual" second bus does not
change the hardware access but allows to keep phy addresses below 32.
Making an example
mdio_bus0 {
PHY_C22(40, 40)
}
resolves to port 40. But the same can be achieved with
mdio_bus1 {
PHY_C22(40, 16)
}
In the first case the kernel sees bus/phy = 0/40 and in the second
case it sees bus/phy = 1/16. Both result in the access to the same
phy device on hardware port 40.
Use this analogy for RTL839x devices to match the real hardware
topology. For this change the existing dts and
- activate mdio bus 1 in rtl839x.dtsi
- rearrange devices with ports 24..51 to make use of bus 1
Signed-off-by: Markus Stockhausen <markus.stockhausen@gmx.de>
Link: https://github.com/openwrt/openwrt/pull/23186
Signed-off-by: Robert Marko <robimarko@gmail.com>
The lm75 alert polarity active-high patch has been accepted upstream.
Replace the downstream version. Additionally add an upstream bugfix
that was identified during the implementation.
Signed-off-by: Markus Stockhausen <markus.stockhausen@gmx.de>
Link: https://github.com/openwrt/openwrt/pull/23232
Signed-off-by: Robert Marko <robimarko@gmail.com>
The wrapper address of simple image devices should have been changed
at commit 6a8b831 , but only TL-WDR4900 and BR200-WP are changed at
that time, and now the wrapper address changes are split among patches
for specific devices. More importantly, commit 6a8b831 forgot to
change Enterasys WS-AP3715i, causing
https://github.com/openwrt/openwrt/issues/23112 .
This commit will gather the change of wrapper address of simple image
devices into a dedicated patch file.
Tested: Both WS-AP3715i and TL-WDR4900 v1 boot well.
Fixes: https://github.com/openwrt/openwrt/issues/23112
Signed-off-by: Edward Chow <equu@openmail.cc>
Link: https://github.com/openwrt/openwrt/pull/23121
Signed-off-by: Robert Marko <robimarko@gmail.com>
The simpleImage contains a payload already compressed with lzma-based
xz (by default), so further compressing it with lzma will often make
the result larger. On the contrary, compressing these simpleImages
with gzip can make the result smaller, so replace lzma with
libdeflate-gzip to compress kernel for ws-ap3715i.
Signed-off-by: Edward Chow <equu@openmail.cc>
Link: https://github.com/openwrt/openwrt/pull/23121
Signed-off-by: Robert Marko <robimarko@gmail.com>
find_mtd_part() outputs /dev/mtdblockX, to which fw_setenv cannot
write, "/dev/mtd$(find_mtd_index '<vol name>')" could be used instead.
The envsize should also be changed to 0x1000 to make the CRC checksum
valid and the env block recognized by the uboot-envtools, but the
flash sector size remains 0x10000, otherwise the env block will be
readable but not writable.
The "read-only" mark within device tree is also removed.
Signed-off-by: Edward Chow <equu@openmail.cc>
Link: https://github.com/openwrt/openwrt/pull/23121
Signed-off-by: Robert Marko <robimarko@gmail.com>
Add the basic bits to allow 100base-FX SFP mode on the RTL8214FC.
While this looks good fom ethtool perspective, it does not really
change the phy registers to enforce the mode. The SFP is still
driven in 1000base-X.
While it might seem useless at the moment this at least opens
up a new phy control method. This comes handy with one known bug.
In rare cases a SFP that is plugged in during boot does not get
a link. One option to revive the dead port seems to be
root@OpenWrt:~# ethtool -s lan28 speed 100 duplex full autoneg off
rtl83xx-switch 1b000000.switchcore:ethernet-switch lan28: Link is Up - 100Mbps/Full - flow control off
switch: port 28(lan28) entered blocking state
switch: port 28(lan28) entered forwarding state
rtl83xx_fib_event: FIB_RULE ADD/DEL for IPv6 not supported
rtl83xx_fib_event: FIB_RULE ADD/DEL for IPv6 not supported
Signed-off-by: Markus Stockhausen <markus.stockhausen@gmx.de>
Link: https://github.com/openwrt/openwrt/pull/23087
Signed-off-by: Robert Marko <robimarko@gmail.com>
This is a nonsensical binding that's not implemented anywhere.
Signed-off-by: Rosen Penev <rosenp@gmail.com>
Link: https://github.com/openwrt/openwrt/pull/23137
Signed-off-by: Robert Marko <robimarko@gmail.com>
Add a meaningful define for RTL838x port 24-27 link status detection.
Signed-off-by: Markus Stockhausen <markus.stockhausen@gmx.de>
Link: https://github.com/openwrt/openwrt/pull/23204
Signed-off-by: Robert Marko <robimarko@gmail.com>
RTL838x devices do not have a fail indicator. Add a comment for that.
Signed-off-by: Markus Stockhausen <markus.stockhausen@gmx.de>
Link: https://github.com/openwrt/openwrt/pull/23204
Signed-off-by: Robert Marko <robimarko@gmail.com>
The C22 aka command register is a wild bit mix. Avoid confusion
for reviewers and add a comment.
Signed-off-by: Markus Stockhausen <markus.stockhausen@gmx.de>
Link: https://github.com/openwrt/openwrt/pull/23204
Signed-off-by: Robert Marko <robimarko@gmail.com>
Maximum devnum in c45 access is only 31. The bits 21-31 of the MMD
register are reserved and cannot be written. Nevertheless add a
proper mask to help AI review bots.
Signed-off-by: Markus Stockhausen <markus.stockhausen@gmx.de>
Link: https://github.com/openwrt/openwrt/pull/23204
Signed-off-by: Robert Marko <robimarko@gmail.com>
Use park page (aka select page) to get rid of some magic values.
Signed-off-by: Markus Stockhausen <markus.stockhausen@gmx.de>
Link: https://github.com/openwrt/openwrt/pull/23204
Signed-off-by: Robert Marko <robimarko@gmail.com>
Make clear that the hardware design always uses the same type
of 10G phys. So it is uncritical that the polling values are
overwritten multiple times.
Signed-off-by: Markus Stockhausen <markus.stockhausen@gmx.de>
Link: https://github.com/openwrt/openwrt/pull/23204
Signed-off-by: Robert Marko <robimarko@gmail.com>
rtmdio_probe_one() should be only called by rtmdio_probe() after it
has validated the dts input. Nevertheless be defensive and add
another consistency check.
Signed-off-by: Markus Stockhausen <markus.stockhausen@gmx.de>
Link: https://github.com/openwrt/openwrt/pull/23204
Signed-off-by: Robert Marko <robimarko@gmail.com>
Rename the module to describe that it is for the Realtek Otto
switches. Add owner to make clear who takes care. Adapt the
license to match the SPDX header.
Signed-off-by: Markus Stockhausen <markus.stockhausen@gmx.de>
Link: https://github.com/openwrt/openwrt/pull/23204
Signed-off-by: Robert Marko <robimarko@gmail.com>
In case someone calls the macro with other helpers this might
break the code. Add brackets for consistency.
Signed-off-by: Markus Stockhausen <markus.stockhausen@gmx.de>
Link: https://github.com/openwrt/openwrt/pull/23204
Signed-off-by: Robert Marko <robimarko@gmail.com>
The read functions might fail and thus "val" might be uninitialized.
The debug function will output the undefined state. Set the value
to zero to be consistent.
Signed-off-by: Markus Stockhausen <markus.stockhausen@gmx.de>
Link: https://github.com/openwrt/openwrt/pull/23204
Signed-off-by: Robert Marko <robimarko@gmail.com>
Remove the register write. It is never used in the SDK.
Signed-off-by: Markus Stockhausen <markus.stockhausen@gmx.de>
Link: https://github.com/openwrt/openwrt/pull/23204
Signed-off-by: Robert Marko <robimarko@gmail.com>
Make the macro type safe.
Signed-off-by: Markus Stockhausen <markus.stockhausen@gmx.de>
Link: https://github.com/openwrt/openwrt/pull/23204
Signed-off-by: Robert Marko <robimarko@gmail.com>
The RTL839x allows to add an extended page operator during phy
access. This is not needed for the standard linux kernel C22
access. Give the hardcoded 0x1ff value a meaningful define.
Although it is not needed, add the corresponding register define.
This makes clear where the mask belongs to.
Signed-off-by: Markus Stockhausen <markus.stockhausen@gmx.de>
Link: https://github.com/openwrt/openwrt/pull/23204
Signed-off-by: Robert Marko <robimarko@gmail.com>
The rtmdio_931x_setup_ctrl() function currently initializes the c22/c45
and the proprietary format bit of the controller. This works because of
the order these calls are arranged. Narrow down the update to the really
needed bits.
- c22/c45 (bit 1) is updated here
- standard/proprietary (bit 0) is updated in rtmdio_931x_setup_polling()
Adapt the confusing comment "Std. C45, non-standard is 0x3" it basically
explains the other function.
Signed-off-by: Markus Stockhausen <markus.stockhausen@gmx.de>
Link: https://github.com/openwrt/openwrt/pull/23204
Signed-off-by: Robert Marko <robimarko@gmail.com>
Provide a separate function to setup the ability (SDS/MDIO) of a RTL930x
port. This simplifies rtmdio_930x_setup_polling(). With this commit the
driver does no longer unconditionally overwrite reserved register bits.
Add a return value for the new function to indicate failure/success. As
of now this will be silently ignored in the caller. A future commit will
take care about that.
Signed-off-by: Markus Stockhausen <markus.stockhausen@gmx.de>
Link: https://github.com/openwrt/openwrt/pull/23204
Signed-off-by: Robert Marko <robimarko@gmail.com>
Provide a separate function to setup the ability (SDS/MDIO) of a RTL931x
port. This simplifies rtmdio_931x_setup_polling(). With this commit the
driver does no longer unconditionally overwrite reserved register bits.
Add a return value for the new function to indicate failure/success. As
of now this will be silently ignored in the caller. A future commit will
take care about that.
Signed-off-by: Markus Stockhausen <markus.stockhausen@gmx.de>
Link: https://github.com/openwrt/openwrt/pull/23204
Signed-off-by: Robert Marko <robimarko@gmail.com>
Fix whitespace issues in the driver.
Signed-off-by: Markus Stockhausen <markus.stockhausen@gmx.de>
Link: https://github.com/openwrt/openwrt/pull/23204
Signed-off-by: Robert Marko <robimarko@gmail.com>
Improve error handling for the setup_ctrl() functions.
Signed-off-by: Markus Stockhausen <markus.stockhausen@gmx.de>
Link: https://github.com/openwrt/openwrt/pull/23204
Signed-off-by: Robert Marko <robimarko@gmail.com>
Topology setup is used during probing. Improve error checking
to be 100% sure that hardware setup works as expected. While
we are here:
- use GENMASK()
- Be type consistent and add u32 cast for value calculation
- use __ffs(mask) for code deduplication and better readability
Signed-off-by: Markus Stockhausen <markus.stockhausen@gmx.de>
Link: https://github.com/openwrt/openwrt/pull/23204
Signed-off-by: Robert Marko <robimarko@gmail.com>
The driver was developed over a longer time. Be consistent about
the return code handling and always use "ret" instead of "err".
Signed-off-by: Markus Stockhausen <markus.stockhausen@gmx.de>
Link: https://github.com/openwrt/openwrt/pull/23204
Signed-off-by: Robert Marko <robimarko@gmail.com>
Use device base warning messages and simplify message.
Signed-off-by: Markus Stockhausen <markus.stockhausen@gmx.de>
Link: https://github.com/openwrt/openwrt/pull/23204
Signed-off-by: Robert Marko <robimarko@gmail.com>
With its current usage type RTMDIO_PHY_POLL_MMD() definition is ok.
But for the sake of consistency add brackets around the macro
parameters and use masks to avoid calculation inconsistencies.
Signed-off-by: Markus Stockhausen <markus.stockhausen@gmx.de>
Link: https://github.com/openwrt/openwrt/pull/23204
Signed-off-by: Robert Marko <robimarko@gmail.com>
The mdio hardware is fully understood. Describe the number of real
busses in the configuration structure and check against this limit
when working on busses.
Signed-off-by: Markus Stockhausen <markus.stockhausen@gmx.de>
Link: https://github.com/openwrt/openwrt/pull/23204
Signed-off-by: Robert Marko <robimarko@gmail.com>
Try to describe the hardware capabilities with consistent defines
and configuration variables. As raw_page is always num_pages - 1
better use num_pages naming where needed and provide a macro that
converts this naming.
While we are here:
- Sort the configuration variables alphabetically
- Provide num_pages defines per architecture
- adapt RTMDIO_839X_C22_DATA() macro to use the new define
Signed-off-by: Markus Stockhausen <markus.stockhausen@gmx.de>
Link: https://github.com/openwrt/openwrt/pull/23204
Signed-off-by: Robert Marko <robimarko@gmail.com>
Harmonize the read/write functions for better readability. This
aligns with the naming convention of the upstream rtl9300 mdio
driver.
read_phy -> read_c22
read_phy_mmd -> read_c45
write_phy -> write_c22
write_phy_mmd -> write_c45
Swap order of c22/c45 functions to keep structures sorted
alphabetically.
Signed-off-by: Markus Stockhausen <markus.stockhausen@gmx.de>
Link: https://github.com/openwrt/openwrt/pull/23197
Signed-off-by: Hauke Mehrtens <hauke@hauke-m.de>
Add support for changing the LED mode via the device tree.
Currently it always defaults to SERIAL mode. With this change,
one can also use the SINGLE_COLOR_SCAN and BI_COLOR_SCAN modes.
Signed-off-by: Manuel Stocker <mensi@mensi.ch>
Link: https://github.com/openwrt/openwrt/pull/23160
Signed-off-by: Hauke Mehrtens <hauke@hauke-m.de>
ELECOM WRC-X6000GSD is a 4804Mbps 4xMIMO 2.4/5 GHz 11ax (Wi-Fi 6) router
with 2.5Gbps WAN (stock: 1Gbps max.), based on MT7986B
Specification:
- SoC : MediaTek MT7986BLA
- RAM : DDR3 512 MiB (SoC)
- Flash : Winbond 128MiB SPI NAND (W25N01GVZEIG)
- WLAN : 2.4/5 GHz 4T4R (MediaTek MT7986)
- Ethernet : 5x 10/100/1000(/2500) Mbps
- wan : Maxlinear Ethernet GPY211C (max. 2500M)
- lan : MediaTek MT7531 (max. 1000M)
- LEDs/Keys (GPIO): 11x/4x
- UART : through-hole on PCB (J1)
- assignment : 3.3V, TX, RX, NC, GND from tri-angle marking
- settings : 115200n8
- Power : 12 VDC, 2 A
Flash layout:
dev: offset size name
mtd0: 0x00000000 0x00100000 "BL2"
mtd1: 0x00100000 0x00080000 "Ubootenv"
mtd2: 0x00180000 0x00200000 "Factory"
mtd3: 0x00380000 0x00200000 "FIP"
mtd4: 0x00580000 0x00020000 "Fwheader"
mtd5: 0x005a0000 0x03200000 "ubi"
mtd6: 0x037a0000 0x00380000 "Config"
mtd7: 0x03b20000 0x00020000 "Fwheader_2"
mtd8: 0x03b40000 0x03200000 "ubi_2"
mtd9: 0x06d40000 0x00380000 "Config_2"
mtd10: 0x070c0000 0x00100000 "persist"
mtd11: 0x071c0000 0x00040000 "Mrd"
mtd12: 0x07200000 0x00380000 "Backup"
Flash instruction using factory.bin image:
1. Boot WRC-X6000GSD in router mode normally
2. Access to the WebUI ("http://192.168.2.1/") on the device
-> その他設定 (Other settings)
-> フォームウェア更新 (Update firmware)
-> ローカルファイル指定 (Specify local file)
3. Select the OpenWrt factory.bin image and click apply ("適用") button
4. Wait ~120 seconds to complete flashing
Switching to the stock firmware:
1. Load the elecom.sh script
. /lib/upgrade/elecom.sh
2. Check the current index of firmware partition
mstc_rw_bootnum
3. Set the bootnum to opposite value between 1 and 2
mstc_rw_bootnum value
example:
- step2 returned "1": mstc_rw_bootnum 2
- step2 returned "2": mstc_rw_bootnum 1
4. Reboot, to stock FW
5. Flash the stock FW to fuly revert back to original.
Notes:
- With the stock firmware, it will flash to another partition and
toggle boot to that partition when any firmware is flashed.
For example when booting on ubi, the new firmware will be flashed
to ubi_2 and the router will boot from ubi_2 afterwards.
The 5th byte of the Persist partition is the boot value (0x01 or 0x02).
- bootmenu_delay=0 is set from factory so uboot menu is hidden by
default.
- The hardware of WRC-X6000GSD is almost identical to WRC-X6000QS, but
WAN (labeled as "INTERNET") port is limited to 1000 Mbps on stock FW.
On OpenWrt FW, 2500 Mbps connection is available on that port.
MAC Addresses:
LAN : 38:97:A4:xx:xx:58 (Factory, 0x2A(hex)/Ubootenv, "ethaddr"(text))
WAN : 38:97:A4:xx:xx:5B (Factory, 0x24(hex))
2.4GHz: 38:97:A4:xx:xx:59 (Factory, 0x4(hex))
5GHz : 38:97:A4:xx:xx:5A (Factory, 0xA(hex)
Signed-off-by: INAGAKI Hiroshi <musashino.open@gmail.com>
Link: https://github.com/openwrt/openwrt/pull/22926
Signed-off-by: Hauke Mehrtens <hauke@hauke-m.de>
ELECOM WRC-X6000QS is a 4804Mbps 4xMIMO 2.4/5 GHz 11ax (Wi-Fi 6) router
with 2.5Gbps WAN, based on MT7986b
Specification:
- SoC : MediaTek MT7986B
- RAM : DDR3 512 MiB
- Flash : Winbond 128MiB SPI NAND
- WLAN : 2.4/5 GHz 4T4R (MediaTek MT7986)
- Ethernet : 5x 10/100/1000 Mbps
- wan : Maxlinear Ethernet GPY211C
- lan : MediaTek MT7531
- LEDs/Keys (GPIO): 11x/4x
- UART : through-hole on PCB (J1)
- assignment : 3.3V, TX, RX, NC, GND from tri-angle marking
- settings : 115200n8
- Power : 12 VDC, 2 A
Flash layout:
dev: offset size name
mtd0: 0x00000000 0x00100000 "BL2"
mtd1: 0x00100000 0x00080000 "Ubootenv"
mtd2: 0x00180000 0x00200000 "Factory"
mtd3: 0x00380000 0x00200000 "FIP"
mtd4: 0x00580000 0x00020000 "Fwheader"
mtd5: 0x005a0000 0x03200000 "ubi"
mtd6: 0x037a0000 0x00380000 "Config"
mtd7: 0x03b20000 0x00020000 "Fwheader_2"
mtd8: 0x03b40000 0x03200000 "ubi_2"
mtd9: 0x06d40000 0x00380000 "Config_2"
mtd10: 0x070c0000 0x00100000 "persist"
mtd11: 0x071c0000 0x00040000 "Mrd"
mtd12: 0x07200000 0x00380000 "Backup"
UBI layout:
name: size:
kernel 0x00364000 dynamic
rootfs 0x00FFC000 dynamic
rootfs_data 0x01A47000 dynamic
Flash instruction using factory.bin image:
1. Boot WRC-X6000QS in router mode normally
2. Access to the WebUI ("http://192.168.2.1/") on the device
-> その他設定 (Other settings)
-> フォームウェア更新 (Update firmware)
-> ローカルファイル指定 (Specify local file)
3. Select the OpenWrt factory.bin image and click apply ("適用") button
4. Wait ~120 seconds to complete flashing
Switching to the stock firmware:
1. Load the elecom.sh script
. /lib/upgrade/elecom.sh
2. Check the current index of firmware partition
mstc_rw_bootnum
3. Set the bootnum to opposite value between 1 and 2
mstc_rw_bootnum value
example:
- step2 returned "1": mstc_rw_bootnum 2
- step2 returned "2": mstc_rw_bootnum 1
4. Reboot, to stock FW
5. Flash the stock FW to fuly revert back to original.
Note 1: With the stock firmware, it will flash to another partition and
toggle boot to that partition when any firmware is flashed.
For example when booting on ubi, the new firmware will be flashed
to ubi_2 and the router will boot from ubi_2 afterwards.
The 5th byte of the Persist partition is the boot value (0x01 or 0x02).
During my tests, it never switched to another boot partition if the
firmware failed boot. So if openwrt doesn't boot,
UART might be required to recover.
Note 2: bootmenu_delay=0 is set from factory so uboot menu is hidden.
[original work]
Signed-off-by: Yuhei Amemiya <minihui@me.com>
[fixes, improvements]
Signed-off-by: INAGAKI Hiroshi <musashino.open@gmail.com>
Link: https://github.com/openwrt/openwrt/pull/22926
Signed-off-by: Hauke Mehrtens <hauke@hauke-m.de>
Use SWITCH_PORT_LED instead of full verbose port definitions to
simplify and clean up the DTS.
Signed-off-by: Jonas Jelonek <jelonek.jonas@gmail.com>
Link: https://github.com/openwrt/openwrt/pull/23118
Signed-off-by: Hauke Mehrtens <hauke@hauke-m.de>
Replace the verbose ethernet-phy node definitions with the PHY_C45 and
PHY_C45_PAIR_ORDER macros to drop boilerplate.
Signed-off-by: Jonas Jelonek <jelonek.jonas@gmail.com>
Link: https://github.com/openwrt/openwrt/pull/23118
Signed-off-by: Hauke Mehrtens <hauke@hauke-m.de>
Replace the raw bitmask values for led_set entries with the
RTL93XX_LED_SET_* macros from macros.dtsi to make the LED configuration
self-explanatory.
Signed-off-by: Jonas Jelonek <jelonek.jonas@gmail.com>
Link: https://github.com/openwrt/openwrt/pull/23118
Signed-off-by: Hauke Mehrtens <hauke@hauke-m.de>
Make use of the SWITCH_PORT_SFP macro to simplify and make the DTS of
several devices cleaner.
Signed-off-by: Jonas Jelonek <jelonek.jonas@gmail.com>
Link: https://github.com/openwrt/openwrt/pull/23118
Signed-off-by: Hauke Mehrtens <hauke@hauke-m.de>
Each architecture has its own SMI address and SMI data size. Make the
current device specific coding generic by
- adding SMI start address and SMI data size to configuration structure
- moving regmap_bulk_write() over to the generic rtmdio_run_cmd()
- deleting all device specific rtmdio_xxxx_run_cmd() versions
Signed-off-by: Markus Stockhausen <markus.stockhausen@gmx.de>
Link: https://github.com/openwrt/openwrt/pull/23092
Signed-off-by: Hauke Mehrtens <hauke@hauke-m.de>
Each target has a specific SMI register where the result of read
commands is stored. As the read logic is always the same convert
the current logic to a generic one. Instead of a target specific
coding move eveything into the configuration structure and let
rtmdio_run_cmd() do the work.
Signed-off-by: Markus Stockhausen <markus.stockhausen@gmx.de>
Link: https://github.com/openwrt/openwrt/pull/23092
Signed-off-by: Hauke Mehrtens <hauke@hauke-m.de>
Until now the device specific I/O helpers are instrumented by individual
call parameters. Move this information over to the configuration structure.
This simplifies the code at the calling locations.
Signed-off-by: Markus Stockhausen <markus.stockhausen@gmx.de>
Link: https://github.com/openwrt/openwrt/pull/23092
Signed-off-by: Hauke Mehrtens <hauke@hauke-m.de>
Convert the RTL931x I/O path to the new bulk write pattern. For this
- Enhance the rtmdio_931x_run_cmd() helper to take care of all register
access and error handling.
- Convert the c22/c45/read/write functions so that they only prepare
the I/O data without any register access.
Signed-off-by: Markus Stockhausen <markus.stockhausen@gmx.de>
Link: https://github.com/openwrt/openwrt/pull/23092
Signed-off-by: Hauke Mehrtens <hauke@hauke-m.de>
Convert the RTL930x I/O path to the new bulk write pattern. For this
- Enhance the rtmdio_930x_run_cmd() helper to take care of all register
access and error handling.
- Convert the c22/c45/read/write functions so that they only prepare
the I/O data without any register access.
Signed-off-by: Markus Stockhausen <markus.stockhausen@gmx.de>
Link: https://github.com/openwrt/openwrt/pull/23092
Signed-off-by: Hauke Mehrtens <hauke@hauke-m.de>
Convert the RTL839x I/O path to the new bulk write pattern. For this
- Enhance the rtmdio_839x_run_cmd() helper to take care of all register
access and error handling.
- Convert the c22/c45/read/write functions so that they only prepare
the I/O data without any register access.
Signed-off-by: Markus Stockhausen <markus.stockhausen@gmx.de>
Link: https://github.com/openwrt/openwrt/pull/23092
Signed-off-by: Hauke Mehrtens <hauke@hauke-m.de>
The regmap conversion only replaced the old sw() macros with their
regmap counterparts. Neither access optimization nor error handling
took place. Redesign the mdio access as follows:
- The c22/c45/read/write functions only prepare a data structure
that describes the to-be-executed command.
- rtmdio_xxxx_run_cmd() is enhanced to bulk write the data into the
SoC, issue all the I/O and do proper error handling. Additionally
the signature is changed to allow read & write operations.
The bulk commands introduce some subtle changes.
- Before this patch only the needed registers were written. After
the conversion all phy control registers are set up.
- The register write order changes
This is no issue as the hardware starts operation when issuing the
run_cmd() and only accesses the needed registers per operation.
For now adapt only the RTL838x path. Where needed rename "err" to
"ret" for consistency with kernel conventions.
Signed-off-by: Markus Stockhausen <markus.stockhausen@gmx.de>
Link: https://github.com/openwrt/openwrt/pull/23092
Signed-off-by: Hauke Mehrtens <hauke@hauke-m.de>
Device support for zbt-z8103ax-d
Model D DTS is identical to Model C zbt-z8103ax-c.
Both models share same motherboard.
Difference between models is
- Model C is a cylinder shape enclosure
containing internal antennas.
- Model D is a sandwich shape enclosure
with 6 external antennas.
Specifications:
SoC: MediaTek MT7981B
RAM: 256MiB
Flash: Winbond SPI-NAND 128 MiB
Switch: 1 WAN, 3 LAN (Gigabit) MediaTek MT7531
Buttons: Reset, Mesh
Power: DC 12V 1A
WiFi: MT7981B 2.4Ghz & 5.8Ghz
Led Layout from left to right:
Power
Mesh (RGB Led, user controllable, default set to OpenWrt Status)
WLAN 2.4G (user controllable)
WAN (user controllable)
LAN3
LAN2
LAN1
WLAN 5G (user controllable)
Installation:
A. Through U-Boot menu:
- Prepare your connecting computer to use static IP
(legacy notation) 192.168.1.10 netmask 255.255.255.0
(CIDR notation) 192.168.1.10/24
- Power down the router and hold in the Reset button.
- While holding in the button power up the router again.
- Hold the button in for 10 seconds and then release.
- Use your browser to go to 192.168.1.1
- If you see a GUI allowing for flashing firmware you are at the right spot.
- Upload the **Factory** image file.
Note: U-Boot GUI it can be used to recover from an incorrect firmware flash.
B. Through OpenWrt Dashboard:
If your router comes with OpenWrt preinstalled (modified by the seller),
you can easily upgrade by going to the dashboard (192.168.1.1)
and then navigate to
System -> Backup/Flash firmware, then flash the firmware
MAC Addresses:
MAC Addresses were found in Factory partition:
offset 0x4 F8:5E:3C:xx:xx:aa --> Router Label -2
offset 0xa F8:5E:3C:xx:xx:bb --> Router Label -1
offset 0x24 F8:5E:3C:xx:xx:cc --> Router Label +1
offset 0x2a F8:5E:3C:xx:xx:yy --> printed on Router Label
Signed-off-by: Jörg Seitz <github.joeterminal@xoxy.net>
Link: https://github.com/openwrt/openwrt/pull/21626
Signed-off-by: Hauke Mehrtens <hauke@hauke-m.de>
Nand has a valid mediatek nand badblock management (NMBM) signature.
Gets used for non-UBI partions BL2, u-boot-env, Factory and FIT.
Signed-off-by: Jörg Seitz <github.joeterminal@xoxy.net>
Link: https://github.com/openwrt/openwrt/pull/21626
Signed-off-by: Hauke Mehrtens <hauke@hauke-m.de>
Commit 15887235c1 ("generic: mtk_eth_soc: reduce driver memory usage")
allows building mediatek ethernet driver without CONFIG_PAGE_POOL_STATS.
This can slightly improve throughput on legacy MIPS based MT7621 SoC.
Signed-off-by: Shiji Yang <yangshiji66@outlook.com>
Link: https://github.com/openwrt/openwrt/pull/23142
Signed-off-by: Robert Marko <robimarko@gmail.com>
Now that the stp_set() helpers have been refactored the stp_get()
helpers can be simplified. Drop the last array parameter. It is
no longer needed/evaluated by its callers.
Signed-off-by: Markus Stockhausen <markus.stockhausen@gmx.de>
Link: https://github.com/openwrt/openwrt/pull/23080
Signed-off-by: Hauke Mehrtens <hauke@hauke-m.de>
The rtldsa_port_xstp_state_set() function offers a generic interface
to its callers to set the bridge state of one port. While it calls
device specific helpers in the background it runs the data mapping
for each architecture with a family_id check on its own. So the
hardware abstraction is done in two places
- rtldsa_port_xstp_state_set() translates one half
- its helper translate the other half
Convert the signature of the device specific helpers so that this
function does not need to know any hardware details. Instead move
the table/offset/bit calculations into the helpers. This way the
code path uses a consistent hardware abstraction.
- rtldsa_port_xstp_state_set() calls the helpers
- helpers do the hardware translation
Signed-off-by: Markus Stockhausen <markus.stockhausen@gmx.de>
Link: https://github.com/openwrt/openwrt/pull/23080
Signed-off-by: Hauke Mehrtens <hauke@hauke-m.de>
Currently, moving from a port on one LAN8814 PHY package to another results
in a no traffic flowing on that new port.
It was tracked down to upstream change that fixed the issue that QSGMII
was soft reset on .config_init of each of 4 PHY-s in the package resulting
in a temporary traffic loss until QSGMII resynced.
However, it seems that the QSGMII soft reset timing is crucial and doing
the reset during probe only cause the QSGMII link to become partially
unsynced (Like 2 or 3 lanes are not synced).
So, add an upstream pending patch[1] to fix this, patch was modified as we
dont have the inband caps currently.
[1] https://patchwork.kernel.org/project/netdevbpf/patch/20260428134138.1741253-1-robert.marko@sartura.hr/
Signed-off-by: Robert Marko <robert.marko@sartura.hr>
Add the label-mac-device alias to the device dts.
Signed-off-by: Christoph Krapp <achterin@gmail.com>
Link: https://github.com/openwrt/openwrt/pull/23134
Signed-off-by: Robert Marko <robimarko@gmail.com>
The Kconfig symbol help text prompts:
Disable this to get a possibly more secure configuration, but that
might not be backward compatible with previous kernels.
If backward compatibility is not an issue, then it is safe and
recommended to say N here.
For OpenWrt, when updating firmware, we always update the kernel and
recreate the overlay partition. Therefore, compatibility is not a
problem.
Signed-off-by: Shiji Yang <yangshiji66@outlook.com>
Link: https://github.com/openwrt/openwrt/pull/23126
Signed-off-by: Christian Marangi <ansuelsmth@gmail.com>
Airoha reported some bug in the TX/RX descriptor handling and PPE. Backport
the fix for such bug merged in net staging tree.
It's expected that these patch will be dropped in future minor kernel
version when submitted to stable staging tree.
All affected patch automatically refreshed.
Signed-off-by: Christian Marangi <ansuelsmth@gmail.com>
The nRESET pins of the RTL8224 PHY on the MCX3 are wired to GPIO6 of the
SoC, but this was never described in the devicetree.
Commit c99a30668d ("realtek: add RTL8224 initialization to Realtek
driver") introduced support for reinitializing RTL8224 PHYs, and commit
084da38a2e ("realtek: mdio: activate multiple busses") allowed the MDIO
bus provider load the devicetree properties to the bus, including reset
descriptors. With both in place, a bus level PHY reset via the hardware pin
is now correctly triggered before reinitialization.
Add the missing reset-gpios property so the PHY can be reset via the
hardware pin.
Signed-off-by: Sven Eckelmann <sven@narfation.org>
Link: https://github.com/openwrt/openwrt/pull/22966
Signed-off-by: Robert Marko <robimarko@gmail.com>
Drop patches and configs for Linux 6.12.
Signed-off-by: Mieczyslaw Nalewaj <namiltd@yahoo.com>
Link: https://github.com/openwrt/openwrt/pull/22871
Signed-off-by: Nick Hainke <vincent@systemli.org>
Switch to Linux kernel version 6.18.
Signed-off-by: Mieczyslaw Nalewaj <namiltd@yahoo.com>
Link: https://github.com/openwrt/openwrt/pull/22871
Signed-off-by: Nick Hainke <vincent@systemli.org>
FIPS 140-3 recommends that all crypto implementations should be tested
before first use. Testmanager performs initial tests based on existing
test vectors. Not all algorithms have defined test vectors, so to improve
this situation, this commit backports recently added test vectors for
some cipher suites.
These vectors were calculated using a software implementation and then
double-checked on Mediatek MT7981 (safexcel) and NXP P2020 (talitos).
Both platforms passed self-tests.
Signed-off-by: Aleksander Jan Bajkowski <olek2@wp.pl>
Link: https://github.com/openwrt/openwrt/pull/23012
Signed-off-by: Hauke Mehrtens <hauke@hauke-m.de>
Use regmap_assign_bits() where it improves readability. With this
there is no need to calculate masks and values in separate lines.
Splitting the single update_bits() in rtmdio_931x_setup_polling()
into two separate assign_bits() is uncritical.
Signed-off-by: Markus Stockhausen <markus.stockhausen@gmx.de>
Link: https://github.com/openwrt/openwrt/pull/23099
Signed-off-by: Hauke Mehrtens <hauke@hauke-m.de>
Add the registers, family id and cpu port defines to the mach header.
Since RTL96xx SoCs has additional "subtype" info, add the respective
property to soc_info struct to be used in prom file.
The same way as rtl838x, the chip_info register requires 0xa to be
written. Similarly, 0xb must be written to get the subtype info.
There doesn't seem any check for testchip in RTL96xx so, we ignore it.
Add subtype information to set_system_type function if it is present
using the added subtype variable.
There are some RTL9607 chips out there with 512MB so add the check
for RTL9607 in the prepare_highmem. The registers are the same as
in RTL9300 so nothing else need to be changed.
Signed-off-by: Rustam Adilov <adilov@tutamail.com>
Link: https://github.com/openwrt/openwrt/pull/23023
Signed-off-by: Hauke Mehrtens <hauke@hauke-m.de>
Refresh the patch to account for recent changes in the generic kernel
patches. Makes the CI kernel patch check happy again.
Fixes: c271123724 ("generic: 6.18: fix MediaTek USXGMII driver")
Signed-off-by: Jonas Jelonek <jelonek.jonas@gmail.com>
Link: https://github.com/openwrt/openwrt/pull/23127
Signed-off-by: Robert Marko <robimarko@gmail.com>
Add patches to improve support for using 3rd-party DSA switches
like MaxLinear MxL862xx with MediaTek's mtk_eth_soc being the
conduit. This involves reorganizing hardware queues to avoid
overlap (currently dp->index is used -- if there is more than one
DSA switch this is problematic), and correctly programming flows
of the non-MTK DSA users ports in the PPE offloading engine.
Signed-off-by: Daniel Golle <daniel@makrotopia.org>
Fix build error:
drivers/irqchip/irq-bcm2712-mip.c:14:10: fatal error: irq-msi-lib.h: No such file or directory
14 | #include "irq-msi-lib.h"
| ^~~~~~~~~~~~~~~
Fixes: ba7aa2a971 ("generic: backport MSI affinity support for DW PCIe")
Signed-off-by: Shiji Yang <yangshiji66@outlook.com>
Link: https://github.com/openwrt/openwrt/pull/23125
Signed-off-by: Robert Marko <robimarko@gmail.com>
The USXGMII_10GDXGMII and USXGMII_10GQXGMII early-return was added
when the submode register was not yet programmed, making those modes
effectively unconfigurable. With the submode now wired up at probe
time and written from the set_mode path, the gating is no longer
needed.
Keep the XSGMII gate - RTL8218D/E bring-up through the proprietary
10G SGMII path is still unimplemented - and rewrite the surrounding
comment accordingly.
Signed-off-by: Jonas Jelonek <jelonek.jonas@gmail.com>
Link: https://github.com/openwrt/openwrt/pull/23120
Signed-off-by: Robert Marko <robimarko@gmail.com>
Complete the USXGMII submode table with the four values that were
missing so far:
0x01 10GDX (2 x 5G)
0x03 5GSX (1 x 5G)
0x04 5GDX (2 x 2.5G)
0x05 2_5GSX (1 x 2.5G)
Together with the existing 10GSX (0x00) and 10GQX (0x02) this covers
all six USXGMII modes the driver declares. Add a corresponding mapping
to the hw_mode table too to cover them properly there.
Replace the switch in rtpcs_93xx_sds_apply_usxgmii_submode() with a
sparse lookup table indexed by hw_mode, using -1 as the sentinel for
modes without a submode value. Non-USXGMII modes silently no-op as
before; a USXGMII mode hitting a SerDes without an allocated submode
register now returns -EOPNOTSUPP, catching configuration mismatches
that would previously have been silently dropped.
Signed-off-by: Jonas Jelonek <jelonek.jonas@gmail.com>
Link: https://github.com/openwrt/openwrt/pull/23120
Signed-off-by: Robert Marko <robimarko@gmail.com>
USXGMII submode (10GSX vs 10GQX) is selected through a dedicated
register at 0x13e8, independent of the MAC and IP mode registers.
Without programming it, USXGMII-QX ports initialise as single-lane
SX and fail to link up correctly; MAC and IP mode alone are
insufficient for a working USXGMII setup.
The register packs 12 x 5-bit entries for SerDes 2..13, six per
32-bit word, non-straddling (bits 0..29 used, 30..31 padded). This
matches the available register dumps and the SDK's
reg_array_field_write() non-CROSS_REGISTERS path, which derives the
bit position as ((index - larray) % (32 / width)) * width and
accesses only a single 32-bit word. The submode values are identical
to RTL930x, so the shared RTPCS_93XX_SDS_USXGMII_SUBMODE_* defines
are reused.
Allocate the regmap_field at probe time with coordinates computed
from the SerDes ID; the regular packing needs no lookup table. Call
rtpcs_93xx_sds_apply_usxgmii_submode() from the set_mode dispatcher
after set_ip_mode - the helper's null-guard and mode filter leave
non-USXGMII paths unchanged.
Signed-off-by: Jonas Jelonek <jelonek.jonas@gmail.com>
Link: https://github.com/openwrt/openwrt/pull/23120
Signed-off-by: Robert Marko <robimarko@gmail.com>
PHY drivers might need access to NVMEM or the filesystem to load
calibration/initialization data. The driver will then return -EPROBE_DEFER
to signal to the device core that the probe should be retried multiple
times again in the 10s driver_deferred_probe_timeout.
But when the switch driver calls dsa_register_switch(), it needs to connect
the PHYs directly. As result, all PHYs without an driver will automatically
get the default driver (either `genphy_c45_driver` or `genphy_driver`)
assigned and initialized. But for PHYs with the additional initialization
data from NVMEM/fs, this will usually result in not working PHYs.
Since there are Realtek based boards with RTL826x PHYs and the new driver
loads the initialization/patch values from rootfs, it is necessary to check
in the beginning of the probe function whether the PHYs are ready and the
probing can continue.
If some driver is still without driver after the deferred probe period
ended, the loading will just continue and the generic PHY drivers will
still be used.
Closes: #22811
Co-authored-by: Jonas Jelonek <jelonek.jonas@gmail.com>
Co-authored-by: Markus Stockhausen <markus.stockhausen@gmx.de>
Signed-off-by: Sven Eckelmann <sven@narfation.org>
Link: https://github.com/openwrt/openwrt/pull/23075
Signed-off-by: Robert Marko <robimarko@gmail.com>
RTL930x and RTL931x share a set of extras around MAC mode writes:
- a post-write delay (kept for consistency with the original RTL930x
behaviour; harmless on RTL931x)
- the force-mode bit (RTL931x only, nullable field)
Add rtpcs_93xx_sds_set_mac_mode() as a shared wrapper around the
generic rtpcs_sds_set_mac_mode() that applies each of these extras
unconditionally; the nullable field makes the force-bit write a no-op
on RTL930x.
Route the three RTL93xx call sites (the 930x and 931x set_mode
dispatchers, and 931x set_ip_mode's OFF transition) through the
wrapper, removing the duplicated force-bit handling from each.
The USXGMII submode write stays out of the wrapper and is called
explicitly from the 930x dispatcher via rtpcs_93xx_sds_apply_usxgmii_submode().
Keeping submode as a separate step leaves room for RTL931x to apply it
from its IP-mode path once the submode register is wired up, without
retrofitting a MAC-mode wrapper with side effects.
Signed-off-by: Jonas Jelonek <jelonek.jonas@gmail.com>
Link: https://github.com/openwrt/openwrt/pull/23040
Signed-off-by: Robert Marko <robimarko@gmail.com>
RTL931x uses a regular 8-bit-per-SerDes layout in SERDES_MODE_CTRL, so
the reg_field can be computed in the probe hook with simple arithmetic.
The 8-bit-per-SerDes field is split into a 7-bit mac_mode (bits 0..6)
and a 1-bit mac_mode_force (bit 7), each written independently via its
own regmap_field. The mac_mode is widened to 7 bits (rather than the
5 bits strictly needed for the mode value) so MAC mode writes also
clear bit 5 (FEC enable) and bit 6 (10G speedup), matching the original
behaviour where the full 8-bit mask cleared these bits on every mode
change. FEC and speedup are mode-dependent and not yet programmed by
the driver; keeping them cleared leaves headroom for future support
without changing the effective register value.
rtpcs_931x_sds_reset() is updated to save and restore both fields
across the off/on cycle, preserving the original force-bit handling.
rtpcs_931x_sds_set_mode() uses the generic rtpcs_sds_set_mac_mode() and
sets the force bit explicitly; the same sequence also appears in
rtpcs_931x_sds_set_ip_mode()'s OFF transition. Both are folded into
the shared RTL93xx wrapper in a later commit.
Signed-off-by: Jonas Jelonek <jelonek.jonas@gmail.com>
Link: https://github.com/openwrt/openwrt/pull/23040
Signed-off-by: Robert Marko <robimarko@gmail.com>
RTL930x packs 5-bit mode fields across four registers at irregular
positions. Express this as a static reg_field table indexed by SerDes
ID; the probe hook allocates the corresponding regmap_field. The
USXGMII submode register follows the same pattern with its own
reg_field table, allocated only for 10G-capable SerDes (id 2..9).
The generic rtpcs_sds_set_mac_mode() replaces the old
__rtpcs_930x_sds_set_mac_mode() helper. The previous behaviour of
writing OFF before the target mode is intentionally dropped — it was
RTL930x-specific and not required by the hardware.
The variant-level rtpcs_930x_sds_set_mode() is kept as a pure dispatch
between the IP mode path (set_ip_mode) and the MAC mode path. The
USXGMII submode write is factored into rtpcs_93xx_sds_apply_usxgmii_submode(),
which derives the submode value from hw_mode and no-ops on SerDes
without the submode register.
The __rtpcs_930x_sds_get_mac_mode() and __rtpcs_930x_sds_get_usxgmii_submode()
helpers are dropped. They were __always_unused and depended on the
removed parallel arrays. A future get_mode path will be added if a
caller needs it, likely mirroring the setter's wrapper shape.
Signed-off-by: Jonas Jelonek <jelonek.jonas@gmail.com>
Link: https://github.com/openwrt/openwrt/pull/23040
Signed-off-by: Robert Marko <robimarko@gmail.com>
RTL839x packs the SerDes MAC mode in MAC_SERDES_IF_CTRL with a regular
per-SerDes layout, so the regmap_field can be computed directly in the
probe hook rather than declared as a static table.
Mode values (currently only OFF and QSGMII) move into a static
rtpcs_839x_sds_hw_mode_vals[] table. Values for 100BASEX, 1000BASEX
and SGMII from the vendor SDK are kept as comments for future
reference — they are not yet exercised here.
With no variant-specific extras (no force bit, no companion register,
no submode), rtpcs_839x_sds_set_mode() is removed; setup_serdes calls
the generic rtpcs_sds_set_mac_mode() directly.
Signed-off-by: Jonas Jelonek <jelonek.jonas@gmail.com>
Link: https://github.com/openwrt/openwrt/pull/23040
Signed-off-by: Robert Marko <robimarko@gmail.com>
Replace rtpcs_838x_sds_set_mode()'s inline shift/mask arithmetic with
a regmap_field computed and allocated at probe time. The field layout
is regular (5-bit per SerDes, reverse-packed in SDS_MODE_SEL), so the
position can be derived arithmetically from the SerDes ID rather than
declared in a table.
The function keeps its wrapper role because SerDes 4 and 5 have a
second companion register (INT_MODE_CTRL) with its own per-mode value
encoding. Since RTL838x is the only variant with this quirk and the
register is written from only one call site, it is kept inline rather
than abstracted into its own config table.
Signed-off-by: Jonas Jelonek <jelonek.jonas@gmail.com>
Link: https://github.com/openwrt/openwrt/pull/23040
Signed-off-by: Robert Marko <robimarko@gmail.com>
All four Realtek PCS variants (RTL838x, RTL839x, RTL930x, RTL931x)
configure the SerDes MAC mode by writing a register field whose layout
varies per variant — different base registers, different bit positions,
and in some cases per-SerDes packing that isn't arithmetically regular.
Add the common infrastructure to express this uniformly:
- per-SerDes regmap_field pointers in a new 'swcore_regs' anonymous
struct on rtpcs_serdes: mac_mode, mac_mode_force (931x only, nullable)
and usxgmii_submode (930x only, nullable).
- a per-variant mode-value table pointer (sds_hw_mode_vals) on
rtpcs_config, keyed by enum rtpcs_sds_mode. Values are s16 with -1 as
the "unsupported" sentinel — u8 with 0 would collide with RTL839x's
OFF value (0x0).
- a generic rtpcs_sds_set_mac_mode() that looks up the value for the
requested mode and writes it via the regmap_field.
Variant-specific extras (post-write delay, force bit, companion register
writes, USXGMII submode handling) will be added in per-variant wrappers
in the following commits.
Signed-off-by: Jonas Jelonek <jelonek.jonas@gmail.com>
Link: https://github.com/openwrt/openwrt/pull/23040
Signed-off-by: Robert Marko <robimarko@gmail.com>
This target is not popular among active developers.
If nobody is using the testing kernel, this phase is pointless.
Switch this niche target to kernel 6.18 for testing.
Signed-off-by: Pawel Dembicki <paweldembicki@gmail.com>
Link: https://github.com/openwrt/openwrt/pull/22680
Signed-off-by: Linus Walleij <linusw@kernel.org>
Use the upstream properties to describe the USXGMII PCS polarity as
the downstream mediatek,pnswap{,-rx,tx} was dropped.
This board was the only user.
Signed-off-by: Daniel Golle <daniel@makrotopia.org>
LINK_INBAND_ENABLE isn't valid for 5GBase-R/10GBase-R modes which
by definition don't support any in-band an. Correctly report
LINK_INBAND_DISABLE to fix 10G fiber SFP modules no longer working.
While at it also get rid of downstream pn-swap properties in favor
of using the upstream schema.
Signed-off-by: Daniel Golle <daniel@makrotopia.org>
Remove the last sw() macros from the ethernet driver.
With this drop the required include line.
Signed-off-by: Markus Stockhausen <markus.stockhausen@gmx.de>
Link: https://github.com/openwrt/openwrt/pull/23067
Signed-off-by: Hauke Mehrtens <hauke@hauke-m.de>
Use regmap_assign_bits() for conversion and much simpler code.
Signed-off-by: Markus Stockhausen <markus.stockhausen@gmx.de>
Link: https://github.com/openwrt/openwrt/pull/23067
Signed-off-by: Hauke Mehrtens <hauke@hauke-m.de>
Besides converting some functions to regmap do some minor
refactoring for rteth_931x_init_mac().
- Use dev_err() instead of classic print functions
- Harmonize ALE_INIT error handling. ALE_INIT_2 has the same
logic as the other registers. The reset is finished as soon
as the register is completely zero.
- From testing 100ms poll timeout seems to be sufficient
Signed-off-by: Markus Stockhausen <markus.stockhausen@gmx.de>
Link: https://github.com/openwrt/openwrt/pull/23067
Signed-off-by: Hauke Mehrtens <hauke@hauke-m.de>
Make use of regmap in rteth_mac_link_down and rteth_mac_link_up.
Signed-off-by: Markus Stockhausen <markus.stockhausen@gmx.de>
Link: https://github.com/openwrt/openwrt/pull/23067
Signed-off-by: Hauke Mehrtens <hauke@hauke-m.de>
Use regmap in the following functions
- rteth_838x_hw_stop()
- rteth_839x_hw_stop()
- rteth_930x_hw_stop()
- rteth_931x_hw_stop()
Signed-off-by: Markus Stockhausen <markus.stockhausen@gmx.de>
Link: https://github.com/openwrt/openwrt/pull/23067
Signed-off-by: Hauke Mehrtens <hauke@hauke-m.de>
Device support for zbt-z8106ax-s
Specifications:
SoC: MediaTek MT7981B
RAM: 256MiB
Flash: Winbond SPI-NAND 128 MiB
Switch: 1 WAN, 4 LAN (Gigabit) MediaTek MT7531
Buttons: Reset
Power: DC 12V 1A
WiFi: MT7981B 2.4Ghz & 5Ghz
USB 3
M2 slot to hold LTE modem
1 nano SIM slot (user controllable)
Hardware watchdog (confirmed to work)
Router comes in a plastic tower with all antennas internal.
- 4 antennas for LTE 4G/5G communication
- 2 antennas for Wifi 2.4 GHz
- 2 antennas for Wifi 5 GHz
Led Layout:
Power (green, user controllable, default set to OpenWrt Status)
Mobile (green, user controllable)
WLAN 2.4G (green, user controllable)
WLAN 5G (green, user controllable)
WAN (amber, user controllable, set to show eth1)
LAN1 (amber, hardware controlled)
LAN2 (amber, hardware controlled)
LAN3 (amber, hardware controlled)
LAN4 (amber, hardware controlled)
SIM Slot:
Controlled via exported GPIO named SIM.
echo "0" > /sys/class/gpio/sim/value
- turns off sim slot labelled SIM
echo "1" > /sys/class/gpio/sim/value
- turns on sim slot labelled SIM
---
Installation:
A. Through U-Boot menu:
- Prepare your connecting computer to use a static IP in
network 192.168.1.0/24 like
a) 192.168.1.10 netmask 255.255.255.0 (legacy notation)
b) 192.168.1.10/24 (CIDR notation)
- Power down the router and hold in the Reset button.
- While holding in the button power up the router again.
- Hold the button in for 10 seconds and then release.
- Use your browser to go to 192.168.1.1
- If you see a GUI allowing for flashing firmware then you got the right spot.
- Upload the **Factory** image file.
Note: U-Boot GUI it can be used to recover from an incorrect firmware flash.
B. Through OpenWrt Dashboard:
If your router comes with OpenWrt preinstalled (modified by vendor),
you can easily upgrade by going to the dashboard (192.168.1.1) and
then navigate to "System" -> "Backup/Flash firmware"
Flash OpenWRT firmware.
Important: Take care to deselect (untick) option
"keep settings". Settings done by vendor are incompatible with
versions 24.10 or 25.12.
MAC Addresses:
MAC Addresses were found in Factory partition:
offset 0x4 F8:5E:3C:xx:xx:aa --> Router Label -2
offset 0xa F8:5E:3C:xx:xx:bb --> Router Label -1
offset 0x24 F8:5E:3C:xx:xx:cc --> Router Label +1
offset 0x2a F8:5E:3C:xx:xx:yy --> printed on Router Label
Hardware Watchdog:
Device features a GPIO controlled hardware watchdog.
Verfied by removing procd controlled watchdog and
seeing device rebooting.
---
Notes:
The zbt-z8106ax-s could be ordered from vendor with a variety of modems.
Mine came with a 4G LTE modem Quectel EC200A.
Quectel firmware was at EC200AEUHAR01A30M16.
Choices for ordering with 5G LTE were available.
Modem communication is set to ethernet control mode (ECM) by vendor.
Package modemmanager works fine with Quectel EC200A.
You may also decide to use FUjR/Qmodem github repository
to have it manage LTE modem.
Please take note that internal switch port named lan5 isn't
wired to LTE modem in model S as opposed to model T.
Just removing lan5 from DTS did cause unwanted reboots whenever
a cable is plugged into LAN ports 1-4. Disabling port lan5
in DTS however works fine. No unwanted reboots due to
plug/unplug cable into any lan or wan port.
Signed-off-by: Jörg Seitz <github.joeterminal@xoxy.net>
Link: https://github.com/openwrt/openwrt/pull/22912
Signed-off-by: Hauke Mehrtens <hauke@hauke-m.de>
Since DW PCIe can adjust interrupts on SoC that only support
MSI, adjust the interrupt of r8169 for the RK3528 devices.
Signed-off-by: Chukun Pan <amadeus@jmu.edu.cn>
Link: https://github.com/openwrt/openwrt/pull/21770
Signed-off-by: Hauke Mehrtens <hauke@hauke-m.de>
Currently, the DesignWare PCIe driver cannot configure interrupts on
SoC that do not support MSIX. All MSI interrupts are handled by CPU0.
Backport MSI affinity support for the PCI dwc driver from linux-next,
so now we can adjust MSI interrupts to other CPU cores.
Tested on HINLINK H28K (RK3528) and OrangePi R2S (Ky X1).
Signed-off-by: Chukun Pan <amadeus@jmu.edu.cn>
Link: https://github.com/openwrt/openwrt/pull/21770
Signed-off-by: Hauke Mehrtens <hauke@hauke-m.de>
The audio should only be enabled when the sound
node is enabled. This fixes the following error:
an7581-audio 1fbe2200.afe: probe with driver an7581-audio failed with error -2
Fixes: 7b55651 ("airoha: enable I2S sound driver and add nodes for eMMC RFB board")
Signed-off-by: Chukun Pan <amadeus@jmu.edu.cn>
Link: https://github.com/openwrt/openwrt/pull/22660
Signed-off-by: Hauke Mehrtens <hauke@hauke-m.de>
Enable the 6.18 testing kernel for Octeon.
Signed-off-by: Andrew LaMarche <andrewjlamarche@gmail.com>
Link: https://github.com/openwrt/openwrt/pull/23031
Signed-off-by: Nick Hainke <vincent@systemli.org>
Refresh patches for 6.18.
Signed-off-by: Andrew LaMarche <andrewjlamarche@gmail.com>
Link: https://github.com/openwrt/openwrt/pull/23031
Signed-off-by: Nick Hainke <vincent@systemli.org>
Add missing symbols for 6.18.
Signed-off-by: Andrew LaMarche <andrewjlamarche@gmail.com>
Link: https://github.com/openwrt/openwrt/pull/23031
Signed-off-by: Nick Hainke <vincent@systemli.org>
This is an automatically generated commit.
When doing `git bisect`, consider `git bisect --skip`.
Signed-off-by: Andrew LaMarche <andrewjlamarche@gmail.com>
Link: https://github.com/openwrt/openwrt/pull/23031
Signed-off-by: Nick Hainke <vincent@systemli.org>
